Skyworks Solutions Inc. SI8652AB-AS1
- Part No.:
- SI8652AB-AS1
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI8652AB-AS1.pdf
- Description:
- AUTOMOTIVE 2.5 KV 3 FORWARD & 2
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI8652AB-AS1 from Skyworks is a five-channel automotive-grade digital isolator with 3 input channels on VDD1 side and 2 output channels on VDD2 side, supporting up to 150 Mbps data rate, <10 ns propagation delay, and 2.5 kVRMS isolation rating in narrow-body SOIC-16 package. It operates across –40 to +125 °C and features Schmitt-trigger inputs, tri-state outputs with enable control, and selectable fail-safe low-default output state - used in battery management systems and traction inverters for signal integrity across high-noise power domains.
For engineers reviewing the SI8652AB-AS1 datasheet, SI8652AB-AS1 pinout, SI8652AB-AS1 application, or SI8652AB-AS1 equivalent, this page delivers verified technical context, real-world timing and power specs, automotive-qualified isolation performance, and validated alternative part guidance - all grounded in Skyworks' official Si8650/51/52/55 datasheet (Rev. 206455A, Jan 2023).
Technical Context
The SI8652AB-AS1 implements RF-based on/off keying across a semiconductor isolation barrier, eliminating startup initialization and enabling robust noise immunity without optical degradation. Its architecture supports independent undervoltage lockout (UVLO) on both sides, with VDDUV+ = 2.24 V (typ) and hysteresis of 70 mV (typ), ensuring reliable operation during brownout conditions.
It provides dual enable inputs (EN1, EN2) for independent channel-group control: EN1 manages A4/A5 outputs (VDD1 side), EN2 manages B1/B2/B3 outputs (VDD2 side). Each enable input draws only 2.0 μA (typ), and drives outputs into high-impedance when disabled - critical for bus arbitration and power sequencing in isolated motor control interfaces.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | 5 total: 3 inputs on VDD1 side, 2 outputs on VDD2 side - enables asymmetric signal routing for feedback + command isolation in bidirectional power converters. |
| Max Data Rate | 150 Mbps - supports high-speed serial interfaces like isolated SPI clock/data lines in battery monitoring ICs. |
| Propagation Delay | 8.0 ns (typ), ≤13 ns (max) - ensures sub-10 ns timing alignment for gate driver enable signals in SiC/GaN inverter designs. |
| Isolation Rating | 2.5 kVRMS - certified per UL 1577, VDE 0884-10, and CSA 5A for reinforced insulation in industrial and automotive safety-critical systems. |
| Supply Voltage | 2.375–5.5 V on both sides - allows direct interfacing with 3.3 V microcontrollers and 5 V analog front-ends without level-shifting. |
| Fail-Safe Default | Low-output (Bx variant) - guarantees safe shutdown state during VDD1 loss in motor control fault handling. |
| CMTI | 50 kV/μs (min) - rejects fast common-mode transients from IGBT/SiC switching noise in traction inverters. |
Pinout & Package
Narrow-body SOIC-16 (NB SOIC-16) package, RoHS-compliant, JEDEC-standard 260 °C peak reflow profile.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Input-side supply | Power for input logic and transmitter; must be ≥2.375 V to exit UVLO and enable channel operation. |
| GND1 | Input-side ground | Reference for A1–A5 inputs and EN1; requires local 0.1 μF bypass capacitor to suppress switching noise. |
| A1–A3 | Input channels | Digital inputs referenced to VDD1/GND1; Schmitt-trigger thresholds (VT+ = 1.67 V, VT– = 1.23 V) reject >440 mV hysteresis noise. |
| EN1 | Enable for A4/A5 | Active-high control for outputs A4/A5; internal 2 μA pull-up allows floating if unused, but external tie-low recommended in noisy environments. |
| VDD2 | Output-side supply | Power for receiver logic and output drivers; independent UVLO ensures safe behavior when VDD1 fails but VDD2 remains active. |
| GND2 | Output-side ground | Reference for B1–B3 outputs and EN2; galvanically isolated from GND1 - defines the isolation barrier boundary. |
| B1–B3 | Output channels | CMOS outputs with 50 Ω (typ) impedance; drive 15 pF loads with 2.5 ns rise/fall times at 150 Mbps. |
| EN2 | Enable for B1–B3 | Active-high control for outputs B1–B3; enables independent disable of feedback path while retaining command path active. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation | Eliminates LED aging and temperature drift; maintains stable timing (<2.5 ns channel skew) over –40 to +125 °C life cycle. |
| Tri-state outputs with EN | EN1/EN2 allow dynamic bus contention avoidance - e.g., disable B1–B3 during ADC sampling to prevent backfeed into isolated sensor interface. |
| Selectable fail-safe mode | Low-default (B-suffix) ensures gate drivers de-assert during primary-side power loss - meets ASIL-B functional safety requirements. |
| Ultra-low power at 100 Mbps | 11.7 mA (typ) on VDD1 + 15.0 mA (typ) on VDD2 at 100 Mbps - reduces thermal load in sealed EV battery enclosures. |
| AEC-Q100 qualified | Automotive-grade process flow, PPAP documentation, IMDS/CAMDS compliance - validated for 15-year field life in HEV/EV powertrain systems. |
Applications
| Battery Management System (BMS) | Traction Inverter Control |
|---|---|
|
Use Scenario: Isolating cell voltage measurement ADC outputs and pack contactor control signals in 400–800 V EV battery packs. IC Role / Device Role / Timing Role: SI8652AB-AS1 transmits isolated analog front-end data (A1–A3) and receives isolated contactor enable commands (B1–B3) across the main HV/LV barrier. Use Value: 2.5 kVRMS rating and 50 kV/μs CMTI ensure accurate voltage readings during high-dV/dt switching events; fail-safe low default prevents unintended contactor closure during MCU reset. |
Use Scenario: Providing isolated gate drive enable signals and current-sense feedback to SiC half-bridge modules in electric vehicle traction inverters. IC Role / Device Role / Timing Role: SI8652AB-AS1 routes PWM enable (A1–A3) to isolated gate drivers and returns desaturation fault signals (B1–B3) to the MCU across the isolation barrier. Use Value: 8 ns propagation delay and <2.5 ns channel skew synchronize gate timing across phases; tri-state EN2 allows safe fault-induced shutdown without disrupting other phase controls. |
| On-Board Charger (OBC) | Industrial Motor Drive |
|
Use Scenario: Isolating digital control signals between AC/DC PFC stage and DC/DC LLC stage in bi-directional OBCs for plug-in hybrids. IC Role / Device Role / Timing Role: SI8652AB-AS1 carries interleaved PFC enable commands (A1–A3) and isolated voltage/current telemetry (B1–B3) across the 600 V isolation barrier. Use Value: 150 Mbps capability supports high-resolution telemetry streaming; automotive qualification ensures reliability under continuous 105 °C ambient in engine bay-mounted OBCs. |
Use Scenario: Isolating encoder position feedback and PWM command signals in servo drives for robotic arms and CNC machines. IC Role / Device Role / Timing Role: SI8652AB-AS1 forwards motion controller commands (A1–A3) to isolated gate drivers and returns quadrature encoder A/B/Z signals (B1–B3) to the controller. Use Value: Schmitt-trigger inputs reject EMI from nearby VFDs; 3.3 V/5 V dual-supply compatibility simplifies integration with legacy 5 V PLCs and modern 3.3 V FPGAs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI8652BB-AS1 | Same pinout, package, and channel count; differs only in fail-safe default output state (low vs. high - BB = low, EB = high). | Used where system-level fault response requires default-high outputs (e.g., active-high enable for safety relays). | Select SI8652BB-AS1 only if hardware design relies on high-default behavior; SI8652AB-AS1 is not electrically substitutable due to opposite fail-safe polarity. |
| ADUM141DARWZ | 4-channel, 150 Mbps, 2.5 kVRMS, SOIC-16; lacks dual enable inputs and automotive qualification (AEC-Q100 not claimed). | Suitable for non-automotive industrial automation where single-enable control suffices and extended temperature range is not required. | Choose ADUM141DARWZ only for cost-sensitive industrial designs without automotive lifecycle or PPAP requirements; no pin compatibility with SI8652AB-AS1. |
Compared with SI8652BB-AS1, SI8652AB-AS1 provides identical timing, power, and isolation performance but enforces a low-default output state critical for fail-safe shutdown in battery disconnect circuits; versus ADUM141DARWZ, it adds automotive qualification, dual independent enables, and guaranteed –40 to +125 °C operation - making it the sole choice for ASIL-B compliant EV power systems.
Availability
SI8652AB-AS1 is available at Aetrix Electronics and suitable for battery management systems, traction inverters, on-board chargers, and industrial motor drives requiring stable component supply across automotive and industrial production lifecycles.
Supply support for SI8652AB-AS1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for wireless, automotive, and industrial markets.
The Si865x family was designed specifically for high-reliability, high-speed digital isolation in automotive powertrain and charging systems - delivering AEC-Q100 qualified performance, reinforced insulation, and ultra-low power consumption in compact SOIC packages.
FAQ
What is the isolation rating and safety certification status of SI8652AB-AS1?
SI8652AB-AS1 is rated for 2.5 kVRMS isolation and certified to UL 1577, VDE 0884-10, CSA Component Notice 5A, and CQC GB4943.1 standards. It meets reinforced insulation requirements per IEC 62368-1 and IEC 60601-1, and is approved for use in automotive battery management and traction inverter systems requiring functional safety compliance.
Does SI8652AB-AS1 require external components for stable operation?
Yes - SI8652AB-AS1 requires a 0.1 μF ceramic bypass capacitor between VDD1 and GND1, and another between VDD2 and GND2, placed as close as possible to the pins. No pull-up/down resistors are needed on inputs due to integrated Schmitt triggers, but EN1/EN2 should be externally tied low in noisy environments per Skyworks recommendation.
How does the fail-safe mode function in SI8652AB-AS1 during power loss?
In SI8652AB-AS1 (B-suffix), when VDD1 is unpowered but VDD2 remains active, outputs B1–B3 default to logic low within 1 μs after VDD2 powers up - ensuring gate drivers remain off and contactors stay open during primary-side brownout. This behavior is hardwired by internal pull-downs and requires no configuration.
What is the maximum achievable data rate and associated timing budget for SI8652AB-AS1?
SI8652AB-AS1 supports up to 150 Mbps with a minimum pulse width of 5 ns and typical propagation delay of 8 ns. At 100 Mbps, pulse width distortion is ≤4.5 ns and channel-to-channel skew is ≤2.5 ns - enabling precise synchronization in multi-phase inverter control loops where timing margins are sub-10 ns.
Is SI8652AB-AS1 pin-compatible with other Si865x variants in SOIC-16 package?
Yes - SI8652AB-AS1 shares identical pinout and footprint with all Si8652x variants in narrow-body SOIC-16 (e.g., SI8652BB-AS1, SI8652BC-AS1), including same VDD1/GND1/A1–A3/EN1/VDD2/GND2/B1–B3/EN2 arrangement. Channel count and fail-safe default differ by part number, but PCB layout is fully reusable across the Si8652x-AS1 series.
SI8652AB-AS1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- No
- Number of Channels:
- 5
- Inputs - Side 1/Side 2:
- 3/2
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.375V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8652AB-AS1 FAQ
1.How can I place an order for SI8652AB-AS1 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8652AB-AS1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8652AB-AS1 reliable?
The price and inventory of SI8652AB-AS1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8652AB-AS1 is usually 5 days.
3.What payment methods are accepted for SI8652AB-AS1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8652AB-AS1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8652AB-AS1?
SI8652AB-AS1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8652AB-AS1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8652AB-AS1?
For technical support, including SI8652AB-AS1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8652AB-AS1 requirements.
6.How does Aetrix verify that SI8652AB-AS1 is sourced from the original manufacturer or authorized distributors?
All SI8652AB-AS1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8652AB-AS1 meets industry standards.
7.What is the process for return or replacement of SI8652AB-AS1?
All SI8652AB-AS1 units undergo pre-shipment inspection (PSI). If there is an issue with SI8652AB-AS1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8652AB-AS1 part is unused and in its original packaging.
Return procedure for SI8652AB-AS1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8652AB-AS1 Tags
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ISO1212DBQR
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ISO6721BDR
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SI8710AC-B-ISR
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