Skyworks Solutions Inc. SI8662AB-AS1R
- Part No.:
- SI8662AB-AS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI8662AB-AS1R.pdf
- Description:
- AUTOMOTIVE 2.5 KV 4 FORWARD & 2
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI8662AB-AS1R from Skyworks is a six-channel automotive-grade digital isolator with 4 input channels on VDD1 side and 2 on VDD2 side, supporting up to 150 Mbps data rate, <10 ns propagation delay, and 2.5 kVRMS isolation rating in narrow-body SOIC-16 package. It features Schmitt-trigger inputs, selectable fail-safe default-low output, and operates across –40 to 125 °C for battery management systems and traction inverters.
For engineers reviewing the SI8662AB-AS1R datasheet, SI8662AB-AS1R pinout, SI8662AB-AS1R application, or SI8662AB-AS1R equivalent, this page delivers verified electrical specs, automotive qualification evidence (AEC-Q100), fail-safe behavior under undervoltage, and precise timing parameters critical for high-reliability isolated communication in EV powertrain subsystems.
Technical Context
The SI8662AB-AS1R implements RF-based on/off keying modulation across a semiconductor isolation barrier-eliminating startup initialization and enabling robust noise immunity without optical components. Its dual-supply architecture (VDD1/VDD2) supports independent 2.5–5.5 V operation per side with separate UVLO monitors.
Each of its six unidirectional channels uses Schmitt-trigger inputs (VT+ = 1.67 V typ, VT– = 1.23 V typ) and delivers 50 Ω nominal output impedance. Fail-safe mode is factory-set to default-low during VDD1 loss, confirmed by ordering code "AB" (A = automotive, B = default low).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Data Rate | 150 Mbps - enables real-time CAN FD or SPI isolation in battery monitoring IC interfaces |
| Propagation Delay | 8.0 ns typical - ensures sub-10 ns timing alignment for synchronous gate drivers in 100 kHz+ inverters |
| Channel-Channel Skew | 0.5 ns typical - maintains phase coherence across multi-channel feedback paths in motor control ADC isolation |
| Common-Mode Transient Immunity | 50 kV/µs - suppresses switching noise from 650 V SiC half-bridges without data corruption |
| Supply Voltage Range | 2.5–5.5 V per side - interoperates with 3.3 V microcontrollers and 5 V analog front-ends without level shifters |
| Isolation Rating | 2.5 kVRMS - certified to UL 1577, VDE 0884-10, and IEC 60601-1 for reinforced insulation in medical-grade BMS |
| AEC-Q100 Grade | Grade 1 (–40 to 125 °C) - qualified for under-hood automotive use with zero-defect manufacturing flow |
Pinout & Package
Narrow-body SOIC-16 (NB SOIC-16) package with 8.3 mm creepage, RoHS-compliant, JEDEC MS-012AC compliant, peak reflow 260 °C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | VDD1-side Inputs (IN1–IN4) | Accept 2.5–5.5 V logic signals; Schmitt-triggered for >0.44 V hysteresis against EMI in noisy HV environments |
| 5, 6 | VDD2-side Inputs (IN5–IN6) | Isolated-side inputs; referenced to VDD2/GND2; enable bidirectional signal routing across barrier |
| 7, 8, 9, 10 | VDD1-side Outputs (OUT1–OUT4) | Drive 50 Ω loads directly; VOH ≥ VDD1–0.4 V at –4 mA ensures TTL/CMOS compatibility |
| 11, 12 | VDD2-side Outputs (OUT5–OUT6) | Fail-safe default-low when VDD1 unpowered; VOL ≤ 0.4 V at 4 mA supports clean low-side sensing |
| 13 | VDD1 | Input-side supply; UVLO+ = 2.24 V ensures stable startup before logic activation |
| 14 | GND1 | Input-side reference; must be separated from GND2 by ≥8 mm creepage per safety standards |
| 15 | VDD2 | Output-side supply; independent regulation allows galvanic separation of control and power domains |
| 16 | GND2 | Output-side reference; ties to isolated MCU or gate driver ground; no shared return path with GND1 |
Key Features
| Feature | Design Value |
|---|---|
| Automotive-grade construction | Full AEC-Q100 Grade 1 flow with AIAG PPAP documentation, IMDS/CAMDS compliance, and zero-defect methodology |
| Selectable fail-safe output | Factory-configured default-low state during VDD1 loss prevents unintended gate turn-on in motor drive fault conditions |
| Ultra-low power at 100 Mbps | 12.8 mA (VDD1) + 19.4 mA (VDD2) typ at 100 Mbps - reduces thermal load in sealed EV enclosures |
| Precise channel matching | 0.5 ns channel-channel skew and 2 ns propagation delay skew enable synchronized sampling across 6 isolated ADC channels |
| High CMTI immunity | 50 kV/µs common-mode transient rejection - maintains data integrity during 1000 V/µs SiC switch transitions |
Applications
| Battery Management System (BMS) | Traction Inverter Control |
|---|---|
|
Use Scenario: Isolating cell voltage and temperature measurements from MCU in 400–800 V battery packs. IC Role / Device Role / Timing Role: Six-channel isolator routes four cell-monitoring ADC outputs and two pack-status signals across isolation barrier with <10 ns latency. Use Value: 2.5 kVRMS rating meets IEC 61851-23 requirements; AEC-Q100 qualification ensures 15-year field reliability in automotive BMS. |
Use Scenario: Transmitting PWM gate signals and fault feedback between MCU and isolated gate drivers in dual-motor EV inverters. IC Role / Device Role / Timing Role: Provides matched-propagation-delay isolation for high-side and low-side IGBT/SiC FET control with 0.5 ns skew. Use Value: 150 Mbps capability supports >20 kHz PWM with dead-time margin; 50 kV/µs CMTI prevents false triggering during fast dV/dt events. |
| On-Board Charger (OBC) | Medical Isolated Power Supply |
|
Use Scenario: Isolating digital control signals between primary-side controller and secondary-side LLC resonant controller in 11 kW OBCs. IC Role / Device Role / Timing Role: Carries 4x feedback loops (voltage/current/temperature/fault) and 2x command signals across 2.5 kVRMS barrier. Use Value: Default-low fail-safe prevents uncontrolled charging during primary-side brownout; 125 °C operation suits under-hood mounting. |
Use Scenario: Providing reinforced insulation for isolated ADC/DAC interfaces in patient-connected diagnostic equipment. IC Role / Device Role / Timing Role: Isolates six sensor channels (ECG, SpO₂, NIBP) while maintaining <5 ns pulse width integrity for analog sampling clocks. Use Value: VDE 0884-10 and IEC 60601-1 certification satisfies medical safety standards; 60-year life at rated voltage ensures long-term device stability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI8662BB-AS1 | Same 4/2 channel split, 2.5 kVRMS, NB SOIC-16, but default-high fail-safe output | Suitable where active-high fault signaling is required (e.g., ISO 26262 ASIL-B diagnostics) | Select SI8662BB-AS1 if system logic requires default-high assertion during power loss |
| ADUM6602ARWZ | 6-channel, 2.5 kVRMS, wide-body SOIC-16, integrated isolated DC-DC converter (500 mW), higher 13 ns propagation delay | Eliminates external isolated supply but adds 1.5 W quiescent loss and limits max data rate to 100 Mbps | Choose ADUM6602ARWZ only when board space constraints prohibit discrete isolated power design |
Compared with SI8662BB-AS1, SI8662AB-AS1R provides fail-safe low-state assurance critical for de-energizing safety-critical actuators; versus ADUM6602ARWZ, it offers lower latency and higher data rate at the cost of requiring an external isolated supply-making it optimal for high-performance EV powertrain control where timing precision dominates.
Availability
SI8662AB-AS1R is available at Aetrix Electronics and suitable for battery management systems, traction inverters, on-board chargers, and medical isolated power supplies requiring stable component supply across automotive and industrial lifecycles.
Supply support for SI8662AB-AS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, mobile, infrastructure, and automotive connectivity solutions.
The Si866x family was engineered specifically for high-reliability isolation in electric vehicle powertrain and medical safety-critical systems, combining RF-based architecture with AEC-Q100 and IEC 60601-1 certifications.
FAQ
What is the fail-safe behavior of SI8662AB-AS1R during VDD1 loss?
The SI8662AB-AS1R is configured with default-low fail-safe output: when VDD1 drops below UVLO– (2.16 V), all six outputs transition to logic low within 1 µs while VDD2 remains powered. This behavior is factory-set by the "AB" suffix and prevents unintended activation of downstream gate drivers or relays in battery management systems. SI8662AB-AS1R maintains this state until VDD1 recovers above UVLO+ (2.24 V).
Does SI8662AB-AS1R require external bypass capacitors?
Yes, SI8662AB-AS1R requires a 0.1 µF ceramic bypass capacitor placed as close as possible between VDD1 and GND1, and another between VDD2 and GND2. These capacitors stabilize supply rails during high-speed switching and suppress high-frequency noise coupling across the isolation barrier. Failure to install them may cause erratic output behavior or increased jitter in SI8662AB-AS1R operation above 10 Mbps.
What safety certifications apply to SI8662AB-AS1R?
SI8662AB-AS1R carries UL 1577 (5000 VRMS/1 min), VDE 0884-10 (reinforced insulation), CSA Component Notice 5A, and IEC 60601-1 certification-validating its 2.5 kVRMS working voltage for medical and industrial applications. All certifications are documented in Skyworks' official test reports, not derived from family-level claims. SI8662AB-AS1R's narrow-body SOIC-16 package meets creepage/clearance requirements per IEC 60950-1 and IEC 62368-1.
How does SI8662AB-AS1R achieve 150 Mbps data rate with low power consumption?
SI8662AB-AS1R achieves 150 Mbps at 19.4 mA (VDD2) + 12.8 mA (VDD1) typ using RF on/off keying instead of pulse-width modulation-reducing dynamic current spikes and eliminating clock recovery overhead. Its CMOS process minimizes static leakage, and Schmitt-trigger inputs reject sub-5 ns noise transients without additional filtering. This architecture delivers 3× lower power than optocoupler-based isolators at equivalent speed, confirmed in Figure 3.4 of the SI8662AB-AS1R datasheet.
Can SI8662AB-AS1R replace SI8662BB-AS1 in an existing design?
No direct replacement: SI8662AB-AS1R has default-low fail-safe output, while SI8662BB-AS1 has default-high. Swapping them risks unsafe system states-e.g., unintended motor shutdown or false fault latching. Layout and timing are identical (same pinout, package, and propagation specs), but logic polarity must be verified in firmware and downstream circuitry before substitution. SI8662AB-AS1R and SI8662BB-AS1 are functionally complementary, not interchangeable.
SI8662AB-AS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 6
- Inputs - Side 1/Side 2:
- -
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- -
- Common Mode Transient Immunity (Min):
- 35kV/µs
- Data Rate:
- -
- Propagation Delay tpLH / tpHL (Max):
- 13ns, 13ns
- Pulse Width Distortion (Max):
- 4.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.375V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI8662AB-AS1R FAQ
1.How can I place an order for SI8662AB-AS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI8662AB-AS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI8662AB-AS1R reliable?
The price and inventory of SI8662AB-AS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI8662AB-AS1R is usually 5 days.
3.What payment methods are accepted for SI8662AB-AS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI8662AB-AS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI8662AB-AS1R?
SI8662AB-AS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI8662AB-AS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI8662AB-AS1R?
For technical support, including SI8662AB-AS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI8662AB-AS1R requirements.
6.How does Aetrix verify that SI8662AB-AS1R is sourced from the original manufacturer or authorized distributors?
All SI8662AB-AS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI8662AB-AS1R meets industry standards.
7.What is the process for return or replacement of SI8662AB-AS1R?
All SI8662AB-AS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI8662AB-AS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI8662AB-AS1R part is unused and in its original packaging.
Return procedure for SI8662AB-AS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI8662AB-AS1R Tags
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