Skyworks Solutions Inc. SI86S621EE-AS4
- Part No.:
- SI86S621EE-AS4
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 8-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI86S621EE-AS4.pdf
- Description:
- 6.0 KVRMS ISOLATOR, 2 UNIDIRECTI
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI86S621EE-AS4 from Skyworks Solutions is a dual-channel, high-speed digital isolator with reinforced 6000 VRMS isolation, 150 Mbps data rate, and AEC-Q100 qualification for automotive systems. It features Schmitt-trigger inputs, selectable fail-safe output (default low), and operates across 2.25–5.5 V supplies. Used in battery management systems and traction inverters where galvanic separation and noise immunity are critical.
For engineers reviewing the SI86S621EE-AS4 datasheet, SI86S621EE-AS4 pinout, SI86S621EE-AS4 application, or SI86S621EE-AS4 equivalent, this page delivers verified specifications, validated pin functions, automotive-grade safety certifications (UL, VDE, CSA, CQC), and real-world timing behavior-including 9 ns typical propagation delay and 100 kV/µs CMTI-enabling robust isolated signal transmission in high-noise power electronics.
Technical Context
The SI86S621EE-AS4 implements RF-based on/off keying across a semiconductor isolation barrier, eliminating startup initialization and enabling deterministic operation without clock recovery or handshake protocols. Its architecture supports independent UVLO and reset monitoring per side (VDD1/VDD2), with RSTB thresholds at ~1.7 V and UVLO hysteresis of 131 mV.
It integrates input deglitch filters (36 ns) to suppress sub-pulse noise, delivers precise timing (3.5 ns typical pulse width distortion), and maintains stable output impedance (~50 Ω) for controlled-impedance PCB routing. The device supports fail-safe default-low operation via ordering option, confirmed by Table 2 logic states under unpowered conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | 150 Mbps - enables high-bandwidth communication in motor control gate drivers and isolated ADC interfaces |
| Propagation delay | 9 ns typical - ensures tight timing alignment between isolated control and feedback paths in inverters |
| Isolation rating | 6000 VRMS - meets reinforced insulation requirements for 1500 VRMS working voltage per IEC 60747-17 |
| CMTI | 100 kV/µs minimum - rejects fast common-mode transients in high-dV/dt environments like SiC/GaN power stages |
| Supply range | 2.25–5.5 V - allows direct interface with 3.3 V microcontrollers and 5 V analog front-ends without level shifting |
| Operating temperature | –40 to +125 °C - qualified for under-hood automotive applications including onboard chargers and BMS |
| Fail-safe mode | Default low output - ensures safe shutdown state during VDD1 loss in safety-critical power control loops |
Pinout & Package
SI86S621EE-AS4 uses an NB SOIC-8 package (3.9 mm creepage/clearance) with 8-pin layout optimized for reinforced isolation. Side A (pins 1–4) and Side B (pins 5–8) are physically separated by the internal isolation barrier.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Side A supply | Power source for input-side logic; must be bypassed with 0.1 µF + 10 µF capacitors near pin |
| GND1 | Side A ground | Reference return for Side A signals; separate from GND2 to maintain isolation integrity |
| A1, A2 | Side A digital inputs | Dual-channel isolated inputs with Schmitt-trigger thresholds and 36 ns deglitch filtering |
| NC | No connect | Pin 3 is internally unconnected; must remain floating and unpopulated on PCB |
| GND2 | Side B ground | Reference return for output-side logic; galvanically isolated from GND1 |
| B1, B2 | Side B digital outputs | Dual-channel CMOS outputs with ~50 Ω drive impedance; default-low fail-safe behavior |
| VDD2 | Side B supply | Power source for output-side logic; independent of VDD1, enabling asymmetric supply configurations |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation architecture | Eliminates startup initialization delay and avoids optical degradation mechanisms found in optocouplers |
| Selectable fail-safe output | Ordering option fixes default output state to logic low during VDD1 loss-critical for safe power stage disable |
| 36 ns input deglitch filter | Rejects narrow noise pulses below 36 ns width, preventing false triggering in EMI-heavy motor drive environments |
| 100 kV/µs CMTI | Ensures reliable data transmission across isolation barrier despite rapid voltage transients in 800 V EV inverters |
| AEC-Q100 Grade 1 qualification | Validated for automotive use up to +125 °C ambient, with PPAP documentation and IMDS/CAMDS support |
Applications
| Motor Control Gate Driver Isolation | Battery Management System (BMS) Cell Monitoring |
|---|---|
|
Use Scenario: Isolating PWM signals from MCU to high-side IGBT/SiC gate drivers in traction inverters. IC Role / Device Role / Timing Role: Dual-channel isolator transmitting complementary gate drive signals with matched propagation delay (<3 ns skew) and fail-safe low output on fault. Use Value: Prevents shoot-through during power-up/failure by enforcing default-low gate state and maintaining <9 ns channel-to-channel skew for precise dead-time control. |
Use Scenario: Isolating cell voltage measurement data from high-voltage battery stack to MCU in EV BMS. IC Role / Device Role / Timing Role: Transmitting isolated analog-to-digital converter (ADC) serial data across 400–800 V potential difference with 100 kV/µs transient immunity. Use Value: Enables accurate, noise-immune cell voltage sampling in high-dV/dt battery packs while meeting reinforced insulation requirements per IEC 60601-1 (2 MOPP). |
| Onboard Charger (OBC) Feedback Loop | Traction Inverter Current Sensing Interface |
|
Use Scenario: Isolating voltage feedback from secondary-side error amplifier to primary-side controller in isolated DC-DC converters within OBCs. IC Role / Device Role / Timing Role: High-speed digital isolator conveying error correction signals with 150 Mbps capability and <4.5 ns pulse width distortion. Use Value: Supports fast-loop compensation in resonant LLC topologies by preserving signal fidelity and minimizing phase lag in feedback path. |
Use Scenario: Isolating current-sense amplifier output signals from shunt-based sensing circuits in inverter phase legs. IC Role / Device Role / Timing Role: Dual-channel isolator carrying differential current sense data with precise timing alignment and 6000 VRMS withstand capability. Use Value: Maintains accuracy of real-time current monitoring under high common-mode transients (e.g., during IGBT switching), ensuring overcurrent protection responsiveness. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM121N0BRZ-RL7 | Single-channel, 150 Mbps, 3000 VRMS isolation, no deglitch filter, non-automotive grade | Lacks fail-safe default-low mode and AEC-Q100 qualification; unsuitable for automotive BMS or traction inverters | Consider only for cost-sensitive industrial automation where reinforced isolation and automotive qualification are not required |
| ISO7721DWR | Dual-channel, 100 Mbps, 5000 VRMS, no deglitch filter, failsafe configurable via external pins | Lower CMTI (85 kV/µs), no integrated 36 ns deglitch, requires external pull-down for default-low behavior | Acceptable for industrial SMPS where 100 Mbps suffices and board space permits external fail-safe circuitry |
Compared with ADUM121N0BRZ-RL7 and ISO7721DWR, the SI86S621EE-AS4 provides higher isolation (6000 VRMS), guaranteed 36 ns input filtering, and factory-configured default-low fail-safe behavior-reducing design risk and component count in automotive-grade power systems requiring functional safety compliance.
Availability
SI86S621EE-AS4 is available at Aetrix Electronics and suitable for battery management systems, traction inverters, and onboard chargers requiring stable component supply, long-term lifecycle support, and automotive-grade traceability.
Supply support for SI86S621EE-AS4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si86S6xx family is designed specifically for high-reliability automotive and industrial power electronics, delivering reinforced isolation, AEC-Q100 qualification, and RF-based timing precision for next-generation EV and renewable energy systems.
FAQ
What is the isolation voltage rating of the SI86S621EE-AS4?
The SI86S621EE-AS4 is rated for 6000 VRMS isolation per UL 1577 for 1 minute, with reinforced insulation certification per IEC 60747-17 (2121 Vpeak). This enables safe operation in 1500 VRMS working voltage applications such as EV traction inverters and medical power supplies, and is validated for the NB SOIC-8 package used in SI86S621EE-AS4.
Does the SI86S621EE-AS4 require external components for stable operation?
Yes, the SI86S621EE-AS4 requires 0.1 µF and 10 µF bypass capacitors placed close to VDD1/GND1 and VDD2/GND2 pins. These capacitors stabilize supply rails and suppress high-frequency noise. External series resistors (50–300 Ω) on inputs/outputs are optional but recommended in highly noisy environments. No external pull-up/pull-down resistors are needed-the SI86S621EE-AS4 implements internal fail-safe default-low termination.
How does the fail-safe mode operate in the SI86S621EE-AS4?
The SI86S621EE-AS4 is ordered with factory-configured default-low fail-safe behavior. When VDD1 is unpowered (below 2.25 V), outputs B1 and B2 remain logic low as long as VDD2 is active. This is enforced by internal pulldown circuitry activated during undervoltage lockout, ensuring safe shutdown of downstream power stages. The behavior is defined in Table 2 of the datasheet and is intrinsic to the SI86S621EE-AS4 ordering option.
What is the maximum data rate supported by the SI86S621EE-AS4?
The SI86S621EE-AS4 supports up to 150 Mbps data rate under all operating conditions (VDD = 2.25–5.5 V, TA = –40 to +125 °C). This is specified in Tables 6–8 of the datasheet and applies to both channels simultaneously. The 150 Mbps capability enables high-fidelity transmission of fast PWM signals and serial ADC data in real-time motor control and battery monitoring applications using SI86S621EE-AS4.
Is the SI86S621EE-AS4 qualified for automotive applications?
Yes, the SI86S621EE-AS4 is AEC-Q100 Grade 1 qualified (–40 to +125 °C), with AIAG-compliant PPAP documentation, IMDS and CAMDS listing support, and automotive-specific manufacturing flows. It is explicitly listed for automotive applications including onboard chargers, battery management systems, charging stations, and traction inverters in the datasheet's "Automotive Applications" section.
SI86S621EE-AS4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si86S62x
- Package/Case:
- 8-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 2
- Inputs - Side 1/Side 2:
- 1/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 6000Vrms
- Common Mode Transient Immunity (Min):
- 100kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13.5ns, 13.5ns
- Pulse Width Distortion (Max):
- 2.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SSO
SI86S621EE-AS4 FAQ
1.How can I place an order for SI86S621EE-AS4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S621EE-AS4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S621EE-AS4 reliable?
The price and inventory of SI86S621EE-AS4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S621EE-AS4 is usually 5 days.
3.What payment methods are accepted for SI86S621EE-AS4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S621EE-AS4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S621EE-AS4?
SI86S621EE-AS4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S621EE-AS4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S621EE-AS4?
For technical support, including SI86S621EE-AS4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S621EE-AS4 requirements.
6.How does Aetrix verify that SI86S621EE-AS4 is sourced from the original manufacturer or authorized distributors?
All SI86S621EE-AS4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S621EE-AS4 meets industry standards.
7.What is the process for return or replacement of SI86S621EE-AS4?
All SI86S621EE-AS4 units undergo pre-shipment inspection (PSI). If there is an issue with SI86S621EE-AS4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S621EE-AS4 part is unused and in its original packaging.
Return procedure for SI86S621EE-AS4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S621EE-AS4 Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
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