Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Isolators > Digital Isolators

Skyworks Solutions Inc. SI86S621FE-AS4

Name: SI86S621FE-AS4
Brand: Skyworks Solutions Inc.
SKU: SI86S621FE-AS4
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: SI86S621FE-AS4

Manufacturer:: Skyworks Solutions Inc.

Category:: Digital Isolators

Package:: 8-SOIC (0.295", 7.50mm Width)

Datasheet:: SI86S621FE-AS4.pdf

Description:: 6.0 KVRMS ISOLATOR, 2 UNIDIRECTI

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:2,412

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

SI86S621FE-AS4 from Skyworks Solutions is a dual-channel, high-speed digital isolator with reinforced 6000 VRMS isolation, 150 Mbps data rate, and AEC-Q100 qualification for automotive systems. It features Schmitt-trigger + CMOS inputs, selectable fail-safe output (default low), and operates across –40 to +125 °C in NB SOIC-8 package. Used in battery management systems and traction inverters where galvanic separation and noise immunity are critical.

For engineers reviewing the SI86S621FE-AS4 datasheet, SI86S621FE-AS4 pinout, SI86S621FE-AS4 application, or SI86S621FE-AS4 equivalent, key selection criteria include its 10 ns typical propagation delay, 100 kV/µs CMTI, 2.25–5.5 V dual-supply operation, fail-safe default-low configuration, and IEC 60747-17 reinforced insulation rating for functional safety-critical subsystems.

Technical Context

The SI86S621FE-AS4 implements RF-based on/off keying across a semiconductor isolation barrier-eliminating start-up initialization and enabling robust noise immunity without optical degradation. Its architecture delivers precise timing (3.5 ns pulse width distortion) and supports independent UVLO and reset monitoring per side (VDD1/VDD2), with RSTB thresholds at ~1.7 V.

It integrates input deglitch filters (36 ns) to suppress transient noise, uses internal 50 Ω output impedance for controlled-impedance PCB routing, and maintains fail-safe behavior during supply loss via configurable pull-downs on both sides-ensuring deterministic low-state outputs when VDD1 is unpowered but VDD2 remains active.

Key Specifications

Parameter	Value and Actual Design Meaning
Data rate	150 Mbps - supports high-speed serial interfaces like SPI, RS-485 transceiver control, and isolated ADC/DAC clock domains.
Propagation delay	5–14 ns (typ. 10 ns) - enables tight timing budgets in motor gate driver feedback loops and real-time BMS cell monitoring.
CMTI	100 kV/µs - prevents false triggering in high-dV/dt environments such as power inverters and onboard chargers.
Isolation voltage	6000 VRMS (1 min) - meets reinforced insulation requirements per UL 1577 and VDE 60747-17 for 600 VRMS working voltage systems.
Supply range	2.25–5.5 V per side - allows interoperability with 3.3 V microcontrollers and 5 V analog front-ends without level shifters.
Fail-safe mode	Default low output - ensures safe shutdown state in battery disconnect circuits and fault-handling logic during primary-side power loss.
Operating temperature	–40 to +125 °C - qualified for under-hood automotive applications including traction inverters and OBCs.
Package	NB SOIC-8 - provides 8.0 mm creepage/clearance for 600 VRMS working voltage compliance in compact layouts.

Pinout & Package

NB SOIC-8 package with 8-pin wide-body layout optimized for 6000 VRMS isolation and 8.0 mm creepage/clearance. Pin 1 marked by dot; pins 1–4 on Side A (input), pins 5–8 on Side B (output), separated by internal isolation barrier.

Pin/Terminal	Circuit Role	Design Meaning
VDD1	Side A power supply	Supplies input-side logic; must be bypassed with 0.1 µF + 10 µF capacitors near pin.
GND1	Side A ground	Reference for A1/A2 inputs; requires separate ground plane from GND2 to maintain isolation integrity.
A1, A2	Side A digital inputs	Dual-channel data inputs with Schmitt-trigger + CMOS thresholds; tolerate 36 ns glitches.
NC	No connect	Pin 3 is internally unused; must remain unconnected per datasheet.
GND2	Side B ground	Reference for B1/B2 outputs; electrically isolated from GND1; routed on separate PCB layer.
B1, B2	Side B digital outputs	Fail-safe default-low outputs; 50 Ω nominal impedance for controlled-impedance trace termination.
VDD2	Side B power supply	Supplies output-side logic; independent of VDD1; enables asymmetric supply configurations.

Key Features

Feature	Design Value
RF-based isolation architecture	Eliminates start-up initialization delay and optocoupler aging; achieves stable 10 ns propagation delay over full temperature range.
Selectably fail-safe output (default low)	Guarantees logic-low output during VDD1 loss while VDD2 remains powered-critical for safe shutdown in BMS fault detection paths.
36 ns input deglitch filter	Rejects EFT/burst noise below 36 ns width, preventing spurious toggling in noisy motor drive or charger environments.
AEC-Q100 Grade 1 qualification	Validated for automotive use up to +125 °C ambient; includes PPAP documentation support and IMDS/CAMDS compliance.
Reinforced IEC 60747-17 rating	Enables use in medical (60601-1) and industrial (62368-1) safety-critical systems requiring two MOPP or reinforced insulation.

Applications

Battery Management System (BMS)	Traction Inverter Control
Use Scenario: Isolating cell voltage monitoring ICs from MCU in high-voltage EV battery packs. IC Role / Device Role / Timing Role: Dual-channel isolator transmitting ADC conversion results and fault signals across 400–800 V DC bus. Use Value: 100 kV/µs CMTI prevents misreads during switching transients; default-low fail-safe ensures open-wire fault detection triggers safe discharge.	Use Scenario: Transmitting PWM gate drive signals from controller to isolated IGBT/SiC half-bridge drivers. IC Role / Device Role / Timing Role: High-speed, low-skew isolator delivering synchronized high-side/low-side enable signals with <3 ns channel skew. Use Value: 150 Mbps data rate and 3.5 ns pulse width distortion preserve dead-time integrity; NB SOIC-8 creepage meets 600 VRMS system requirements.
Onboard Charger (OBC) Feedback Loop	Industrial Isolated ADC Interface
Use Scenario: Isolating secondary-side voltage/current sensing signals to primary-side digital controller in bidirectional AC/DC converters. IC Role / Device Role / Timing Role: Dual-channel isolator carrying isolated analog feedback (via sigma-delta modulator) and status flags. Use Value: 10 ns propagation delay enables fast-loop response; 6000 VRMS isolation withstands repeated surge events per IEC 61000-4-5.	Use Scenario: Interfacing isolated 24-bit delta-sigma ADCs (e.g., ADS131M04) to host MCU in PLC analog input modules. IC Role / Device Role / Timing Role: Galvanically separating SPI clock/data lines between ADC and controller across 2500 V RMS field-side barriers. Use Value: Schmitt-trigger inputs reject common-mode noise on long sensor cables; 2.25–5.5 V supply range matches both 3.3 V ADC and 5 V MCU rails.

Battery Management System (BMS)

Traction Inverter Control

Use Scenario: Isolating cell voltage monitoring ICs from MCU in high-voltage EV battery packs.

IC Role / Device Role / Timing Role: Dual-channel isolator transmitting ADC conversion results and fault signals across 400–800 V DC bus.

Use Value: 100 kV/µs CMTI prevents misreads during switching transients; default-low fail-safe ensures open-wire fault detection triggers safe discharge.

Use Scenario: Transmitting PWM gate drive signals from controller to isolated IGBT/SiC half-bridge drivers.

IC Role / Device Role / Timing Role: High-speed, low-skew isolator delivering synchronized high-side/low-side enable signals with <3 ns channel skew.

Use Value: 150 Mbps data rate and 3.5 ns pulse width distortion preserve dead-time integrity; NB SOIC-8 creepage meets 600 VRMS system requirements.

Onboard Charger (OBC) Feedback Loop

Industrial Isolated ADC Interface

Use Scenario: Isolating secondary-side voltage/current sensing signals to primary-side digital controller in bidirectional AC/DC converters.

IC Role / Device Role / Timing Role: Dual-channel isolator carrying isolated analog feedback (via sigma-delta modulator) and status flags.

Use Value: 10 ns propagation delay enables fast-loop response; 6000 VRMS isolation withstands repeated surge events per IEC 61000-4-5.

Use Scenario: Interfacing isolated 24-bit delta-sigma ADCs (e.g., ADS131M04) to host MCU in PLC analog input modules.

IC Role / Device Role / Timing Role: Galvanically separating SPI clock/data lines between ADC and controller across 2500 V RMS field-side barriers.

Use Value: Schmitt-trigger inputs reject common-mode noise on long sensor cables; 2.25–5.5 V supply range matches both 3.3 V ADC and 5 V MCU rails.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel digital isolator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADUM220N0BRZ-RL7	5000 VRMS isolation, 150 Mbps, default-high fail-safe, SOIC-8 (narrow body)	Lacks AEC-Q100 qualification and 6000 VRMS rating; narrower creepage (3.9 mm) limits use in >400 VRMS systems	Choose for cost-sensitive industrial SPI isolation where 6000 VRMS and automotive qualification are not required.
ISO7721FDWR	5000 VRMS, 100 Mbps, default-low, SOIC-16 (wider footprint), no deglitch filter	Lower data rate and no 36 ns input filter; larger package increases board area; lacks IEC 60747-17 reinforced rating	Prefer for legacy TI-based designs needing pin-compatible replacement with basic isolation, not high-noise automotive environments.

Compared with ADUM220N0BRZ-RL7 and ISO7721FDWR, the SI86S621FE-AS4 uniquely combines 6000 VRMS reinforced isolation, AEC-Q100 Grade 1, 36 ns deglitching, and default-low fail-safe in an NB SOIC-8-making it the only option qualified for functional safety-critical automotive traction and charging subsystems.

Availability

SI86S621FE-AS4 is available at Aetrix Electronics and suitable for battery management systems, traction inverters, and onboard chargers requiring stable component supply, automotive-grade reliability, and reinforced safety certification.

Supply support for SI86S621FE-AS4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in high-performance analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.

The Si86S6xx family was designed specifically for automotive and industrial applications demanding high CMTI, reinforced safety certification, and fail-safe behavior-targeting BMS, OBC, and motor control systems operating at extended temperature ranges.

FAQ

What is the isolation voltage rating of the SI86S621FE-AS4?

The SI86S621FE-AS4 is rated for 6000 VRMS isolation per UL 1577 (1 minute) and carries reinforced insulation certification per VDE 60747-17 and CSA 62368-1. Its NB SOIC-8 package provides 8.0 mm creepage and clearance, supporting up to 1500 VRMS working voltage in accordance with IEC 60747-17 TDDB testing.

Does the SI86S621FE-AS4 require external start-up initialization?

No, the SI86S621FE-AS4 does not require external start-up initialization. Its RF-based modulation architecture enables immediate operation upon power application. Outputs stabilize within 300 µs after VDD1 and VDD2 exceed their UVLO thresholds (2.18 V typ.), with no firmware or configuration needed-unlike capacitor-coupled or transformer-based isolators.

What is the meaning of "FE" in SI86S621FE-AS4?

The "FE" suffix in SI86S621FE-AS4 denotes the fail-safe configuration: default-low output state during VDD1 loss while VDD2 remains powered. This is implemented via internal pull-down resistors on both A1/A2 inputs and B1/B2 outputs, ensuring deterministic low-level signaling in fault conditions-critical for BMS and inverter safety logic.

Can the SI86S621FE-AS4 operate with different supply voltages on each side?

Yes, the SI86S621FE-AS4 supports independent supply voltages on Side A (VDD1) and Side B (VDD2), each ranging from 2.25 V to 5.5 V. This enables interfacing between 3.3 V microcontrollers and 5 V analog circuitry without external level shifters, and maintains full timing specifications across all valid VDD combinations per datasheet Tables 6–8.

What safety certifications does the SI86S621FE-AS4 hold?

The SI86S621FE-AS4 holds pending certifications for UL 1577 (6000 VRMS), CSA 62368-1/60601-1, VDE 60747-17 (reinforced insulation), and CQC GB4943.1. It is AEC-Q100 Grade 1 qualified and supports AIAG-compliant PPAP documentation, IMDS, and CAMDS reporting for automotive deployment.

SI86S621FE-AS4 Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: Si86S62x

Package/Case:: 8-SOIC (0.295", 7.50mm Width)

Packaging:: Tube

Product Status:: Active

Technology:: Capacitive Coupling

Type:: General Purpose

Isolated Power:: Yes

Number of Channels:: 2

Inputs - Side 1/Side 2:: 1/1

Channel Type:: Unidirectional

Voltage - Isolation:: 6000Vrms

Common Mode Transient Immunity (Min):: 150kV/µs

Data Rate:: 10Mbps

Propagation Delay tpLH / tpHL (Max):: 41.5ns, 41.5ns

Pulse Width Distortion (Max):: 2.5ns

Rise / Fall Time (Typ):: 2.5ns, 2.5ns

Voltage - Supply:: 2.25V ~ 5.5V

Grade:: Automotive

Qualification:: AEC-Q100

Operating Temperature:: -40°C ~ 125°C

Mounting Type:: Surface Mount

Supplier Device Package:: 8-SSO

SI86S621FE-AS4 FAQ

1.How can I place an order for SI86S621FE-AS4 through Aetrix?

Please submit a Request for Quotation (RFQ) for SI86S621FE-AS4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI86S621FE-AS4 reliable?

The price and inventory of SI86S621FE-AS4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S621FE-AS4 is usually 5 days.

3.What payment methods are accepted for SI86S621FE-AS4?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S621FE-AS4 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI86S621FE-AS4?

SI86S621FE-AS4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI86S621FE-AS4 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI86S621FE-AS4?

For technical support, including SI86S621FE-AS4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S621FE-AS4 requirements.

6.How does Aetrix verify that SI86S621FE-AS4 is sourced from the original manufacturer or authorized distributors?

All SI86S621FE-AS4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S621FE-AS4 meets industry standards.

7.What is the process for return or replacement of SI86S621FE-AS4?

All SI86S621FE-AS4 units undergo pre-shipment inspection (PSI). If there is an issue with SI86S621FE-AS4, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI86S621FE-AS4 part is unused and in its original packaging.

Return procedure for SI86S621FE-AS4:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…