My Inquiry
My Account
Skyworks Solutions Inc. SI86S621HE-AS4
- Part No.:
- SI86S621HE-AS4
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 8-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI86S621HE-AS4.pdf
- Description:
- 6.0 KVRMS ISOLATOR, 2 UNIDIRECTI
- Quantity:
- Payment:
- Shipping:
Inventory:3,012
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI86S621HE-AS4 from Skyworks Solutions is a dual-channel, high-speed digital isolator with reinforced 6000 VRMS isolation, 150 Mbps data rate, and AEC-Q100 qualification for automotive systems. It features Schmitt-trigger inputs, selectable fail-safe output (default low), and operates across 2.25–5.5 V supply rails. Used in battery management systems and traction inverters where galvanic separation and noise immunity are critical.
For engineers reviewing the SI86S621HE-AS4 datasheet, SI86S621HE-AS4 pinout, SI86S621HE-AS4 application, or SI86S621HE-AS4 equivalent, this page delivers verified timing specs (9 ns typ propagation delay), CMTI (100 kV/µs), fail-safe behavior during power loss, and SSO-8 package compatibility - all essential for isolated signal integrity in EV powertrain designs.
Technical Context
The SI86S621HE-AS4 implements RF-based on/off keying across a semiconductor isolation barrier, eliminating startup initialization and enabling robust noise immunity without optical degradation. Its dual-channel architecture supports independent side-A and side-B power domains (VDD1/GND1 and VDD2/GND2) with separate UVLO and reset thresholds (RSTB± ~1.7 V).
It integrates input deglitch filtering (36 ns), precise timing control (3.5 ns pulse width distortion), and failsafe logic that forces outputs low when VDD1 is unpowered but VDD2 remains active. The device meets IEC 60747-17 reinforced insulation requirements and supports 150 Mbps operation at 2.5–5.5 V with <300 µs start-up time.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate | 150 Mbps - enables high-bandwidth communication in motor control gate drivers and isolated ADC interfaces. |
| Propagation Delay | 9 ns typical - ensures sub-10 ns timing alignment critical for synchronous PWM control in inverters. |
| Isolation Voltage | 6000 VRMS - provides reinforced insulation per UL 1577 and VDE 60747-17 for 1500 VRMS working voltage systems. |
| CMTI | 100 kV/µs minimum - maintains signal integrity under fast transients in high-dv/dt environments like battery disconnect events. |
| Supply Range | 2.25–5.5 V - supports interoperability with both 3.3 V microcontrollers and 5 V analog front-ends without level shifters. |
| Fail-Safe Mode | Default low output - guarantees safe shutdown state in BMS fault conditions when side-A supply collapses. |
| Operating Temp | –40 to +125 °C - qualified for under-hood automotive applications including onboard chargers and traction inverters. |
Pinout & Package
SI86S621HE-AS4 uses an SSO-8 (wide-body SOIC-8) package with 8.0 mm creepage/clearance, optimized for 6000 VRMS isolation. Pin 1 = VDD1, Pin 2 = A1, Pin 3 = A2, Pin 4 = GND1, Pin 5 = GND2, Pin 6 = B1, Pin 7 = B2, Pin 8 = VDD2. NC pins are absent - all 8 pins are functional.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 / Pin 1 | Side-A power supply | Supplies isolated input-side logic; must be bypassed with 0.1 µF + 10 µF capacitors near pin. |
| A1 / Pin 2 | Digital input (Channel 1) | Schmitt-trigger input with 0.15×VDD hysteresis; accepts 2.25–5.5 V logic levels. |
| A2 / Pin 3 | Digital input (Channel 2) | Independent second input channel; identical electrical characteristics to A1. |
| GND1 / Pin 4 | Side-A ground reference | Return path for VDD1; must be separated from GND2 by ≥8 mm PCB clearance for safety compliance. |
| GND2 / Pin 5 | Side-B ground reference | Return path for VDD2; forms isolation barrier boundary with GND1. |
| B1 / Pin 6 | Digital output (Channel 1) | CMOS output with 50 Ω nominal impedance; drives 15 pF loads with 2.5 ns rise/fall times. |
| B2 / Pin 7 | Digital output (Channel 2) | Second isolated output channel; channel-to-channel skew ≤3 ns ensures synchronized switching. |
| VDD2 / Pin 8 | Side-B power supply | Supplies isolated output-side logic; independent of VDD1 for true galvanic separation. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation architecture | Eliminates LED aging and temperature drift; enables zero-startup-delay operation without initialization sequences. |
| Selectably fail-safe output | Factory-configured default-low mode ensures BMS shutdown signals remain asserted during side-A power failure. |
| Input deglitch filter (36 ns) | Rejects EMI-induced glitches shorter than 36 ns - prevents false triggering in noisy motor drive environments. |
| AEC-Q100 Grade 0 qualification | Validated for –40 to +125 °C operation with full PPAP documentation support for automotive OEM production. |
| Reinforced insulation certification | UL 1577 (6000 VRMS), VDE 60747-17, CSA 62368-1, and CQC GB4943.1 approvals enable single-component safety compliance. |
Applications
| Battery Management System (BMS) | Traction Inverter Control |
|---|---|
|
Use Scenario: Isolating cell voltage monitoring ADCs and pack-level MCU communications in 800 V EV battery stacks. IC Role / Device Role / Timing Role: Dual-channel isolator transmitting sampled voltage data and fault signals across 6000 VRMS barrier with <9 ns propagation delay. Use Value: Enables accurate real-time cell balancing while preventing ground loop currents and meeting IEC 62619 safety requirements. |
Use Scenario: Transmitting PWM gate-drive signals from inverter MCU to isolated gate drivers in SiC-based traction inverters. IC Role / Device Role / Timing Role: High-speed dual isolator delivering synchronized, low-skew (<3 ns) signals to upper/lower IGBT/SiC FET drivers. Use Value: Maintains precise dead-time control under 100 kV/µs common-mode transients, preventing shoot-through failures. |
| Onboard Charger (OBC) | Charging Station Communication |
|
Use Scenario: Isolating digital control signals between AC/DC PFC stage and DC/DC LLC converter in bidirectional OBCs. IC Role / Device Role / Timing Role: Dual-channel isolator handling feedback loops and enable signals across 1500 VRMS working voltage barrier. Use Value: Supports reinforced insulation compliance (IEC 62368-1) while enabling 150 Mbps closed-loop control for adaptive charging profiles. |
Use Scenario: Galvanically separating CAN FD communication lines between EVSE controller and vehicle BMS during CCS/GB/T charging. IC Role / Device Role / Timing Role: Dual isolator protecting CAN transceiver from ground potential differences and ESD events on charging cable interface. Use Value: Ensures uninterrupted communication during plug insertion/removal transients and meets ISO 11898-2 EMC immunity requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISO7721DWR | 5000 VRMS isolation, 100 Mbps max, SOIC-8 (3.9 mm creepage), no AEC-Q100 grade | Targeted at industrial automation, not automotive-grade BMS or traction inverters | Choose for cost-sensitive non-automotive designs requiring basic isolation without reinforced certification. |
| ADUM121N1BRZ-RL7 | 3750 VRMS isolation, 150 Mbps, SOIC-8, -40 to +105 °C, no deglitch filter or fail-safe option | Suitable for consumer/industrial comms; lacks automotive temp range and safety certifications | Select when operating ambient stays below 105 °C and system-level safety certification is handled externally. |
Compared with ISO7721DWR and ADUM121N1BRZ-RL7, SI86S621HE-AS4 uniquely combines 6000 VRMS reinforced isolation, AEC-Q100 Grade 0 qualification, factory-set default-low fail-safe mode, and 36 ns input deglitching - making it the only drop-in solution for ISO 26262 ASIL-C compliant BMS and inverter control.
Availability
SI86S621HE-AS4 is available at Aetrix Electronics and suitable for battery management systems, traction inverters, and onboard chargers requiring stable component supply with automotive-grade traceability and long-term lifecycle support.
Supply support for SI86S621HE-AS4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and isolation technologies for high-reliability applications.
The Si86S6xx family was engineered specifically for automotive and industrial isolation needs - delivering RF-based digital isolation with AEC-Q100 qualification, reinforced safety ratings, and fail-safe logic for mission-critical power systems.
FAQ
What is the isolation rating and safety certification status of SI86S621HE-AS4?
SI86S621HE-AS4 is rated for 6000 VRMS isolation per UL 1577 and carries pending certifications for VDE 60747-17 (reinforced), CSA 62368-1, and CQC GB4943.1. It achieves 1500 VRMS working voltage (VIOWM) in SSO-8 package and supports 2121 Vpeak transient immunity. All certifications are documented in Skyworks file numbers E257455 (UL), 5028467 (VDE), and 232873 (CSA).
Does SI86S621HE-AS4 require external components for stable operation?
Yes - SI86S621HE-AS4 requires 0.1 µF and 10 µF bypass capacitors on both VDD1-GND1 and VDD2-GND2 pairs, placed within 2 mm of the respective pins. Optional 50–300 Ω series resistors on input/output lines improve noise immunity in high-EMI environments like motor drives. No pull-up/down resistors are needed due to integrated fail-safe logic.
How does the fail-safe mode function in SI86S621HE-AS4 during power loss?
SI86S621HE-AS4 is configured at manufacture for default-low fail-safe operation. When VDD1 drops below UVLO– (≤2.12 V) while VDD2 remains powered, outputs B1 and B2 are actively driven low within 12 ns (tSD). This behavior is guaranteed across –40 to +125 °C and eliminates need for external pull-downs in safety-critical BMS shutdown paths.
What is the maximum data rate and timing performance of SI86S621HE-AS4 at 3.3 V supply?
At VDD = 3.3 V, SI86S621HE-AS4 supports 150 Mbps data rate with 9.5 ns typical propagation delay (tPLH/tPHL), 4.5 ns max pulse width distortion, and ≤3 ns channel-to-channel skew. Rise/fall times remain ≤2.5 ns into 15 pF loads. These values are specified over full temperature range (–40 to +125 °C) and validated per Table 7 in the datasheet.
Is SI86S621HE-AS4 pin-compatible with other devices in the Si86S6xx family?
Yes - SI86S621HE-AS4 shares identical SSO-8 pinout and footprint with all Si86S62x variants (e.g., SI86S620, SI86S622) and Si86SOx devices. Channel count, fail-safe polarity, and speed grade (B/E vs F/H) are the only functional differentiators; no PCB redesign is required when substituting within the same package variant.
SI86S621HE-AS4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si86S62x
- Package/Case:
- 8-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 2
- Inputs - Side 1/Side 2:
- 1/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 6000Vrms
- Common Mode Transient Immunity (Min):
- 150kV/µs
- Data Rate:
- 10Mbps
- Propagation Delay tpLH / tpHL (Max):
- 41.5ns, 41.5ns
- Pulse Width Distortion (Max):
- 2.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SSO
SI86S621HE-AS4 FAQ
1.How can I place an order for SI86S621HE-AS4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S621HE-AS4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S621HE-AS4 reliable?
The price and inventory of SI86S621HE-AS4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S621HE-AS4 is usually 5 days.
3.What payment methods are accepted for SI86S621HE-AS4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S621HE-AS4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S621HE-AS4?
SI86S621HE-AS4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S621HE-AS4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S621HE-AS4?
For technical support, including SI86S621HE-AS4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S621HE-AS4 requirements.
6.How does Aetrix verify that SI86S621HE-AS4 is sourced from the original manufacturer or authorized distributors?
All SI86S621HE-AS4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S621HE-AS4 meets industry standards.
7.What is the process for return or replacement of SI86S621HE-AS4?
All SI86S621HE-AS4 units undergo pre-shipment inspection (PSI). If there is an issue with SI86S621HE-AS4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S621HE-AS4 part is unused and in its original packaging.
Return procedure for SI86S621HE-AS4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S621HE-AS4 Tags
-
ISO1212DBQR
Texas Instruments
-
ISO6721BDR
Texas Instruments
-
SI8710AC-B-ISR
Skyworks Solutions Inc.
-
ISO7720FDR
Texas Instruments
-
ISO7721DR
Texas Instruments
-
ISO7721FDR
Texas Instruments
-
SI8710CC-B-ISR
Skyworks Solutions Inc.
-
ISO6741FQDWRQ1
Texas Instruments
-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments
-
ISO7741DWR
Texas Instruments
-
ISO7741FDWR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
