Skyworks Solutions Inc. SI86S622BC-AS
- Part No.:
- SI86S622BC-AS
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI86S622BC-AS.pdf
- Description:
- 3.75 KVRMS ISOLATOR, 2 UNIDIRECT
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI86S622BC-AS from Skyworks Solutions is a dual-channel, high-speed digital isolator with reinforced 6000 VRMS isolation, 150 Mbps data rate, and AEC-Q100 qualification for automotive systems. It features Schmitt-trigger inputs, selectable fail-safe output (default low), and operates across 2.25–5.5 V supply rails. Used in battery management systems and traction inverters where galvanic separation of control and power domains is critical.
For engineers reviewing the SI86S622BC-AS datasheet, SI86S622BC-AS pinout, SI86S622BC-AS application, or SI86S622BC-AS equivalent, this page delivers verified timing specs (9 ns typical propagation delay), CMTI (100 kV/µs), fail-safe behavior under UVLO, and package-specific creepage/clearance (8.0 mm SSO-8) - all confirmed for the exact part number.
Technical Context
The SI86S622BC-AS implements RF-based on/off keying across a semiconductor isolation barrier, eliminating startup initialization and enabling robust noise immunity without optical degradation. Its dual-channel architecture supports independent side-A and side-B supplies (VDD1/VDD2), each with dedicated undervoltage lockout (UVLO+ = 2.18 V, UVLO– = 2.05 V) and reset thresholds (RSTB+ ≈ 1.7 V).
It integrates input deglitch filters (36 ns), precise timing control (3.5 ns typical pulse width distortion), and failsafe logic that forces outputs low during side-A power loss while side-B remains powered. The device meets IEC 60747-17 reinforced insulation requirements with VIOWM = 1500 VRMS (SSO-8 package) and supports 2.5 V, 3.3 V, and 5 V operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | 150 Mbps - supports high-speed serial interfaces like SPI, RS-485 transceiver control, and isolated ADC/DAC clocking without bottlenecking. |
| Propagation delay | 9 ns typical - enables tight timing closure in motor gate driver feedback loops and real-time BMS cell monitoring. |
| Isolation rating | 6000 VRMS - certified per UL 1577 for 1-minute withstand; meets reinforced insulation requirements for 1500 VRMS working voltage (IEC 60747-17). |
| CMTI | 100 kV/µs minimum - ensures reliable operation in high-dV/dt environments like traction inverters and SMPS gate drivers. |
| Supply range | 2.25–5.5 V - allows interoperability with 3.3 V microcontrollers and 5 V analog front-ends without level-shifting. |
| Fail-safe mode | Default low output - guarantees safe shutdown state in onboard chargers when primary-side power fails. |
| Operating temperature | –40 to +125 °C - qualified per AEC-Q100 Grade 1 for under-hood automotive applications including battery electric vehicles. |
Pinout & Package
SI86S622BC-AS uses an SSO-8 (wide-body SOIC-8) package with 8.0 mm creepage and clearance, optimized for 6000 VRMS isolation. Pin 1 = VDD1, Pin 2 = A1, Pin 3 = A2, Pin 4 = GND1, Pin 5 = GND2, Pin 6 = B1, Pin 7 = B2, Pin 8 = VDD2. Pins labeled NC are not internally connected and must remain unconnected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Side A power supply | Provides bias for channel transmitter; must be decoupled with 0.1 µF + 10 µF capacitors near pin. |
| A1, A2 | Side A digital inputs | Dual isolated input channels with Schmitt-trigger thresholds and 36 ns deglitch filtering. |
| GND1 | Side A ground reference | Return path for VDD1; must be separated from GND2 by ≥8.0 mm PCB spacing to maintain creepage. |
| GND2 | Side B ground reference | Return path for VDD2; forms isolation barrier boundary with GND1; no electrical connection to GND1. |
| B1, B2 | Side B digital outputs | Dual isolated outputs with 50 Ω nominal impedance; require controlled-impedance routing for >50 Mbps signals. |
| VDD2 | Side B power supply | Biases receiver circuitry; independent of VDD1 - enables level translation between 3.3 V MCU and 5 V actuator domain. |
Key Features
| Feature | Design Value |
|---|---|
| RF modulation architecture | Eliminates startup initialization delay and avoids LED aging issues inherent in optocouplers; supports immediate data transmission at power-on. |
| Selectable fail-safe output | Factory-configured default-low behavior ensures motor gate drivers disable safely during MCU power loss in EV traction inverters. |
| Input deglitch filter | 36 ns pulse rejection removes EMI-induced glitches from noisy industrial bus lines without adding latency to valid signals. |
| High CMTI (100 kV/µs) | Prevents false triggering in high-frequency switching environments such as SiC-based power converters operating at >100 kHz. |
| AEC-Q100 Grade 1 qualification | Validated for automotive use up to +125 °C ambient, including thermal cycling, HTOL, and ESD testing per automotive reliability standards. |
Applications
| Battery Management System (BMS) | Traction Inverter Control |
|---|---|
|
Use Scenario: Isolating cell voltage measurement ADCs and pack contactor control signals from the high-voltage battery stack. IC Role / Device Role / Timing Role: Dual-channel isolator separates 12 V MCU domain from 400–800 V battery domain while transmitting sampled voltage data and precharge/disconnect commands. Use Value: 6000 VRMS isolation and 100 kV/µs CMTI prevent measurement corruption and false tripping during high-dV/dt transients in fast-switching BMS topologies. |
Use Scenario: Transmitting PWM gate drive signals from inverter controller to isolated gate drivers for IGBT/SiC modules. IC Role / Device Role / Timing Role: Provides timing-critical, low-skew isolation for complementary high-side/low-side gate signals with <3 ns channel-to-channel skew. Use Value: 9 ns typical propagation delay and 3.5 ns pulse width distortion preserve dead-time integrity and minimize shoot-through risk in 10–20 kHz motor drives. |
| Onboard Charger (OBC) | Industrial PLC I/O Module |
|
Use Scenario: Isolating AC line sensing, DC link voltage feedback, and relay control between primary-side rectifier and secondary-side MCU. IC Role / Device Role / Timing Role: Dual-channel isolator handles bidirectional communication (UART) and unidirectional safety interlocks in compact OBC designs. Use Value: Default-low fail-safe mode ensures contactors open automatically if primary-side power fails, meeting ISO 6469-3 functional safety requirements. |
Use Scenario: Providing galvanic isolation for digital input/output channels in modular PLC backplanes interfacing with field sensors and actuators. IC Role / Device Role / Timing Role: Replaces optocouplers in 24 V DC I/O modules requiring high-speed status reporting and command execution. Use Value: 150 Mbps capability supports dense polling of 32-channel I/O modules over isolated SPI buses, reducing scan time versus legacy isolators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM220N0BRIZ | 5000 VRMS isolation, 150 Mbps, 13 ns propagation delay, 2.7–5.5 V supply, default-high fail-safe. | Lacks AEC-Q100 qualification; rated only for industrial temp (–40 to +105 °C); lower VIOWM (1000 VRMS). | Choose for cost-sensitive industrial automation where automotive qualification and 6000 VRMS are not required. |
| ISO7721FDWR | 5000 VRMS isolation, 100 Mbps, 11 ns propagation delay, 2.25–5.5 V supply, no deglitch filter. | No input deglitching; not AEC-Q100 qualified; CMTI = 85 kV/µs; SOW-8 package (3.9 mm creepage). | Choose when lower data rate suffices and board space constraints favor smaller SOIC-8 footprint over SSO-8. |
Compared with ADUM220N0BRIZ and ISO7721FDWR, SI86S622BC-AS delivers higher isolation voltage (6000 vs. 5000 VRMS), automotive-grade reliability (AEC-Q100 Grade 1), integrated 36 ns deglitching, and superior CMTI - making it the preferred choice for safety-critical EV powertrain systems.
Availability
SI86S622BC-AS is available at Aetrix Electronics and suitable for battery management systems, traction inverters, and onboard chargers requiring stable component supply, long-term lifecycle support, and automotive-grade traceability.
Supply support for SI86S622BC-AS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and isolation technologies for wireless, automotive, and industrial markets.
The Si86S6xx family was designed specifically for high-reliability automotive and industrial isolation, emphasizing reinforced safety certification, high CMTI, and fail-safe behavior in harsh electromagnetic environments.
FAQ
What is the isolation voltage rating of the SI86S622BC-AS?
The SI86S622BC-AS is rated for 6000 VRMS isolation per UL 1577 (1 minute), with reinforced insulation certification per IEC 60747-17. Its SSO-8 package provides 8.0 mm creepage and clearance, supporting a maximum working voltage (VIOWM) of 1500 VRMS - validated for use in automotive battery systems up to 800 V DC bus.
Does the SI86S622BC-AS require external startup initialization?
No, the SI86S622BC-AS does not require external startup initialization. Its RF-based modulation architecture enables immediate data transmission after power stabilization. The device exits UVLO in ≤300 µs and begins passing valid input states without firmware or configuration overhead - a key advantage over optocouplers and some competing digital isolators.
What is the default output state during power loss on the input side?
The SI86S622BC-AS is configured as a default-low fail-safe device. When VDD1 is unpowered (e.g., MCU failure) but VDD2 remains active, outputs B1 and B2 are actively driven low. This behavior is factory-set and ensures safe deactivation of downstream power stages such as gate drivers or contactors in automotive applications.
Can the SI86S622BC-AS operate at 2.5 V supply voltage?
Yes, the SI86S622BC-AS supports 2.25–5.5 V operation on both sides. At VDD1 = VDD2 = 2.5 V, it maintains 150 Mbps data rate, 17 ns max propagation delay, and full CMTI performance (100 kV/µs). Current consumption is 1.01 mA (typ) per side with static inputs, making it suitable for low-power automotive subsystems.
How does the 36 ns input deglitch filter affect signal integrity?
The SI86S622BC-AS integrates a hardware deglitch filter that rejects input pulses shorter than 36 ns - effectively suppressing ESD-induced noise and coupled transients from adjacent power circuits. Valid signals pass with only 36 ns added delay, preserving timing margins in high-noise environments like motor drives and industrial PLCs without requiring external RC filtering.
SI86S622BC-AS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si86S62x
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 2
- Inputs - Side 1/Side 2:
- 1/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 3750Vrms
- Common Mode Transient Immunity (Min):
- 100kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13.5ns, 13.5ns
- Pulse Width Distortion (Max):
- 2.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
SI86S622BC-AS FAQ
1.How can I place an order for SI86S622BC-AS through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S622BC-AS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S622BC-AS reliable?
The price and inventory of SI86S622BC-AS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S622BC-AS is usually 5 days.
3.What payment methods are accepted for SI86S622BC-AS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S622BC-AS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S622BC-AS?
SI86S622BC-AS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S622BC-AS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S622BC-AS?
For technical support, including SI86S622BC-AS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S622BC-AS requirements.
6.How does Aetrix verify that SI86S622BC-AS is sourced from the original manufacturer or authorized distributors?
All SI86S622BC-AS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S622BC-AS meets industry standards.
7.What is the process for return or replacement of SI86S622BC-AS?
All SI86S622BC-AS units undergo pre-shipment inspection (PSI). If there is an issue with SI86S622BC-AS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S622BC-AS part is unused and in its original packaging.
Return procedure for SI86S622BC-AS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S622BC-AS Tags
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ISO1212DBQR
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ISO6721BDR
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SI8710AC-B-ISR
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ISO7720FDR
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SI8710CC-B-ISR
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ISO6741FQDWRQ1
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ISO7721DWVR
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ISO7762FDBQR
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ISO7741DWR
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ISO7741FDWR
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