Skyworks Solutions Inc. SI86S622EE-IS4
- Part No.:
- SI86S622EE-IS4
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 8-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI86S622EE-IS4.pdf
- Description:
- 6.0 KVRMS ISOLATOR, 2 UNIDIRECTI
- Quantity:
- Payment:

- Shipping:

Inventory:4,970
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Product details
Overview
SI86S622EE-IS4 from Skyworks Solutions is a dual-channel, high-speed digital isolator with reinforced 6000 VRMS isolation, 150 Mbps data rate, and AEC-Q100 qualification for automotive systems. It features Schmitt-trigger + CMOS inputs, selectable fail-safe output (default low), and operates across 2.25–5.5 V supply rails. Used in battery management systems and traction inverters where galvanic separation and noise immunity are critical.
For engineers reviewing the SI86S622EE-IS4 datasheet, SI86S622EE-IS4 pinout, SI86S622EE-IS4 application, or SI86S622EE-IS4 equivalent, this page delivers verified specifications, package mapping, functional alternatives, and design-critical timing and safety parameters - all confirmed against Skyworks' official 206552B datasheet dated August 17, 2023.
Technical Context
The SI86S622EE-IS4 implements RF-based on/off keying across a semiconductor isolation barrier, eliminating startup initialization and enabling robust noise immunity without optical or magnetic coupling. Its architecture supports independent UVLO and reset monitoring per side (VDD1/VDD2), with RSTB thresholds at ~1.7 V and UVLO hysteresis of 105–160 mV.
It integrates input deglitch filters (36 ns) to suppress sub-pulse noise, delivers precise timing (9 ns typical propagation delay, ≤4.5 ns pulse width distortion), and achieves 100 kV/µs common-mode transient immunity (CMTI) at ±1500 V common-mode voltage - validated per IEC 60747-17 and UL 1577 standards.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate | 150 Mbps - supports high-speed serial interfaces like SPI, RS-485 transceiver control, and isolated ADC/DAC clocking without bottlenecking. |
| Propagation Delay | 5–14 ns (typ. 9 ns) - enables tight timing budgets in motor gate drivers and real-time feedback loops. |
| Isolation Voltage | 6000 VRMS (1 min) - meets reinforced insulation requirements for 1000 VRMS working voltage in EV onboard chargers and inverters. |
| CMTI | 100 kV/µs minimum - prevents data corruption during fast-switching events in SiC/GaN power stages. |
| Supply Range | 2.25–5.5 V per side - allows interoperability with 3.3 V microcontrollers and 5 V analog subsystems without level shifters. |
| Fail-Safe Mode | Default low output - ensures safe shutdown state in BMS fault conditions when VDD1 is lost. |
| Operating Temp | –40 °C to +125 °C - qualified for under-hood automotive environments per AEC-Q100 Grade 1. |
Pinout & Package
SI86S622EE-IS4 uses an NB SOIC-8 package (3.9 mm creepage/clearance) with 8-pin layout optimized for reinforced isolation. Pin 1 = VDD1, Pin 2 = A1, Pin 3 = A2, Pin 4 = GND1, Pin 5 = GND2, Pin 6 = B1, Pin 7 = B2, Pin 8 = VDD2. Pins A1/A2 and B1/B2 are bidirectional digital I/O channels; NC not present - all pins assigned.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 / Pin 1 | Side A power supply | Provides bias for input-side logic and RF transmitter; requires 0.1 µF + 10 µF bypassing close to pin. |
| A1, A2 / Pins 2,3 | Side A digital I/O | Bidirectional isolated data channels; Schmitt-trigger + CMOS threshold inputs reject >36 ns noise glitches. |
| GND1 / Pin 4 | Side A ground reference | Return path for VDD1; must be separated from GND2 by ≥3.9 mm PCB clearance to maintain isolation rating. |
| GND2 / Pin 5 | Side B ground reference | Return path for VDD2; forms isolation barrier with GND1; no direct connection permitted in layout. |
| B1, B2 / Pins 6,7 | Side B digital I/O | Output-side data channels; default-low fail-safe behavior asserts logic low if VDD1 fails while VDD2 remains active. |
| VDD2 / Pin 8 | Side B power supply | Biases output-side RF receiver and driver; independent UVLO ensures reliable reset if VDD2 dips below 2.1 V. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation | Eliminates LED aging and transformer saturation issues; enables stable 150 Mbps operation over full temperature range. |
| Selectably fail-safe output | Factory-configured default-low mode ensures controlled shutdown in BMS or inverter fault scenarios without external pull-downs. |
| 36 ns input deglitch filter | Rejects EFT bursts and switching noise in industrial motor drives, preventing false triggering of isolated gate drivers. |
| 100 kV/µs CMTI | Guarantees signal integrity during 100+ A/µs dI/dt events in SiC half-bridges, reducing need for additional filtering. |
| AEC-Q100 Grade 1 | Validated for automotive use up to +125 °C ambient, supporting deployment in traction inverters and OBCs without derating. |
Applications
| Battery Management System (BMS) | Traction Inverter Control |
|---|---|
|
Use Scenario: Isolating cell voltage monitor (CVM) SPI bus and pack current sensor signals from MCU domain in EV battery packs. IC Role / Device Role / Timing Role: Dual-channel isolator bridging high-voltage battery stack (Side A) and 3.3 V MCU (Side B); provides fail-safe low output during cell overvoltage fault. Use Value: Enables certified reinforced isolation (6000 VRMS) within compact NB SOIC-8 footprint, meeting ISO 26262 ASIL-C diagnostic coverage requirements. |
Use Scenario: Transmitting PWM enable/disable and fault feedback between MCU and isolated gate driver ICs in 800 V SiC inverters. IC Role / Device Role / Timing Role: Timing-critical isolator for gate driver interface with <14 ns propagation delay and <4.5 ns pulse width distortion. Use Value: Maintains precise edge alignment across isolation barrier, preventing shoot-through in high-frequency switching (≥50 kHz). |
| Onboard Charger (OBC) | Industrial PLC Analog I/O Module |
|
Use Scenario: Isolating AC line sensing, DC link voltage monitoring, and communication interfaces (CAN, UART) in bi-directional OBCs. IC Role / Device Role / Timing Role: Dual-channel isolator separating 400–800 V DC stage (Side A) from 5 V control logic (Side B); supports 2.25–5.5 V dual-rail operation. Use Value: Eliminates need for separate level shifters and optocouplers, reducing BOM count and improving long-term reliability vs. LED-based solutions. |
Use Scenario: Isolating 4–20 mA current loop inputs and isolated ADC outputs in modular PLC backplanes. IC Role / Device Role / Timing Role: High-noise-immunity isolator for analog front-end digitization, leveraging 36 ns deglitching and 100 kV/µs CMTI. Use Value: Rejects 50/60 Hz mains coupling and VFD-induced transients, ensuring accurate current measurement without software averaging. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM121N1BRZ-RL7 | 5000 VRMS isolation, 150 Mbps, default-high fail-safe, SOIC-8 (3.9 mm creepage) | Lacks AEC-Q100 qualification; rated for industrial (-40°C to +105°C), not automotive | Choose for cost-sensitive industrial PLCs where automotive qualification is unnecessary and default-high behavior aligns with system logic. |
| ISO7721D | 5000 VRMS, 100 Mbps, 10 ns propagation delay, SOIC-8, default-low option available (ISO7721DDB) | No AEC-Q100; lower CMTI (85 kV/µs); lacks 36 ns deglitch filter | Prefer for non-automotive applications requiring lower power (1.7 mA @ 500 kHz) and simpler fail-safe configuration. |
Compared with ADUM121N1BRZ-RL7 and ISO7721D, SI86S622EE-IS4 uniquely combines 6000 VRMS reinforced isolation, AEC-Q100 Grade 1 qualification, and factory-configured default-low fail-safe - making it the only option qualified for safety-critical automotive traction and charging systems requiring UL/VDE/CSA certification at 1500 VRMS working voltage.
Availability
SI86S622EE-IS4 is available at Aetrix Electronics and suitable for battery management systems, traction inverters, and onboard chargers requiring stable component supply with automotive-grade traceability and long-term lifecycle support.
Supply support for SI86S622EE-IS4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for high-reliability applications.
The Si86S6xx family was designed specifically for automotive and industrial systems demanding reinforced isolation, high CMTI, and AEC-Q100 compliance - targeting EV powertrain, energy storage, and factory automation markets.
FAQ
What is the isolation rating and safety certification status of SI86S622EE-IS4?
SI86S622EE-IS4 is rated for 6000 VRMS isolation per UL 1577 (1 minute), with pending certifications for VDE 60747-17 (reinforced), CSA 62368-1, and CQC GB4943.1. It achieves 1500 VRMS working voltage (VIOWM) in SSO-8 and 445 VRMS in NB SOIC-8 packages, validated per IEC 60747-17 TDDB testing.
Does SI86S622EE-IS4 support independent power supplies on each side?
Yes, SI86S622EE-IS4 supports fully independent VDD1 and VDD2 supplies ranging from 2.25 V to 5.5 V each. Side A (VDD1/GND1) and Side B (VDD2/GND2) operate autonomously, with separate UVLO and reset thresholds - enabling flexible system partitioning such as 3.3 V MCU side and 5 V analog side.
What is the meaning of "EE-IS4" in SI86S622EE-IS4?
The "EE-IS4" suffix denotes the specific variant: "EE" indicates the NB SOIC-8 package with 3.9 mm creepage/clearance, and "IS4" specifies the default-low fail-safe output configuration. This ordering code ensures the device asserts logic low on B1/B2 when VDD1 is unpowered but VDD2 remains active - critical for automotive safety states.
How does the 36 ns input deglitch filter function in SI86S622EE-IS4?
The 36 ns deglitch filter in SI86S622EE-IS4 blocks input pulses shorter than 36 ns, rejecting ESD-induced transients and switching noise in motor drives. Valid pulses pass with a fixed 36 ns delay; this feature is factory-enabled for the Si86S62x family and improves system robustness without firmware overhead.
Can SI86S622EE-IS4 replace optocouplers in existing designs?
Yes, SI86S622EE-IS4 can directly replace dual-channel optocouplers (e.g., HCPL-0721) in most cases, offering superior speed (150 Mbps vs. ~10 Mbps), lower power (1.4 mA typical at 500 kHz), no LED aging, and guaranteed timing specs. Layout requires maintaining ≥3.9 mm clearance between GND1 and GND2 per NB SOIC-8 requirements.
SI86S622EE-IS4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- Si86S62x
- Package/Case:
- 8-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- Yes
- Number of Channels:
- 2
- Inputs - Side 1/Side 2:
- 1/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 6000Vrms
- Common Mode Transient Immunity (Min):
- 100kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 13.5ns, 13.5ns
- Pulse Width Distortion (Max):
- 2.5ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SSO
SI86S622EE-IS4 FAQ
1.How can I place an order for SI86S622EE-IS4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S622EE-IS4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S622EE-IS4 reliable?
The price and inventory of SI86S622EE-IS4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S622EE-IS4 is usually 5 days.
3.What payment methods are accepted for SI86S622EE-IS4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S622EE-IS4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S622EE-IS4?
SI86S622EE-IS4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S622EE-IS4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S622EE-IS4?
For technical support, including SI86S622EE-IS4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S622EE-IS4 requirements.
6.How does Aetrix verify that SI86S622EE-IS4 is sourced from the original manufacturer or authorized distributors?
All SI86S622EE-IS4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S622EE-IS4 meets industry standards.
7.What is the process for return or replacement of SI86S622EE-IS4?
All SI86S622EE-IS4 units undergo pre-shipment inspection (PSI). If there is an issue with SI86S622EE-IS4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S622EE-IS4 part is unused and in its original packaging.
Return procedure for SI86S622EE-IS4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S622EE-IS4 Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
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