Skyworks Solutions Inc. SI86S631EE-AS2
- Part No.:
- SI86S631EE-AS2
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI86S631EE-AS2.pdf
- Description:
- 6.0 KVRMS ISOLATOR, 3 UNIDIRECTI
- Quantity:
- Payment:

- Shipping:

Inventory:1,387
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI86S631EE-AS2 from Skyworks Solutions is a 3-channel, reinforced digital isolator with 6000 VRMS isolation rating, 150 Mbps data rate, and AEC-Q100 qualification for automotive systems. It features Schmitt-trigger + CMOS inputs, tri-state outputs with enable, selectable fail-safe default-high/low output, and operates across –40 to 125 °C in WB SOIC-16 package. It is used in battery management systems and traction inverters where high CMTI and safety-certified galvanic isolation are required.
For engineers reviewing the SI86S631EE-AS2 datasheet, SI86S631EE-AS2 pinout, SI86S631EE-AS2 application, or SI86S631EE-AS2 equivalent, key selection criteria include its 6000 VRMS reinforced insulation (IEC 60747-17), 10 ns typical propagation delay, 3.5 ns pulse width distortion, sleep mode support via SMb pin, and dual supply operation (2.25–5.5 V per side).
Technical Context
The SI86S631EE-AS2 implements RF-based on/off keying modulation across a semiconductor isolation barrier-eliminating startup initialization and enabling robust noise immunity. Its architecture supports independent undervoltage lockout (UVLO) and reset circuitry on both sides (VDD1/VDD2), with RSTB thresholds at ~1.7 V and UVLO hysteresis of 105–160 mV.
It integrates tri-state output control via EN1/EN2 pins, configurable fail-safe behavior (default-high or default-low during unpowered input), and supports sleep mode activation via SMb pin-reducing quiescent current to 750 µA per side while retaining one active channel for wake-up detection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial interfaces including isolated SPI and QSPI links without timing bottlenecks. |
| Isolation rating | 6000 VRMS (1 min, UL 1577) - enables use in reinforced insulation applications such as onboard chargers and BMS per IEC 62368-1 and IEC 60601-1. |
| Propagation delay | 10 ns typical - ensures tight timing alignment between isolated controller and power stage in motor drives and inverters. |
| Pulse width distortion | 3.5 ns typical - preserves duty cycle fidelity critical for PWM signal isolation and gate driver timing integrity. |
| Supply voltage range | 2.25 to 5.5 V per side - allows interoperability with 3.3 V and 5 V logic domains without level-shifting components. |
| Transient immunity | ≥100 kV/µs - provides immunity against fast-rising common-mode transients in high-noise power electronics environments. |
| Operating temperature | –40 to 125 °C - meets extended automotive-grade thermal requirements for under-hood and traction inverter placement. |
Pinout & Package
SI86S631EE-AS2 is housed in a wide-body SOIC-16 (WB SOIC-16) package with creepage/clearance optimized for 6000 VRMS reinforced insulation. Pin 1 is marked with a dot; pin numbering follows standard SOIC convention (counterclockwise from top-left corner).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (EN1) | Side A output enable | Active-high control for tristating all Side A outputs (A1–A3); enables system-level power gating of isolated interface. |
| 2 (VDD1) | Side A supply | 2.25–5.5 V power for input-side logic and transmitter circuits; requires 0.1 µF + 10 µF bypass capacitors. |
| 3 (A1) | Side A I/O channel 1 | Bi-directional digital I/O with Schmitt-trigger + CMOS threshold; supports noise-immune signal transfer across isolation barrier. |
| 4 (A2) | Side A I/O channel 2 | Same electrical characteristics as A1; independent channel for multi-signal isolation (e.g., PWM + fault feedback). |
| 5 (A3) | Side A I/O channel 3 | Third isolated channel; usable for auxiliary control signals like enable, direction, or status in motor control systems. |
| 6 (NC) | No connect | Internally unused; must remain unconnected and unstubbed on PCB to maintain isolation integrity. |
| 7–8 (GND1) | Side A ground | Reference for VDD1 and Side A I/O; must be routed separately from GND2 to preserve isolation barrier integrity. |
| 9–10 (B1, B2) | Side B I/O channels 1–2 | Isolated output-side signals; B1/B2 mirror A1/A2 states with 10 ns propagation delay and <3.5 ns pulse distortion. |
| 11 (B3) | Side B I/O channel 3 | Third isolated output channel; supports fail-safe default state (high or low) when VDD1 is unpowered. |
| 12 (EN2) | Side B output enable | Active-high control for tristating all Side B outputs (B1–B3); enables bidirectional power-down coordination. |
| 13–14 (GND2) | Side B ground | Reference for VDD2 and Side B I/O; electrically isolated from GND1; requires separate low-impedance return path. |
| 15 (VDD2) | Side B supply | 2.25–5.5 V power for output-side logic and receiver circuits; independently regulated from VDD1. |
| 16 (SMb) | Sleep mode control | Active-low pin that places entire device into 750 µA/side sleep mode while retaining wake-up capability via this pin. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation architecture | Eliminates startup initialization delay and optical degradation concerns; delivers stable performance over lifetime and temperature. |
| Selectably configurable fail-safe output | Ordering option determines whether outputs default to logic high or low during VDD1 undervoltage-critical for safe shutdown in BMS. |
| Tri-state output enable (EN1/EN2) | Allows dynamic disabling of isolated I/Os without disrupting power supplies-enables hot-plug compatibility and bus arbitration. |
| Schmitt-trigger + CMOS input thresholds | Provides >0.15 × VDD input hysteresis, rejecting sub-36 ns noise pulses and ensuring reliable edge detection in noisy ECU environments. |
| Sleep mode with wake-on-SMb | Reduces standby current to 750 µA per side while maintaining single-pin wake-up capability-ideal for always-on vehicle subsystems. |
Applications
| Battery Management System (BMS) | Traction Inverter Control |
|---|---|
|
Use Scenario: Isolating cell voltage monitoring ADC signals and pack contactor control commands between high-voltage battery stack and low-voltage MCU. IC Role / Device Role / Timing Role: SI86S631EE-AS2 provides three independent galvanically isolated channels: two for ADC data streams and one for contactor enable/disable with fail-safe default-low behavior. Use Value: 6000 VRMS reinforced insulation meets IEC 61000-4-5 surge and IEC 62109 functional safety requirements for EV battery packs. |
Use Scenario: Transmitting PWM gate drive signals and fault feedback from inverter MCU to isolated gate drivers in 800 V SiC traction inverters. IC Role / Device Role / Timing Role: SI86S631EE-AS2 carries three synchronized PWM channels with 10 ns propagation delay and <3.5 ns pulse distortion to preserve dead-time integrity. Use Value: ≥100 kV/µs CMTI prevents false triggering of SiC MOSFETs during high dv/dt switching events in high-power inverters. |
| Onboard Charger (OBC) Communication | Automotive HVAC Inverter |
|
Use Scenario: Isolating CAN FD communication lines and analog sensor interfaces between OBC primary-side controller and secondary-side AC/DC stage. IC Role / Device Role / Timing Role: SI86S631EE-AS2 isolates UART-to-CAN bridge signals and temperature/voltage sense lines using its three independent channels. Use Value: AEC-Q100 Grade 1 qualification and –40 to 125 °C operation ensure reliability in under-hood OBC thermal environments. |
Use Scenario: Providing isolated feedback for compressor motor phase currents and DC-link voltage sensing in 48 V HVAC inverters. IC Role / Device Role / Timing Role: SI86S631EE-AS2 routes isolated analog front-end signals and inverter enable commands across the 48 V/12 V domain boundary. Use Value: Dual 2.25–5.5 V supply range allows direct interfacing with both 3.3 V MCU and 5 V analog sensor domains without level shifters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM3301ARWZ | 3-channel, 25 Mbps, 2.5 kVRMS, SOIC-16, no sleep mode, non-AEC-Q100 | Limited to industrial temp (–40 to 105 °C); insufficient for traction inverter junction temperature margin | Use only in non-automotive, lower-speed, non-reinforced insulation applications where cost is prioritized over safety certification. |
| ISO7731FDWR | 3-channel, 100 Mbps, 5 kVRMS, SOIC-16, no SMb pin, AEC-Q100 Grade 1 | Lacks sleep mode and has lower isolation rating-requires external filtering for 800 V systems | Acceptable for 400 V BMS but not for 800 V traction inverters requiring 6000 VRMS reinforced insulation per IEC 60747-17. |
Compared with ADUM3301ARWZ and ISO7731FDWR, SI86S631EE-AS2 uniquely combines AEC-Q100 Grade 1, 6000 VRMS reinforced isolation, 150 Mbps speed, and integrated sleep mode-making it the only qualified solution for next-generation 800 V EV powertrain subsystems demanding functional safety and ultra-low standby power.
Availability
SI86S631EE-AS2 is available at Aetrix Electronics and suitable for battery management systems, traction inverters, and onboard chargers requiring stable component supply with automotive-grade traceability and long-term lifecycle support.
Supply support for SI86S631EE-AS2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and isolation technologies for wireless, automotive, and industrial markets.
The Si86S6xx family was engineered specifically for high-reliability automotive and industrial isolation needs-delivering RF-based digital isolation with reinforced safety certification, extended temperature operation, and low-power modes for electrified vehicle architectures.
FAQ
What is the isolation voltage rating of SI86S631EE-AS2 and which safety standards does it meet?
SI86S631EE-AS2 is rated for 6000 VRMS isolation per UL 1577 (1 minute) and certified to IEC 60747-17 for reinforced insulation. It also meets CSA 62368-1 and 60601-1, and CQC GB4943.1-making SI86S631EE-AS2 compliant for use in medical and EV battery systems requiring reinforced insulation barriers.
Does SI86S631EE-AS2 require startup initialization or configuration before operation?
No, SI86S631EE-AS2 uses an RF-based on/off keying architecture with no firmware or calibration required. It begins transmitting immediately after VDD1 and VDD2 exceed their UVLO thresholds (~2.18 V), with a guaranteed 0.3 ms start-up time. SI86S631EE-AS2 operates deterministically from power-on without handshake or register programming.
How does the SMb pin function in SI86S631EE-AS2, and what is its impact on power consumption?
The SMb pin is an active-low sleep mode control. When pulled low, SI86S631EE-AS2 enters sleep mode drawing just 750 µA per side while retaining one always-active channel to monitor SMb state. Upon SMb release (high or open), full functionality resumes within microseconds-making SI86S631EE-AS2 ideal for low-duty-cycle automotive subsystems.
What is the default output behavior of SI86S631EE-AS2 when VDD1 is unpowered but VDD2 remains active?
SI86S631EE-AS2 offers ordering options for fail-safe default output: "E" suffix indicates default-low, "H" suffix indicates default-high. As an "EE" variant, SI86S631EE-AS2 defaults to logic low on all B-side outputs (B1–B3) when VDD1 falls below UVLO– (≤2.05 V), ensuring safe shutdown in BMS contactor control.
Can SI86S631EE-AS2 support bidirectional data flow across its three channels?
SI86S631EE-AS2 provides three unidirectional channels (A1→B1, A2→B2, A3→B3) with independent enable control via EN1 and EN2. While individual channels are unidirectional, the device supports simultaneous forward and reverse signaling by assigning different channels to each direction-e.g., A1/B1 for command, A2/B2 for feedback-without requiring external direction control logic.
SI86S631EE-AS2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- SPI
- Isolated Power:
- Yes
- Number of Channels:
- 3
- Inputs - Side 1/Side 2:
- 2/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 6000Vrms
- Common Mode Transient Immunity (Min):
- 150kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 42ns, 42ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI86S631EE-AS2 FAQ
1.How can I place an order for SI86S631EE-AS2 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S631EE-AS2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S631EE-AS2 reliable?
The price and inventory of SI86S631EE-AS2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S631EE-AS2 is usually 5 days.
3.What payment methods are accepted for SI86S631EE-AS2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S631EE-AS2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S631EE-AS2?
SI86S631EE-AS2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S631EE-AS2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S631EE-AS2?
For technical support, including SI86S631EE-AS2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S631EE-AS2 requirements.
6.How does Aetrix verify that SI86S631EE-AS2 is sourced from the original manufacturer or authorized distributors?
All SI86S631EE-AS2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S631EE-AS2 meets industry standards.
7.What is the process for return or replacement of SI86S631EE-AS2?
All SI86S631EE-AS2 units undergo pre-shipment inspection (PSI). If there is an issue with SI86S631EE-AS2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S631EE-AS2 part is unused and in its original packaging.
Return procedure for SI86S631EE-AS2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S631EE-AS2 Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
