My Inquiry
My Account
Skyworks Solutions Inc. SI86S640BC-IS1
- Part No.:
- SI86S640BC-IS1
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI86S640BC-IS1.pdf
- Description:
- 3.75 KVRMS ISOLATOR, 4 UNIDIRECT
- Quantity:
- Payment:
- Shipping:
Inventory:1,226
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI86S640BC-IS1 from Skyworks Solutions is a 4-channel, reinforced digital isolator with bidirectional signal isolation across an integrated semiconductor barrier. It supports DC to 150 Mbps data rates, delivers 10 ns typical propagation delay, and provides 6000 VRMS isolation rating in a narrow-body SOIC-16 package. It operates from 2.25–5.5 V supplies and is used in isolated ADC interfaces, motor control gate drivers, and battery management system communication links.
For engineers reviewing the SI86S640BC-IS1 datasheet, SI86S640BC-IS1 pinout, SI86S640BC-IS1 application, or SI86S640BC-IS1 equivalent, key selection criteria include its 6000 VRMS reinforced insulation (IEC 60747-17), fail-safe default-low output option, Schmitt-trigger + CMOS input thresholds, and compatibility with industrial and automotive isolation requirements up to 125 °C ambient.
Technical Context
The SI86S640BC-IS1 implements RF-based on/off keying modulation across a monolithic semiconductor isolation barrier, eliminating startup initialization and enabling robust noise immunity without optical components. Its architecture includes independent undervoltage lockout (UVLO) and reset circuitry per side (VDD1/VDD2), with RSTB thresholds at ~1.7 V and UVLO hysteresis of 105–160 mV.
It features four isolated bidirectional channels (A1–A4 / B1–B4), tri-state outputs controlled by EN1/EN2, and selectable fail-safe mode (default low for this variant). Input deglitch filtering with 36 ns rejection window is included, and output impedance is specified at 50 Ω ±40% for controlled-impedance PCB routing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial interfaces including isolated SPI and QSPI data paths. |
| Propagation delay | 10 ns typical - enables precise timing-critical applications such as gate driver feedback and real-time control loops. |
| Isolation rating | 6000 VRMS for 1 minute - meets reinforced insulation requirements per UL 1577 and IEC 60747-17 for industrial and automotive safety compliance. |
| Supply voltage | 2.25–5.5 V per side - allows interoperability with 3.3 V and 5 V logic domains without level-shifting. |
| Operating temperature | –40 to 125 °C - qualified for under-hood automotive and industrial environments with extended thermal margins. |
| Transient immunity | ≥100 kV/µs - ensures reliable operation in high-noise motor drive and power inverter systems. |
| Input threshold | Schmitt trigger + CMOS - provides ≥0.15×VDD hysteresis for noise rejection in electrically harsh environments. |
Pinout & Package
Narrow-body SOIC-16 (NB SOIC-16) package with creepage/clearance optimized for reinforced insulation. Pin 1 index marked; GND1 and GND2 are isolated grounds on respective sides.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1, VDD2 | Independent supply rails | Side A and Side B power inputs; each requires local 0.1 µF + 10 µF bypass capacitors. |
| GND1, GND2 | Isolated reference grounds | Must not be connected externally; defines separate ground domains across isolation barrier. |
| A1–A4 | Side A digital I/O | Bidirectional isolated inputs/outputs; compatible with CMOS/Schmitt logic levels. |
| B1–B4 | Side B digital I/O | Corresponding isolated outputs/inputs mirroring A-side signals across barrier. |
| EN1, EN2 | Active-high enable inputs | Tri-state all outputs on respective side when low; used for power sequencing and bus arbitration. |
Key Features
| Feature | Design Value |
|---|---|
| No start-up initialization | RF modulation architecture eliminates boot delay or configuration overhead - outputs become valid within 0.3 ms of VDD stabilization. |
| Fail-safe default-low output | Guaranteed logic-low state on B-side outputs during VDD1 loss while VDD2 remains powered - critical for safe shutdown in motor control. |
| 36 ns input deglitch filter | Rejects sub-36 ns noise pulses on A1–A4 inputs - prevents false triggering in EMI-heavy inverters and charging circuits. |
| Tri-state outputs with enable | EN1/EN2 allow single-pin control of all four A-side or B-side outputs - simplifies shared-bus isolation in multi-peripheral systems. |
| AEC-Q100 qualified | Qualified to Grade 1 (–40 to 125 °C) with automotive-specific manufacturing flow - supports onboard chargers and traction inverter designs. |
Applications
| Industrial Motor Control | Isolated ADC Interface |
|---|---|
|
Use Scenario: Gate driver feedback and current sensing isolation in 3-phase inverter stacks. IC Role / Device Role / Timing Role: Isolates PWM control signals and fault reporting between MCU and high-voltage IGBT/MOSFET drivers. Use Value: 10 ns propagation delay enables tight-loop current regulation; 6000 VRMS withstand supports 1200 V DC bus systems. |
Use Scenario: Isolating serial output of precision delta-sigma ADCs (e.g., ADS131M04) from host processor. IC Role / Device Role / Timing Role: Transfers high-resolution sampled data across isolation barrier without clock skew or jitter accumulation. Use Value: 150 Mbps capability supports 24-bit ADCs sampling at >1 MSPS; Schmitt inputs reject switching noise from adjacent power stages. |
| Battery Management System | Onboard Charger Communication |
|
Use Scenario: Isolating cell monitoring IC (e.g., BQ796x) daisy-chain UART or SPI from main BMS controller. IC Role / Device Role / Timing Role: Provides galvanic separation for fault signaling, balancing commands, and telemetry in multi-module packs. Use Value: Default-low fail-safe ensures open-wire detection triggers safe discharge; –40 to 125 °C range covers cold-weather EV operation. |
Use Scenario: Isolating CAN or SPI communication between OBC microcontroller and AC/DC power stage controller. IC Role / Device Role / Timing Role: Bridges control signals across primary-secondary boundary while maintaining functional safety integrity. Use Value: Reinforced IEC 60747-17 rating satisfies ISO 26262 ASIL-B requirements; 100 kV/µs CMTI prevents miscommunication during fast transients. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM2400ARWZ | 4-channel, 25 Mbps max, 5000 VRMS, SOIC-16, no deglitch filter | Limited to lower-speed industrial PLC I/O; lacks 150 Mbps and 36 ns filter for high-noise EV systems | Choose ADUM2400ARWZ only if data rate ≤25 Mbps and cost sensitivity outweighs CMTI and fail-safe needs. |
| ISO6741FDWR | 4-channel, 50 Mbps, 5000 VRMS, SOIC-16, default-high fail-safe only | Not rated for automotive AEC-Q100; failsafe defaults to high - incompatible with BMS fault-low protocols | Select ISO6741FDWR only for non-automotive 3.3 V systems where default-high behavior aligns with host logic. |
Compared with ADUM2400ARWZ and ISO6741FDWR, SI86S640BC-IS1 delivers 6× higher data rate, 20% higher isolation voltage, integrated deglitch filtering, and automotive-grade fail-safe low default - making it uniquely suitable for next-generation EV power electronics requiring both speed and safety assurance.
Availability
SI86S640BC-IS1 is available at Aetrix Electronics and suitable for industrial motor control, battery management systems, and onboard charger designs requiring stable component supply with long-term lifecycle support.
Supply support for SI86S640BC-IS1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si86S6xx family was designed specifically for high-reliability industrial and automotive isolation, emphasizing reinforced safety certification, wide temperature operation, and noise-immune RF-based architecture over legacy optocoupler alternatives.
FAQ
What is the isolation voltage rating of the SI86S640BC-IS1 and which safety standards does it meet?
The SI86S640BC-IS1 provides 6000 VRMS isolation for 1 minute and is certified to UL 1577, CSA 62368-1 and 60601-1, VDE 60747-17 (reinforced), and CQC GB4943.1. These approvals validate its use in medical, industrial, and automotive systems requiring reinforced insulation barriers - confirmed in Skyworks datasheet revision 206553B, Section "Safety Regulatory Approvals".
Does the SI86S640BC-IS1 support fail-safe operation, and what is its default state?
Yes, the SI86S640BC-IS1 is ordered with default-low fail-safe mode: when VDD1 is unpowered but VDD2 remains active, all B-side outputs hold low. This behavior is defined in Table 4 ("Si86S6x/Lx/Mx Logic Operation") and ensures safe shutdown in motor control and BMS applications - a key differentiator from default-high variants.
What is the purpose of the EN1 and EN2 pins on the SI86S640BC-IS1?
EN1 and EN2 are active-high enable inputs that place all outputs on Side A or Side B into high-impedance (tri-state) when driven low. They support bus arbitration, power sequencing, and dynamic channel disabling - documented in Table 1 ("Pin Descriptions") and Figure 2 ("Si86S64x/L4x Pinouts") of the SI86S6xx datasheet.
Can the SI86S640BC-IS1 be used in automotive applications, and what qualification does it hold?
Yes, the SI86S640BC-IS1 is AEC-Q100 qualified (Grade 1, –40 to 125 °C) and built using automotive-specific manufacturing flows. It supports onboard chargers, battery management systems, and traction inverters - explicitly listed under "Automotive Applications" in the datasheet and validated for PPAP documentation per AIAG standards.
What is the input deglitch filter specification for the SI86S640BC-IS1?
The SI86S640BC-IS1 includes a factory-configured 36 ns input deglitch filter on all A-side inputs (A1–A4), rejecting noise pulses shorter than 36 ns while adding only that fixed delay to valid signals - detailed in Section "3.4.5. Input Noise Filters" and Figure 15 of the datasheet.
SI86S640BC-IS1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- No
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 4/0
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 3750Vrms
- Common Mode Transient Immunity (Min):
- 100kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 14ns, 14ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI86S640BC-IS1 FAQ
1.How can I place an order for SI86S640BC-IS1 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S640BC-IS1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S640BC-IS1 reliable?
The price and inventory of SI86S640BC-IS1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S640BC-IS1 is usually 5 days.
3.What payment methods are accepted for SI86S640BC-IS1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S640BC-IS1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S640BC-IS1?
SI86S640BC-IS1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S640BC-IS1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S640BC-IS1?
For technical support, including SI86S640BC-IS1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S640BC-IS1 requirements.
6.How does Aetrix verify that SI86S640BC-IS1 is sourced from the original manufacturer or authorized distributors?
All SI86S640BC-IS1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S640BC-IS1 meets industry standards.
7.What is the process for return or replacement of SI86S640BC-IS1?
All SI86S640BC-IS1 units undergo pre-shipment inspection (PSI). If there is an issue with SI86S640BC-IS1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S640BC-IS1 part is unused and in its original packaging.
Return procedure for SI86S640BC-IS1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S640BC-IS1 Tags
-
ISO1212DBQR
Texas Instruments
-
ISO6721BDR
Texas Instruments
-
SI8710AC-B-ISR
Skyworks Solutions Inc.
-
ISO7720FDR
Texas Instruments
-
ISO7721DR
Texas Instruments
-
ISO7721FDR
Texas Instruments
-
SI8710CC-B-ISR
Skyworks Solutions Inc.
-
ISO6741FQDWRQ1
Texas Instruments
-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments
-
ISO7741DWR
Texas Instruments
-
ISO7741FDWR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
