Skyworks Solutions Inc. SI86S640FE-AS2R
- Part No.:
- SI86S640FE-AS2R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI86S640FE-AS2R.pdf
- Description:
- 6.0 KVRMS ISOLATOR, 4 UNIDIRECTI
- Quantity:
- Payment:

- Shipping:

Inventory:2,014
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Product details
Overview
SI86S640FE-AS2R from Skyworks Solutions is a 4-channel reinforced digital isolator with bidirectional signal isolation across an RF-based semiconductor barrier, supporting up to 150 Mbps data rate, 10 ns typical propagation delay, and 6000 VRMS isolation rating. It operates from 2.25–5.5 V on both sides and features Schmitt-trigger + CMOS inputs, tri-state outputs with enable, and selectable fail-safe default-high output mode - used in isolated ADC interfaces and motor control gate drivers.
For engineers reviewing the SI86S640FE-AS2R datasheet, SI86S640FE-AS2R pinout, SI86S640FE-AS2R application, or SI86S640FE-AS2R equivalent, key selection criteria include reinforced IEC 60747-17 certification, AEC-Q100 qualification, 36 ns input deglitch filtering, sleep-mode support via SMb pin, and WB SOIC-16 package compatibility with 8 mm creepage/clearance.
Technical Context
The SI86S640FE-AS2R implements RF-based on/off keying modulation across a monolithic semiconductor isolation barrier, eliminating startup initialization and enabling deterministic timing behavior. Its architecture supports independent undervoltage lockout (UVLO) and reset circuitry per side (VDD1/VDD2), with RSTB thresholds at ~1.7 V and UVLO hysteresis of 105–160 mV.
It integrates four isolated bidirectional channels with dedicated EN1/EN2 enable inputs, supports fail-safe operation with default-high output configuration (denoted by "F" in part number), and includes 36 ns input noise filters - confirmed for Si86S64x family variants per datasheet Section 3.4.5.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - enables high-speed serial links such as isolated SPI clock domains and real-time motor feedback paths. |
| Propagation delay | 10 ns typical - ensures tight timing alignment between controller and isolated peripheral in closed-loop systems. |
| Isolation rating | 6000 VRMS (1 min) - meets reinforced insulation requirements for industrial inverters and EV battery management systems. |
| Supply voltage | 2.25–5.5 V per side - allows interoperability with 3.3 V microcontrollers and 5 V analog front-ends without level-shifting. |
| Input filter | 36 ns deglitch time - suppresses EFT-induced transients below 36 ns width, improving robustness in noisy motor drive environments. |
| Fail-safe mode | Default-high output - maintains active-high enable state during power loss on Side A, critical for safety-critical gate driver shutdown logic. |
| Transient immunity | ≥100 kV/µs CMTI - prevents false triggering under fast common-mode dv/dt events in high-power switching nodes. |
Pinout & Package
SI86S640FE-AS2R is housed in a wide-body SOIC-16 (WB SOIC-16) package with 8.0 mm creepage and clearance, supporting 6000 VRMS reinforced isolation per UL 1577.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1, GND1 | Side A power supply | Provides bias for primary-side transmitter circuits; requires 0.1 µF + 10 µF bypassing per layout guidelines. |
| A1–A4 | Side A digital I/O | Four isolated input/output channels on controller side; compatible with CMOS/Schmitt thresholds. |
| EN1 | Side A output enable | Active-high control for tristating all Side A outputs; internal 10 kΩ pull-up recommended. |
| VDD2, GND2 | Side B power supply | Independent bias for secondary-side receiver circuits; supports galvanic separation of ground domains. |
| B1–B4 | Side B digital I/O | Four isolated output/input channels on isolated side; electrically decoupled from Side A. |
| EN2 | Side B output enable | Active-high control for tristating all Side B outputs; enables synchronized channel disable across isolation barrier. |
| SMb | Sleep mode control | Active-low pin that disables internal RF transmitters while retaining one channel for wake-up detection. |
Key Features
| Feature | Design Value |
|---|---|
| No-startup initialization | RF carrier modulation eliminates boot sequence dependency - enables immediate data transmission after VDD stabilization. |
| Reinforced IEC 60747-17 rating | Validated for functional safety applications requiring dual-insulation integrity, including medical and automotive BMS designs. |
| Tri-state outputs with enable | EN1/EN2 pins allow dynamic bus contention avoidance in multi-master isolated SPI or CAN FD subsystems. |
| Selectable fail-safe output | "F" suffix denotes factory-configured default-high state during VDD1 undervoltage - ensures safe deactivation of downstream power stages. |
| 36 ns input deglitch filter | Hardware-level pulse rejection prevents metastability in noisy industrial environments without firmware overhead. |
Applications
| Isolated ADC Interface | Motor Gate Driver Control |
|---|---|
Use Scenario: Isolating serial interface between MCU and sigma-delta ADC in high-voltage battery monitoring system. IC Role / Device Role / Timing Role: Digital isolator providing galvanic separation for SCLK, SDATA, and CS signals while preserving 150 Mbps timing fidelity. Use Value: Enables accurate 16-bit ADC sampling in 800 V DC-link environments without ground loop interference or timing skew. | Use Scenario: Isolating PWM signals from MCU to half-bridge gate drivers in traction inverter. IC Role / Device Role / Timing Role: Bidirectional isolator conveying PWM commands and fault feedback (e.g., DESAT) across isolation barrier with <10 ns skew. Use Value: Prevents shoot-through failures by ensuring simultaneous, low-skew gate drive activation and fast desaturation signal return. |
| Onboard Charger Communication | Battery Management System |
Use Scenario: Isolating UART/RS-485 interface between OBC controller and vehicle CAN network. IC Role / Device Role / Timing Role: Signal isolator for bidirectional command/response traffic with fail-safe default-high output during MCU brownout. Use Value: Maintains communication integrity during transient line faults and supports AEC-Q100-compliant automotive qualification. | Use Scenario: Isolating cell voltage measurement ICs from main BMS microcontroller in EV battery pack. IC Role / Device Role / Timing Role: Four-channel isolator separating analog front-end SPI bus and digital status lines from MCU domain. Use Value: Achieves 6000 VRMS reinforced insulation required for ASIL-D functional safety compliance in ISO 26262 systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM4402BRIZ | 4-channel, 100 Mbps, 5000 VRMS, no deglitch filter, no SMb pin | Lacks 36 ns input filtering and sleep mode; rated for 5000 VRMS only | Acceptable where lower isolation voltage and absence of noise filtering are acceptable |
| ISO6741FDWR | 4-channel, 50 Mbps, 5000 VRMS, no fail-safe option, no deglitch filter | Lower data rate limits use in high-speed ADC interfaces; no default-high configuration | Suitable for cost-sensitive industrial PLC I/O modules with moderate noise immunity needs |
Compared with ADUM4402BRIZ and ISO6741FDWR, SI86S640FE-AS2R delivers higher isolation (6000 VRMS), integrated 36 ns deglitching, and configurable fail-safe output - making it preferred for automotive onboard chargers and ASIL-B/C BMS designs requiring deterministic fault response.
Availability
SI86S640FE-AS2R is available at Aetrix Electronics and suitable for industrial automation systems, battery management systems, and motor control applications requiring stable component supply, long-term lifecycle support, and automotive-grade reliability.
Supply support for SI86S640FE-AS2R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si86S6xx family is engineered for high-reliability industrial and automotive isolation, delivering RF-based digital isolation with reinforced safety certification, low-latency timing, and integrated noise resilience features.
FAQ
What is the isolation voltage rating of the SI86S640FE-AS2R?
The SI86S640FE-AS2R is rated for 6000 VRMS isolation per UL 1577 for 1 minute, with reinforced insulation certified to IEC 60747-17. This rating applies specifically to the WB SOIC-16 package variant and supports use in high-voltage systems such as EV traction inverters and industrial switch-mode supplies where reinforced barrier integrity is mandatory.
Does the SI86S640FE-AS2R support fail-safe operation, and how is it configured?
Yes, the SI86S640FE-AS2R supports fail-safe operation with a default-high output state during VDD1 undervoltage, indicated by the "F" in its part number. This configuration is factory-set and ensures outputs remain logic-high when the controller-side supply drops below UVLO threshold - critical for maintaining safe-off states in gate driver control paths.
What does the "AS2R" suffix indicate in SI86S640FE-AS2R?
The "AS2R" suffix denotes the WB SOIC-16 package (AS), tape-and-reel packaging (R), and automotive-grade qualification (2). This confirms the SI86S640FE-AS2R meets AEC-Q100 Grade 1 requirements (–40°C to +125°C), includes PPAP documentation support, and is manufactured using automotive-specific process flows.
Can the SI86S640FE-AS2R be used in SPI isolation applications?
Yes, the SI86S640FE-AS2R supports SPI isolation through its four independent bidirectional channels. While not a dedicated SPI isolator like Si86SS41, it can isolate MOSI, MISO, SCLK, and CS signals with matched propagation delays (<10 ns typical) and 150 Mbps capability - enabling reliable high-speed isolated SPI in motor control and isolated ADC interfaces.
What is the purpose of the SMb pin on the SI86S640FE-AS2R?
The SMb (Sleep Mode) pin on the SI86S640FE-AS2R is an active-low control that places the device into ultra-low-power sleep mode (750 µA per side) while retaining one always-on channel to monitor SMb state. This allows rapid wake-up without reinitialization - ideal for intermittent communication in battery-powered BMS sensor nodes.
SI86S640FE-AS2R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- SPI
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 4/0
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 6000Vrms
- Common Mode Transient Immunity (Min):
- 150kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 42ns, 42ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI86S640FE-AS2R FAQ
1.How can I place an order for SI86S640FE-AS2R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S640FE-AS2R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S640FE-AS2R reliable?
The price and inventory of SI86S640FE-AS2R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S640FE-AS2R is usually 5 days.
3.What payment methods are accepted for SI86S640FE-AS2R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S640FE-AS2R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S640FE-AS2R?
SI86S640FE-AS2R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S640FE-AS2R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S640FE-AS2R?
For technical support, including SI86S640FE-AS2R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S640FE-AS2R requirements.
6.How does Aetrix verify that SI86S640FE-AS2R is sourced from the original manufacturer or authorized distributors?
All SI86S640FE-AS2R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S640FE-AS2R meets industry standards.
7.What is the process for return or replacement of SI86S640FE-AS2R?
All SI86S640FE-AS2R units undergo pre-shipment inspection (PSI). If there is an issue with SI86S640FE-AS2R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S640FE-AS2R part is unused and in its original packaging.
Return procedure for SI86S640FE-AS2R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S640FE-AS2R Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

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SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

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ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
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