Skyworks Solutions Inc. SI86S641EB-IUR
- Part No.:
- SI86S641EB-IUR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
SI86S641EB-IUR.pdf
- Description:
- 2.5 KVRMS ISOLATOR, 4 UNIDIRECTI
- Quantity:
- Payment:

- Shipping:

Inventory:4,745
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Product details
Overview
SI86S641EB-IUR from Skyworks Solutions is a 4-channel reinforced digital isolator with bidirectional signal isolation across an integrated semiconductor barrier. It delivers 150 Mbps data rate, 10 ns typical propagation delay, and 6000 VRMS isolation rating in a narrow-body SOIC-16 package. It operates from 2.25–5.5 V supplies on both sides and supports fail-safe default-high output mode for industrial motor control interfaces.
For engineers reviewing the SI86S641EB-IUR datasheet, SI86S641EB-IUR pinout, SI86S641EB-IUR application, or SI86S641EB-IUR equivalent, key selection criteria include its AEC-Q100 qualification, IEC 60747-17 reinforced insulation, 36 ns input deglitch filter, tri-state outputs with enable, and compatibility with isolated SPI and ADC/DAC interfaces in high-noise environments.
Technical Context
The SI86S641EB-IUR implements RF-based on/off keying modulation across a monolithic silicon dioxide isolation barrier, eliminating startup initialization and enabling deterministic timing behavior. Its dual-supply architecture (VDD1/VDD2) supports independent 2.25–5.5 V operation per side, with undervoltage lockout (UVLO) thresholds at 2.10–2.25 V and reset detection at ~1.7 V.
It features Schmitt-trigger + CMOS threshold inputs for noise immunity, 100 kV/µs CMTI, and selectable fail-safe output state (default-high per "E" ordering suffix). The device includes EN1/EN2 pins for side-specific tri-state control and supports sleep mode via external pin when enabled in compatible variants-though SI86S641EB-IUR does not incorporate SMb functionality.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial links including isolated SPI and QSPI without protocol translation. |
| Propagation delay | 10 ns typical - enables tight timing budgets in real-time motor control and power converter feedback loops. |
| Isolation rating | 6000 VRMS - meets reinforced insulation requirements per UL 1577 and IEC 60747-17 for industrial safety-critical systems. |
| Supply voltage | 2.25–5.5 V per side - allows interoperability with 3.3 V and 5 V logic domains without level shifters. |
| Input deglitch | 36 ns filter - suppresses sub-36 ns noise pulses on A-side inputs, critical for reliable operation in EMI-heavy inverters and BMS. |
| Fail-safe mode | Default-high output - ensures safe system state during VDD1 loss while VDD2 remains powered (ordering option "E"). |
| Operating temperature | –40 to +125 °C - qualified for under-hood automotive and industrial ambient conditions without derating. |
Pinout & Package
Narrow-body SOIC-16 (NB SOIC-16) package with 7.5 mm creepage/clearance, RoHS-compliant, and rated for 6000 VRMS isolation per UL 1577.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Side A supply | Power for input-side logic and transmitter circuits; bypass with 0.1 µF + 10 µF capacitors. |
| GND1 | Side A ground | Reference for A-side I/O and supply; must be separated from GND2 by PCB isolation barrier. |
| A1–A4 | Side A digital I/O | Four unidirectional input channels from controller domain; accept Schmitt-trigger + CMOS thresholds. |
| EN1 | Side A enable | Active-high control: drives all A-side outputs into high-impedance when low, enabling bus sharing. |
| Isolation Barrier | Internal die boundary | Monolithic SiO₂ barrier providing 6000 VRMS reinforced insulation; no external components required. |
| B1–B4 | Side B digital I/O | Four isolated output channels to peripheral domain; default-high state during VDD1 loss (per "E" suffix). |
| EN2 | Side B enable | Active-high control: places all B-side outputs in high-impedance, supporting multi-drop isolated buses. |
| GND2 | Side B ground | Reference for B-side logic and receiver; galvanically isolated from GND1 per safety standards. |
| VDD2 | Side B supply | Power for output-side logic and receiver; independent of VDD1, enabling asymmetric supply configurations. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation | Eliminates LED aging and temperature drift of optocouplers; enables stable 150 Mbps operation over –40 to +125 °C. |
| 36 ns input deglitch filter | Rejects fast transients common in motor drive gate drivers and battery pack sensing, preventing false triggering. |
| Tri-state outputs with EN1/EN2 | Allows multiple isolators to share a common isolated bus without contention, reducing component count in modular designs. |
| Reinforced IEC 60747-17 rating | Validates suitability for medical (60601-1) and industrial (62368-1) end-equipment safety certifications without additional system-level testing. |
| AEC-Q100 Grade 1 qualification | Confirms reliability for automotive applications including onboard chargers and traction inverter control modules. |
Applications
| Industrial Motor Control | Isolated ADC Interface |
|---|---|
|
Use Scenario: Gate driver signal isolation in 3-phase IGBT/SiC inverter stages for HVAC compressors and servo drives. IC Role / Device Role / Timing Role: Transmits PWM enable/disable and fault signals across isolation barrier with <10 ns skew between channels. Use Value: Enables precise timing-critical switching while meeting 6000 VRMS reinforced insulation for functional safety compliance (IEC 61800-5-1). |
Use Scenario: Isolating serial interface between microcontroller and isolated Σ-Δ ADC in precision current sensing for battery management. IC Role / Device Role / Timing Role: Carries SPI clock, MOSI, MISO, and CS# signals across barrier with deterministic 10 ns propagation delay. Use Value: Preserves ADC resolution by eliminating ground loop noise and enabling >100 dB SNR in noisy high-voltage battery stacks. |
| Onboard Charger (OBC) | Traction Inverter Control |
|
Use Scenario: Isolating communication between AC/DC PFC controller and DC/DC LLC controller in EV onboard chargers. IC Role / Device Role / Timing Role: Transfers status, fault, and synchronization signals with fail-safe default-high output during primary-side brownout. Use Value: Prevents unsafe secondary-side activation during input loss, satisfying ISO 6469-3 functional safety requirements. |
Use Scenario: Isolating gate drive signals and current sense feedback in dual-motor traction inverters for battery electric vehicles. IC Role / Device Role / Timing Role: Delivers synchronized, low-skew PWM signals to six half-bridge gate drivers with 100 kV/µs CMTI immunity. Use Value: Ensures robust operation in high-dv/dt environments (>50 V/ns) without desaturation faults or false overcurrent trips. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM141E0BRZ | 4-channel, 150 Mbps, 5000 VRMS, 10 ns delay; uses iCoupler® capacitive isolation; no deglitch filter. | Lacks 36 ns input filtering and 6000 VRMS rating; suitable for non-safety-critical industrial controls. | Select ADUM141E0BRZ where lower isolation voltage suffices and legacy iCoupler® ecosystem integration is prioritized. |
| ISO7741FDWR | 4-channel, 100 Mbps, 5000 VRMS, 11 ns delay; reinforced VDE/UL/CSA; includes 25 ns deglitch filter. | Lower data rate and isolation rating; optimized for cost-sensitive industrial PLC I/O modules. | Choose ISO7741FDWR for budget-constrained designs requiring basic reinforced isolation without 150 Mbps or 6 kVRMS. |
Compared with ADUM141E0BRZ and ISO7741FDWR, SI86S641EB-IUR provides higher isolation voltage (6000 vs. 5000 VRMS), faster data rate (150 vs. 100 Mbps), and a longer input deglitch window (36 ns), making it preferred for automotive-grade OBCs and high-reliability motor drives requiring extended transient immunity.
Availability
SI86S641EB-IUR is available at Aetrix Electronics and suitable for industrial motor control, isolated ADC/DAC interfaces, onboard chargers, and traction inverter control requiring stable component supply across automotive and industrial production lifecycles.
Supply support for SI86S641EB-IUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for high-performance wireless and wired systems.
The Si86S6xx family was designed to replace optocouplers in demanding industrial and automotive applications, delivering higher speed, lower power, and certified reinforced isolation without optical degradation or startup delays.
FAQ
What is the isolation voltage rating of the SI86S641EB-IUR and which safety standards does it meet?
The SI86S641EB-IUR is rated for 6000 VRMS isolation per UL 1577 for 1 minute and carries reinforced insulation certification per IEC 60747-17. It also meets CSA 62368-1 and 60601-1, and CQC GB4943.1. These approvals validate its use in safety-critical applications such as medical equipment and EV traction systems where reinforced insulation is mandated.
Does the SI86S641EB-IUR support fail-safe operation, and how is it configured?
Yes, the SI86S641EB-IUR implements fail-safe operation with a default-high output state during VDD1 loss while VDD2 remains powered-enabled by the "E" suffix in its part number. This behavior is hard-coded per ordering option and requires no external configuration; it ensures downstream circuitry remains in a known safe state during primary-side power interruption.
What is the purpose of the 36 ns input deglitch filter in the SI86S641EB-IUR?
The 36 ns input deglitch filter in the SI86S641EB-IUR suppresses noise pulses shorter than 36 ns on the A-side inputs, preventing false triggering in high-EMI environments like motor drives and battery inverters. It is factory-enabled for the "S64x" series and improves system reliability without adding external RC networks or firmware debouncing.
Can the SI86S641EB-IUR be used in automotive applications, and what qualifications does it hold?
Yes, the SI86S641EB-IUR is AEC-Q100 Grade 1 qualified (–40 to +125 °C) and built using automotive-specific manufacturing flows. It supports AIAG-compliant PPAP documentation and IMDS/CAMDS reporting, making it suitable for automotive applications including onboard chargers, battery management systems, and traction inverter control modules.
How does the SI86S641EB-IUR differ from optocouplers in terms of startup and timing behavior?
Unlike optocouplers, the SI86S641EB-IUR requires no start-up initialization and achieves deterministic timing from power-on. Its RF-based architecture delivers consistent 10 ns propagation delay and 3.5 ns pulse width distortion across temperature and voltage, eliminating the variability and aging effects inherent in LED-based isolation.
SI86S641EB-IUR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- No
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 3/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- 100kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 14ns, 14ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QSOP
SI86S641EB-IUR FAQ
1.How can I place an order for SI86S641EB-IUR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S641EB-IUR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S641EB-IUR reliable?
The price and inventory of SI86S641EB-IUR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S641EB-IUR is usually 5 days.
3.What payment methods are accepted for SI86S641EB-IUR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S641EB-IUR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S641EB-IUR?
SI86S641EB-IUR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S641EB-IUR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S641EB-IUR?
For technical support, including SI86S641EB-IUR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S641EB-IUR requirements.
6.How does Aetrix verify that SI86S641EB-IUR is sourced from the original manufacturer or authorized distributors?
All SI86S641EB-IUR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S641EB-IUR meets industry standards.
7.What is the process for return or replacement of SI86S641EB-IUR?
All SI86S641EB-IUR units undergo pre-shipment inspection (PSI). If there is an issue with SI86S641EB-IUR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S641EB-IUR part is unused and in its original packaging.
Return procedure for SI86S641EB-IUR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S641EB-IUR Tags
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ISO1212DBQR
Texas Instruments

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ISO6721BDR
Texas Instruments

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SI8710AC-B-ISR
Skyworks Solutions Inc.

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ISO7720FDR
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ISO7721DR
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ISO7721FDR
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SI8710CC-B-ISR
Skyworks Solutions Inc.

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ISO6741FQDWRQ1
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ISO7721DWVR
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ISO7762FDBQR
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ISO7741DWR
Texas Instruments

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ISO7741FDWR
Texas Instruments
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