Skyworks Solutions Inc. SI86S642EE-AS2R
- Part No.:
- SI86S642EE-AS2R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI86S642EE-AS2R.pdf
- Description:
- 6.0 KVRMS ISOLATOR, 4 UNIDIRECTI
- Quantity:
- Payment:

- Shipping:

Inventory:4,373
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI86S642EE-AS2R from Skyworks Solutions is a 4-channel reinforced digital isolator with bidirectional signal isolation across an integrated semiconductor barrier, supporting up to 150 Mbps data rate, 10 ns typical propagation delay, and 6000 VRMS isolation rating. It operates from 2.25–5.5 V supplies on both sides and features selectable fail-safe output (default low), Schmitt-trigger inputs, and tri-state outputs with enable control - deployed in battery management systems and isolated ADC interfaces.
For engineers reviewing the SI86S642EE-AS2R datasheet, SI86S642EE-AS2R pinout, SI86S642EE-AS2R application, or SI86S642EE-AS2R equivalent, key selection criteria include reinforced IEC 60747-17 certification, AEC-Q100 qualification for automotive use, 36 ns input deglitch filtering, and WB SOIC-16 package compatibility with 8.3 mm creepage/clearance.
Technical Context
The SI86S642EE-AS2R implements RF-based on/off keying modulation across its isolation barrier, eliminating startup initialization and enabling robust noise immunity with 100 kV/µs CMTI. Its architecture supports independent undervoltage lockout (UVLO) and reset monitoring on both sides (VDD1/VDD2), with RSTB thresholds at ~1.7 V and UVLO hysteresis of 105–160 mV.
It integrates four isolated bidirectional channels with dedicated EN1/EN2 enable pins per side, tri-state output control, and failsafe default-low output configuration confirmed by ordering code "EE". Input deglitch filtering (36 ns) is factory-enabled for all channels, rejecting sub-duration noise pulses without affecting valid signal timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial links including isolated SPI and QSPI interfaces. |
| Propagation delay | 10 ns typical - enables tight timing budgets in motor control gate drivers and real-time feedback loops. |
| Isolation rating | 6000 VRMS - meets reinforced insulation requirements per UL 1577 and IEC 60747-17 for industrial and automotive safety-critical systems. |
| Supply voltage | 2.25–5.5 V per side - allows interoperability with 3.3 V and 5 V logic domains without level shifting. |
| Input deglitch time | 36 ns - suppresses EMI-induced glitches in noisy environments like traction inverters and onboard chargers. |
| Operating temperature | –40 to +125 °C - qualified for under-hood automotive and industrial ambient conditions. |
| CMTI | ≥100 kV/µs - ensures reliable operation in high dv/dt switching nodes of power converters. |
Pinout & Package
SI86S642EE-AS2R is housed in a wide-body SOIC-16 (WB SOIC-16) package with 8.3 mm creepage and clearance, supporting 6000 VRMS isolation. Pin numbering follows standard SOIC-16 layout with isolation barrier between pins 1–8 (Side A) and 9–16 (Side B).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1, GND1 | Side A power supply | Provides bias for A-side transmitters and receivers; requires 0.1 µF + 10 µF bypassing per side. |
| A1–A4 | Side A digital I/O | Four isolated input/output channels on primary side; compatible with CMOS/Schmitt-trigger logic levels. |
| EN1 | Side A output enable | Active-high control for tri-stating all A-side outputs; internal 10 kΩ pull-up recommended. |
| VDD2, GND2 | Side B power supply | Independent secondary-side supply; enables galvanic separation for ground-referenced peripherals. |
| B1–B4 | Side B digital I/O | Four isolated channels mirrored to A-side; supports bidirectional data flow with channel independence. |
| EN2 | Side B output enable | Active-high control for tri-stating all B-side outputs; decouples B-side logic during system sleep or fault recovery. |
Key Features
| Feature | Design Value |
|---|---|
| No-startup initialization | RF-modulated architecture eliminates boot sequence delays - output transitions begin immediately after VDD stabilization. |
| Selectable fail-safe mode | "EE" ordering suffix confirms default-low output state during VDD1 unpowering - critical for safe shutdown in BMS fault conditions. |
| Reinforced insulation | IEC 60747-17 and UL 1577 certified at 6000 VRMS - satisfies reinforced insulation requirements for medical (60601-1) and industrial (62368-1) end equipment. |
| AEC-Q100 Grade 1 | Qualified for automotive applications from –40 to +125 °C - validated across temperature cycling, HTOL, and ESD stress per AEC-Q100 Rev H. |
| 36 ns input deglitch filter | Hardware-filtered inputs reject transient noise below 36 ns width - prevents false triggering in high-noise motor drive and inverter gate driver circuits. |
Applications
| Battery Management System (BMS) | Isolated ADC Interface |
|---|---|
Use Scenario: Monitoring cell voltages and temperatures in high-voltage EV battery packs with microcontroller on low-voltage side. IC Role / Device Role / Timing Role: Isolates analog front-end measurement signals and control commands across 400–800 V DC bus while maintaining <10 ns timing alignment. Use Value: Enables safe, accurate real-time cell balancing using 6000 VRMS-rated barrier and AEC-Q100 qualification for automotive lifecycle reliability. | Use Scenario: Transmitting precision sensor data from isolated high-side current/voltage monitors to host MCU in industrial power supplies. IC Role / Device Role / Timing Role: Digitally isolates serial output (e.g., SPI) of delta-sigma ADCs with minimal propagation delay skew across multiple channels. Use Value: Preserves 16-bit+ resolution integrity via 150 Mbps capability and 3.5 ns pulse width distortion - critical for closed-loop regulation accuracy. |
| Traction Inverter Control | Onboard Charger Communication |
Use Scenario: Isolating gate driver enable/disable signals and fault feedback between MCU and SiC/GaN half-bridge modules. IC Role / Device Role / Timing Role: Delivers synchronized, glitch-free PWM edge transmission with 100 kV/µs CMTI immunity in high dv/dt switching environments. Use Value: Prevents false turn-on/turn-off events during fast switching transients - directly improves inverter efficiency and device lifetime. | Use Scenario: Isolating CAN or UART communication lines between AC/DC converter controller and vehicle network in Level 2/3 chargers. IC Role / Device Role / Timing Role: Provides bidirectional serial data isolation with independent enable control per side for protocol handshaking and error reporting. Use Value: Supports functional safety compliance (ISO 26262 ASIL-B) through reinforced insulation and fail-safe default-low signaling on loss of primary supply. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM2402BRWZ | 4-channel, 25 Mbps max data rate; 50 ns propagation delay; 5000 VRMS isolation; SOIC-16 NB package. | Limited to industrial temp range (–40 to +105 °C); no AEC-Q100 or deglitch filtering. | Preferred where cost sensitivity outweighs speed/safety requirements and automotive qualification is not needed. |
| ISO7742FDWR | 4-channel, 100 Mbps max data rate; 11 ns propagation delay; 5000 VRMS; SOIC-16 WB package; no deglitch filter. | UL 1577 only (not IEC 60747-17 reinforced); lacks AEC-Q100 qualification and default-low fail-safe option. | Suitable for non-automotive industrial systems requiring higher speed than ADUM2402 but lower isolation voltage than SI86S642EE-AS2R. |
Compared with ADUM2402BRWZ and ISO7742FDWR, SI86S642EE-AS2R delivers 150 Mbps speed, 6000 VRMS reinforced isolation, AEC-Q100 Grade 1 qualification, and factory-configured 36 ns deglitching - making it uniquely suited for automotive traction and charging systems requiring functional safety and high-noise resilience.
Availability
SI86S642EE-AS2R is available at Aetrix Electronics and suitable for battery management systems, traction inverters, onboard chargers, and isolated ADC interfaces requiring stable component supply across automotive and industrial production cycles.
Supply support for SI86S642EE-AS2R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si86S6xx family is engineered for high-reliability galvanic isolation in automotive and industrial power systems, emphasizing reinforced safety certification, high-speed performance, and noise-immune operation in harsh electromagnetic environments.
FAQ
What is the isolation voltage rating of the SI86S642EE-AS2R and which safety standards does it meet?
The SI86S642EE-AS2R is rated for 6000 VRMS isolation per UL 1577 for 1 minute and certified to IEC 60747-17 for reinforced insulation. It also meets CSA 62368-1 and 60601-1, and CQC GB4943.1 - enabling use in medical, industrial, and automotive systems requiring reinforced barrier integrity. SI86S642EE-AS2R achieves this in a WB SOIC-16 package with 8.3 mm creepage.
Does the SI86S642EE-AS2R support fail-safe operation, and how is it configured?
Yes, SI86S642EE-AS2R implements selectable fail-safe mode via ordering option: the "EE" suffix denotes default-low output state when VDD1 is unpowered but VDD2 remains active. This behavior is hard-coded in silicon and verified in Table 4 of the datasheet, ensuring predictable shutdown in BMS or inverter fault conditions without external circuitry.
What is the purpose of the 36 ns input deglitch filter in the SI86S642EE-AS2R?
The 36 ns input deglitch filter in SI86S642EE-AS2R rejects noise pulses shorter than 36 ns on all four channels, preventing false triggering in high-EMI environments like motor drives and DC-DC converters. This hardware filter is factory-enabled and does not add propagation delay to valid signals - only attenuates sub-duration transients, as confirmed in Section 3.4.5 of the datasheet.
Is the SI86S642EE-AS2R qualified for automotive applications, and what does AEC-Q100 Grade 1 mean?
Yes, SI86S642EE-AS2R is AEC-Q100 Grade 1 qualified, meaning it is tested and certified for operation from –40 °C to +125 °C ambient, with full stress validation including temperature cycling, HTOL, and ESD per Rev H. This qualification supports deployment in engine bay, battery, and powertrain systems where reliability under thermal and electrical stress is mandatory.
How does the SI86S642EE-AS2R handle power supply sequencing and undervoltage conditions?
SI86S642EE-AS2R features independent UVLO and reset monitors on VDD1 and VDD2, with UVLO+ at 2.10–2.25 V and RSTB– at ~1.7 V. During brownout, outputs enter a known state (default low per "EE") within 0.3 ms, and weak 100 kΩ pulldowns hold outputs low until stable supply is restored - ensuring deterministic behavior during power transients without external supervision.
SI86S642EE-AS2R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- SPI
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 2/2
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 6000Vrms
- Common Mode Transient Immunity (Min):
- 150kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 42ns, 42ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI86S642EE-AS2R FAQ
1.How can I place an order for SI86S642EE-AS2R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S642EE-AS2R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S642EE-AS2R reliable?
The price and inventory of SI86S642EE-AS2R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S642EE-AS2R is usually 5 days.
3.What payment methods are accepted for SI86S642EE-AS2R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S642EE-AS2R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S642EE-AS2R?
SI86S642EE-AS2R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S642EE-AS2R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S642EE-AS2R?
For technical support, including SI86S642EE-AS2R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S642EE-AS2R requirements.
6.How does Aetrix verify that SI86S642EE-AS2R is sourced from the original manufacturer or authorized distributors?
All SI86S642EE-AS2R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S642EE-AS2R meets industry standards.
7.What is the process for return or replacement of SI86S642EE-AS2R?
All SI86S642EE-AS2R units undergo pre-shipment inspection (PSI). If there is an issue with SI86S642EE-AS2R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S642EE-AS2R part is unused and in its original packaging.
Return procedure for SI86S642EE-AS2R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S642EE-AS2R Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
