Skyworks Solutions Inc. SI86S642HC-AS1R
- Part No.:
- SI86S642HC-AS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI86S642HC-AS1R.pdf
- Description:
- 3.75 KVRMS ISOLATOR, 4 UNIDIRECT
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI86S642HC-AS1R from Skyworks Solutions is a 4-channel reinforced digital isolator with bidirectional signal isolation across an integrated semiconductor barrier, supporting up to 150 Mbps data rate, 10 ns typical propagation delay, and 6000 VRMS isolation rating. It operates from 2.25–5.5 V on both sides and features Schmitt-trigger + CMOS inputs, tri-state outputs with enable, and selectable fail-safe default-high or default-low output mode - deployed in battery management systems and traction inverters.
For engineers reviewing the SI86S642HC-AS1R datasheet, SI86S642HC-AS1R pinout, SI86S642HC-AS1R application, or SI86S642HC-AS1R equivalent, key selection criteria include reinforced IEC 60747-17 certification, AEC-Q100 qualification for automotive use, 36 ns input deglitch filtering (confirmed for Si86S64x family), and WB SOIC-16 package with 8.3 mm creepage/clearance.
Technical Context
The SI86S642HC-AS1R implements RF-based on/off keying modulation across a monolithic semiconductor isolation barrier, eliminating startup initialization and enabling deterministic timing without clock recovery circuits. Its architecture delivers 100 kV/µs CMTI immunity and supports independent undervoltage lockout (UVLO) and reset (RSTB) thresholds per side (VDD1/VDD2).
It provides four isolated channels with fixed directionality (two forward, two reverse), EN1/EN2 enable inputs for tri-state control of all outputs on respective sides, and failsafe behavior defined at power-up via ordering option - confirmed in Table 4 and Section 3.3 of the datasheet.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial interfaces including isolated SPI and QSPI data lanes. |
| Propagation delay | 10 ns typical - enables tight timing budgets in motor control gate drivers and real-time feedback loops. |
| Isolation rating | 6000 VRMS for 1 minute - meets reinforced insulation requirements per UL 1577 and IEC 60747-17. |
| Supply voltage | 2.25–5.5 V per side - allows interoperability with 3.3 V and 5 V logic domains without level shifters. |
| Input deglitch filter | 36 ns - suppresses sub-36 ns noise pulses on A-side inputs, critical in noisy inverter gate-drive environments. |
| Operating temperature | –40 °C to +125 °C - qualified for under-hood automotive applications including onboard chargers and BMS. |
| CMTI immunity | ≥100 kV/µs - ensures robust operation in high dv/dt switching nodes of power inverters. |
Pinout & Package
SI86S642HC-AS1R is housed in a wide-body SOIC-16 (WB SOIC-16) package with 8.3 mm creepage and clearance, supporting 6000 VRMS isolation. Pinout conforms to Figure 2 (Si86S64x/L4x) in the datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1, GND1 | Side A supply and ground | Power domain for input-side logic (A1–A4, EN1); requires 0.1 µF + 10 µF bypass capacitors. |
| A1–A4 | Digital I/O (Side A) | Four isolated input channels; Schmitt-trigger + CMOS threshold inputs with 36 ns deglitch filtering. |
| EN1 | Active-high enable (Side A) | Tri-states all A-side outputs (A1–A4) when low; no internal pull-up - external bias required. |
| VDD2, GND2 | Side B supply and ground | Independent power domain for output-side logic (B1–B4, EN2); supports different voltage than Side A. |
| B1–B4 | Digital I/O (Side B) | Four isolated output channels; drive strength rated for 4 mA sink/source at VOL/VOH limits. |
| EN2 | Active-high enable (Side B) | Tri-states all B-side outputs (B1–B4) when low; enables synchronized shutdown of isolated interface. |
Key Features
| Feature | Design Value |
|---|---|
| Reinforced IEC 60747-17 rating | Validated barrier integrity for safety-critical automotive and medical systems requiring dual-redundant insulation. |
| AEC-Q100 Grade 1 qualification | Guarantees reliability over –40 °C to +125 °C ambient, with zero defects in HTOL and ESD testing per automotive production flow. |
| Selectably fail-safe output | Ordering option determines default output state (high or low) during VDD1 unpowered condition while VDD2 remains active. |
| No start-up initialization | RF modulation architecture eliminates boot-time delays or configuration sequences - outputs follow inputs immediately post-UVLO. |
| High CMTI immunity (≥100 kV/µs) | Prevents false triggering in high-noise power stage environments such as SiC/GaN inverter half-bridges. |
Applications
| Battery Management System (BMS) | Traction Inverter Control |
|---|---|
|
Use Scenario: Isolating cell voltage monitoring ADC signals and pack-level communication between MCU and analog front-end. IC Role / Device Role / Timing Role: Provides galvanic isolation for ±100 mV precision analog sensing signals and UART/SPI commands across high common-mode voltage gradients (>1 kV). Use Value: Enables accurate, noise-immune measurement of individual Li-ion cell voltages in 400–800 V battery packs without ground-loop interference. |
Use Scenario: Transmitting PWM gate-drive signals from controller to isolated IGBT/SiC half-bridge drivers in EV powertrain inverters. IC Role / Device Role / Timing Role: Delivers <10 ns propagation delay and <3.5 ns pulse width distortion to preserve dead-time integrity in 10–20 kHz switching. Use Value: Prevents shoot-through failures by maintaining precise edge alignment between high-side and low-side gate signals under fast dv/dt transients. |
| Onboard Charger (OBC) | Industrial Motor Drive |
|
Use Scenario: Isolating AC-to-DC PFC controller feedback and DC-link voltage sensing in bi-directional OBC modules. IC Role / Device Role / Timing Role: Transfers isolated current-sense amplifier outputs and soft-start commands across 6000 VRMS barrier with 125 °C junction capability. Use Value: Supports compact, high-power-density OBC designs compliant with ISO 15118 and UL 62368-1 reinforced insulation requirements. |
Use Scenario: Coupling encoder position data and fault signals between servo motor rotor and industrial PLC in factory automation lines. IC Role / Device Role / Timing Role: Provides bidirectional isolation for RS-485 differential pairs and discrete I/O status lines in harsh EMI environments. Use Value: Eliminates ground-borne noise coupling that causes encoder count errors or spurious trip signals in multi-axis motion control systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM2402BRWZ | 4-channel, 25 Mbps max data rate; 50 ns propagation delay; 5000 VRMS isolation; SOIC-16 NB package. | Lacks AEC-Q100 qualification and 36 ns deglitch filtering; not rated for 125 °C continuous operation. | Preferred for cost-sensitive industrial automation where 25 Mbps suffices and automotive qualification is unnecessary. |
| ISO6742QDWR | 4-channel, 50 Mbps max data rate; 25 ns propagation delay; 5000 VRMS; SOIC-16 NB; supports 1.8–5.5 V supplies. | Not reinforced per IEC 60747-17; no deglitch filter; only basic IEC 62368-1 compliance - not suitable for automotive BMS. | Appropriate for non-safety-critical consumer or white-goods applications requiring ultra-low supply voltage support. |
Compared with ADUM2402BRWZ and ISO6742QDWR, SI86S642HC-AS1R delivers 6× higher data rate, 2.5× lower propagation delay, full AEC-Q100 Grade 1 qualification, and IEC 60747-17 reinforced certification - making it uniquely suited for high-performance automotive and industrial isolation where timing, noise immunity, and safety certification are non-negotiable.
Availability
SI86S642HC-AS1R is available at Aetrix Electronics and suitable for battery management systems, traction inverters, and onboard chargers requiring stable component supply, long-term lifecycle support, and automotive-grade traceability.
Supply support for SI86S642HC-AS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for high-reliability markets.
SI86S642HC-AS1R belongs to the Si86S6xx family of reinforced digital isolators engineered for automotive electrification and industrial power conversion - emphasizing AEC-Q100 compliance, 6000 VRMS isolation, and noise-immune RF modulation.
FAQ
What is the isolation rating and safety certification status of SI86S642HC-AS1R?
SI86S642HC-AS1R is rated for 6000 VRMS isolation per UL 1577 for 1 minute and carries reinforced insulation certification per IEC 60747-17. It also meets CSA 62368-1 and 60601-1, and CQC GB4943.1 standards. These certifications are documented in the August 2023 datasheet revision 206553B and apply directly to the SI86S642HC-AS1R part number in WB SOIC-16 packaging.
Does SI86S642HC-AS1R support input deglitch filtering, and how is it implemented?
Yes, SI86S642HC-AS1R includes a 36 ns input deglitch filter on all A-side inputs (A1–A4), as explicitly stated in Section 3.4.5 of the datasheet for the Si86S64x family. This filter blocks noise pulses shorter than 36 ns, ensuring only valid logic transitions propagate across the isolation barrier - critical in high-dv/dt environments like motor drives.
What is the function of the EN1 and EN2 pins on SI86S642HC-AS1R?
EN1 and EN2 are active-high enable inputs controlling tri-state output behavior on Side A and Side B respectively. When EN1 is low, A1–A4 outputs enter high-impedance state; when EN2 is low, B1–B4 outputs go high-Z. Neither pin has internal pull-ups, so external biasing is required for defined startup behavior - confirmed in Table 1 and Figure 2 of the SI86S642HC-AS1R datasheet.
Is SI86S642HC-AS1R qualified for automotive applications, and what does that entail?
Yes, SI86S642HC-AS1R is AEC-Q100 Grade 1 qualified, meaning it is tested and certified for operation from –40 °C to +125 °C ambient, with full PPAP documentation, IMDS/CAMDS compliance, and automotive-specific manufacturing process controls. This qualification covers the exact SI86S642HC-AS1R part number and is referenced in the "Automotive Applications" section and Table 4 of the datasheet.
What package type and creepage distance does SI86S642HC-AS1R use?
SI86S642HC-AS1R uses a wide-body SOIC-16 (WB SOIC-16) package with 8.3 mm minimum creepage and clearance, enabling its 6000 VRMS isolation rating. This package variant is explicitly listed in the "RoHS-compliant packages" bullet on page 1 of the datasheet and is required to meet UL 1577 and IEC 60747-17 reinforced insulation requirements.
SI86S642HC-AS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- SPI
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 2/2
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 3750Vrms
- Common Mode Transient Immunity (Min):
- 150kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 42ns, 42ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI86S642HC-AS1R FAQ
1.How can I place an order for SI86S642HC-AS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S642HC-AS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S642HC-AS1R reliable?
The price and inventory of SI86S642HC-AS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S642HC-AS1R is usually 5 days.
3.What payment methods are accepted for SI86S642HC-AS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S642HC-AS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S642HC-AS1R?
SI86S642HC-AS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S642HC-AS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S642HC-AS1R?
For technical support, including SI86S642HC-AS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S642HC-AS1R requirements.
6.How does Aetrix verify that SI86S642HC-AS1R is sourced from the original manufacturer or authorized distributors?
All SI86S642HC-AS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S642HC-AS1R meets industry standards.
7.What is the process for return or replacement of SI86S642HC-AS1R?
All SI86S642HC-AS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI86S642HC-AS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S642HC-AS1R part is unused and in its original packaging.
Return procedure for SI86S642HC-AS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S642HC-AS1R Tags
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ISO1212DBQR
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ISO6721BDR
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SI8710AC-B-ISR
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ISO7720FDR
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SI8710CC-B-ISR
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ISO6741FQDWRQ1
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ISO7721DWVR
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ISO7762FDBQR
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ISO7741DWR
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ISO7741FDWR
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