Skyworks Solutions Inc. SI86S661EB-AUR
- Part No.:
- SI86S661EB-AUR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
SI86S661EB-AUR.pdf
- Description:
- 2.5 KVRMS ISOLATOR, 6 UNIDIRECTI
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI86S661EB-AUR from Skyworks Solutions is a 6-channel, reinforced digital isolator with bidirectional signal isolation across a semiconductor-based barrier. It supports DC to 150 Mbps data rates, delivers 10 ns typical propagation delay, and provides 6000 VRMS isolation rating in a WB SOIC-16 package. It operates from 2.25–5.5 V supplies and is qualified per AEC-Q100 for automotive battery management systems.
For engineers reviewing the SI86S661EB-AUR datasheet, SI86S661EB-AUR pinout, SI86S661EB-AUR application, or SI86S661EB-AUR equivalent, key selection factors include its 6-channel configuration, fail-safe default-low output option (denoted by 'E'), reinforced IEC 60747-17 certification, and support for industrial motor control and onboard charger interfaces requiring high CMTI and low pulse width distortion.
Technical Context
The SI86S661EB-AUR implements RF-based on/off keying modulation across a monolithic silicon isolation barrier-eliminating startup initialization and enabling deterministic timing. Its architecture includes independent UVLO and reset circuitry per side (VDD1/VDD2), with RSTB thresholds at ~1.7 V and 100 kΩ weak pulldowns during unpowered states.
All six channels are bidirectional I/Os (A1–A6 / B1–B6) with Schmitt-trigger + CMOS input thresholds, tri-state outputs controlled by EN1/EN2, and selectable fail-safe mode (default low, per 'E' suffix). No internal direction control or SPI logic is present-this is a general-purpose isolator, distinct from Si86SSx or Si86SQx variants.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial links including isolated UART, RS-485 transceiver control, and fast GPIO monitoring. |
| Propagation delay | 10 ns typical - enables tight timing budgets in real-time motor control feedback loops and ADC sampling synchronization. |
| Isolation rating | 6000 VRMS - meets reinforced insulation requirements for 1000 VAC working voltage systems per UL 1577 and IEC 60747-17. |
| Supply range | 2.25–5.5 V - allows interoperability with 3.3 V and 5 V logic domains on both sides without level shifters. |
| Temperature range | –40 to 125 °C - qualified for under-hood automotive use and industrial environments with extended thermal cycling. |
| CMTI | 100 kV/µs min - ensures robust operation in noisy inverter gate-drive circuits with fast dV/dt transients. |
| Fail-safe mode | Default low output - guarantees known state on B-side outputs during VDD1 loss, critical for safety-critical enable/disable signaling. |
Pinout & Package
SI86S661EB-AUR is housed in a wide-body SOIC-16 (WB SOIC-16) package with creepage/clearance optimized for 6000 VRMS reinforced insulation. Pin 1 is marked with a dot; pins 1–8 are Side A (input side), pins 9–16 are Side B (output side), separated by an internal semiconductor isolation barrier.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1, GND1 | Side A power supply | Supplies isolated logic domain A; requires 0.1 µF + 10 µF bypass capacitors placed near pins. |
| A1–A6 | Side A digital I/O | Bidirectional channels with Schmitt-trigger inputs; tolerate 0.3×VDD1 to 0.7×VDD1 noise margins. |
| EN1 | Side A output enable | Active-high control: drives all A-side outputs into high-impedance when low. |
| VDD2, GND2 | Side B power supply | Independent supply for isolated domain B; decoupling identical to Side A. |
| B1–B6 | Side B digital I/O | Corresponding isolated outputs/inputs; default low during VDD1 undervoltage (fail-safe 'E'). |
| EN2 | Side B output enable | Active-high control: places all B-side outputs in high-Z when low; no effect on fail-safe behavior. |
Key Features
| Feature | Design Value |
|---|---|
| No startup initialization | RF carrier modulation eliminates boot sequence-outputs become valid within 0.3 ms of VDD stabilization. |
| Reinforced safety certification | UL 1577 (6000 VRMS), VDE 60747-17, CSA 62368-1, and CQC GB4943.1 - enables single-component compliance in medical and EV systems. |
| Tri-state output control | Dedicated EN1/EN2 pins allow synchronized high-impedance state on each side-essential for bus sharing and hot-swap isolation. |
| High noise immunity | 100 kV/µs CMTI + Schmitt-trigger inputs + 3.5 ns pulse width distortion - rejects EMI in motor drive and SMPS environments. |
| Automotive-grade flow | AEC-Q100 Grade 1 qualification with AIAG PPAP, IMDS/CAMDS support - fulfills OEM traceability and defectivity requirements. |
Applications
| Industrial Motor Control | Onboard Charger (OBC) |
|---|---|
Use Scenario: Isolating PWM gate-drive signals and current-sense feedback between MCU and IGBT/SiC half-bridge drivers in servo inverters. IC Role / Device Role / Timing Role: Six-channel bidirectional isolator conveying enable, fault, and analog feedback signals across 1000 VDC bus barriers. Use Value: 10 ns propagation delay ensures <50 ns total loop latency; 6000 VRMS rating supports 1200 V SiC systems with margin. | Use Scenario: Signal isolation between primary-side controller and secondary-side battery interface in AC/DC OBC modules. IC Role / Device Role / Timing Role: Isolating digital control lines (enable, fault, status) and isolated ADC/DAC data paths between 400 V DC and 800 V battery domains. Use Value: Default-low fail-safe prevents unintended battery connection during primary-side brownout; AEC-Q100 ensures lifetime reliability. |
| Battery Management System (BMS) | Isolated Switch-Mode Power Supply |
Use Scenario: Galvanic isolation of cell monitor IC communication (e.g., LTC6813 daisy-chain) from main MCU in high-voltage traction battery packs. IC Role / Device Role / Timing Role: Transmitting UART or custom serial commands across isolation barrier while maintaining precise timing for cell balancing coordination. Use Value: 150 Mbps capability supports multi-drop daisy-chain refresh rates >1 kHz; –40 to 125 °C operation matches pack thermal profile. | Use Scenario: Isolating feedback signals (voltage, current, temperature) and PWM control from primary-side controller to secondary-side sensing in 1–3 kW telecom/industrial SMPS. IC Role / Device Role / Timing Role: Replacing optocouplers in TL431-based feedback loops and digital PMBus command isolation. Use Value: 3.5 ns pulse width distortion preserves duty-cycle fidelity; low 1.93 mA quiescent current (per side, 500 kHz) reduces standby loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM6601ARWZ | 6-channel, 50 Mbps max, integrated isolated DC-DC converter (3.3 V out), SOIC-16W package, 5000 VRMS rating. | Eliminates need for external isolated bias supply but trades off speed and isolation voltage. | Choose ADUM6601ARWZ when isolated power is required and 150 Mbps is unnecessary; SI86S661EB-AUR preferred for high-speed, high-isolation, or cost-sensitive designs without DC-DC needs. |
| ISO6760FDWR | 6-channel, 50 Mbps, 5000 VRMS, SOIC-16, failsafe default-high ('F'), lower CMTI (85 kV/µs), no AEC-Q100. | Lacks automotive qualification and reinforced 6000 VRMS rating; suitable only for non-automotive industrial use. | Choose ISO6760FDWR for cost-driven industrial applications where AEC-Q100 and 6000 VRMS are not mandated; SI86S661EB-AUR required for EV/BMS deployments. |
Compared with ADUM6601ARWZ and ISO6760FDWR, SI86S661EB-AUR uniquely combines 150 Mbps speed, 6000 VRMS reinforced isolation, AEC-Q100 Grade 1, and default-low fail-safe in a standard WB SOIC-16-making it optimal for high-reliability automotive and industrial systems demanding both performance and safety certification.
Availability
SI86S661EB-AUR is available at Aetrix Electronics and suitable for industrial motor control, onboard chargers, and battery management systems requiring stable component supply, long-term lifecycle assurance, and automotive-grade traceability.
Supply support for SI86S661EB-AUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si86S6xx family was designed specifically for high-reliability industrial and automotive isolation applications-emphasizing reinforced safety certification, high CMTI, and fail-safe operation in harsh electrical environments.
FAQ
What is the isolation voltage rating of the SI86S661EB-AUR?
The SI86S661EB-AUR is rated for 6000 VRMS isolation per UL 1577 for 1 minute, with reinforced insulation certified to IEC 60747-17, CSA 62368-1, and CQC GB4943.1. This rating applies to the WB SOIC-16 package and supports working voltages up to 1000 VAC in end equipment meeting relevant safety standards.
Does the SI86S661EB-AUR require external startup configuration or initialization?
No, the SI86S661EB-AUR requires no startup initialization. Its RF-based on/off keying architecture enables immediate operation after VDD1 and VDD2 stabilize above UVLO thresholds (~2.18 V), with outputs becoming valid within 0.3 ms. This eliminates firmware dependencies and boot-time uncertainty in safety-critical systems.
What does the 'E' in SI86S661EB-AUR indicate?
The 'E' denotes the fail-safe output configuration: default-low behavior on Side B outputs during VDD1 undervoltage or loss. When VDD1 falls below UVLO– (~2.05 V), B1–B6 are actively pulled low (not high-impedance), ensuring predictable shutdown states in battery management or motor enable circuits.
Can the SI86S661EB-AUR be used in SPI or QSPI isolation applications?
No, the SI86S661EB-AUR is a general-purpose 6-channel digital isolator without built-in SPI protocol logic, direction control (DIR), or chip-select buffering. For SPI isolation, Skyworks offers dedicated parts like Si86SS41/51; for QSPI, Si86SQ44. SI86S661EB-AUR may carry SPI signals only as raw GPIO-level isolation.
What are the supply bypass requirements for SI86S661EB-AUR?
The SI86S661EB-AUR requires two bypass capacitors per supply domain: a 0.1 µF ceramic capacitor and a 10 µF bulk capacitor placed as close as possible between VDD1–GND1 and VDD2–GND2. This dual-capacitor network suppresses high-frequency switching noise and maintains stable operation at 150 Mbps data rates.
SI86S661EB-AUR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- SPI
- Isolated Power:
- Yes
- Number of Channels:
- 6
- Inputs - Side 1/Side 2:
- 5/1
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- 150kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 42ns, 42ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QSOP
SI86S661EB-AUR FAQ
1.How can I place an order for SI86S661EB-AUR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86S661EB-AUR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86S661EB-AUR reliable?
The price and inventory of SI86S661EB-AUR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86S661EB-AUR is usually 5 days.
3.What payment methods are accepted for SI86S661EB-AUR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86S661EB-AUR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86S661EB-AUR?
SI86S661EB-AUR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86S661EB-AUR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86S661EB-AUR?
For technical support, including SI86S661EB-AUR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86S661EB-AUR requirements.
6.How does Aetrix verify that SI86S661EB-AUR is sourced from the original manufacturer or authorized distributors?
All SI86S661EB-AUR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86S661EB-AUR meets industry standards.
7.What is the process for return or replacement of SI86S661EB-AUR?
All SI86S661EB-AUR units undergo pre-shipment inspection (PSI). If there is an issue with SI86S661EB-AUR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86S661EB-AUR part is unused and in its original packaging.
Return procedure for SI86S661EB-AUR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86S661EB-AUR Tags
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ISO1212DBQR
Texas Instruments

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ISO6721BDR
Texas Instruments

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SI8710AC-B-ISR
Skyworks Solutions Inc.

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ISO7720FDR
Texas Instruments

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ISO7721DR
Texas Instruments

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ISO7721FDR
Texas Instruments

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SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

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ISO7721DWVR
Texas Instruments
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ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
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