Skyworks Solutions Inc. SI86SM40BC-IS1R
- Part No.:
- SI86SM40BC-IS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI86SM40BC-IS1R.pdf
- Description:
- 3.75 KVRMS SLEEP MODE ISOLATOR,
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI86SM40BC-IS1R from Skyworks Solutions is a 4-channel, reinforced digital isolator with sleep mode control (SMb pin), 6000 VRMS isolation rating, 150 Mbps data rate, and –40 to 125 °C operating temperature range. It features bidirectional channel configuration (2 forward + 2 reverse), Schmitt-trigger CMOS inputs, and tri-state outputs with enable-used in isolated motor control gate drivers and battery management system signal interfaces.
For engineers reviewing the SI86SM40BC-IS1R datasheet, SI86SM40BC-IS1R pinout, SI86SM40BC-IS1R application, or SI86SM40BC-IS1R equivalent, key selection criteria include its AEC-Q100 qualification, 10 ns typical propagation delay, fail-safe default-low output option, and WB SOIC-16 package with 8.3 mm creepage for reinforced insulation compliance per IEC 60747-17.
Technical Context
The SI86SM40BC-IS1R implements RF-based on/off keying across a semiconductor isolation barrier, eliminating startup initialization and enabling robust noise immunity (100 kV/µs CMTI). Its architecture supports independent side-A/side-B undervoltage lockout (UVLO) and reset thresholds (RSTB± ~1.7 V), with automatic recovery in <1 µs after transient VDD dips.
Sleep mode is controlled via the active-low SMb pin: when asserted, it disables all transmitters except one monitoring channel, reducing quiescent current to 750 µA per side while retaining wake-on-SMb capability. Channel direction is fixed per pin assignment (A1–A4 → B1–B4), with no DIR pin-distinguishing it from Si86SQ44 QSPI variants.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial links like isolated SPI clock domains without timing bottlenecks. |
| Isolation rating | 6000 VRMS (1 min) - meets reinforced insulation requirements for industrial and automotive systems per UL 1577 and IEC 60747-17. |
| Propagation delay | 10 ns typical - enables precise timing-critical applications such as gate driver synchronization in power inverters. |
| Supply voltage | 2.25 to 5.5 V - allows direct interfacing with 3.3 V and 5 V logic families without level-shifting circuitry. |
| Operating temperature | –40 to 125 °C - qualified for under-hood automotive use and industrial environments with wide thermal cycling. |
| CMTI | ≥100 kV/µs - ensures reliable operation in high-noise motor drive and switching power supply environments. |
| Fail-safe mode | Default low output - maintains safe state during input-side power loss in safety-critical BMS monitoring paths. |
Pinout & Package
SI86SM40BC-IS1R uses a wide-body SOIC-16 (WB SOIC-16) package with 8.3 mm creepage and reinforced insulation barrier. Pinout conforms to Figure 3 (Si86SM4x) in the datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1, GND1 | Side A power supply | Provides isolated 2.25–5.5 V bias for input-side logic; requires 0.1 µF + 10 µF local bypass. |
| A1–A4 | Side A digital inputs/outputs | Four bidirectional I/O channels on primary side; support Schmitt-trigger + CMOS thresholds for noise immunity. |
| SMb | Sleep mode control | Active-low pin that disables all transmitters except one monitoring channel, reducing current to 750 µA/side. |
| Isolation Barrier | Dielectric separation | Semiconductor-based barrier enabling 6000 VRMS withstand and 100 kV/µs CMTI without optical degradation. |
| B1–B4 | Side B digital inputs/outputs | Four isolated output channels mirroring A1–A4 states; tri-state capable via EN1/EN2 (not present on this variant). |
| VDD2, GND2 | Side B power supply | Independent 2.25–5.5 V bias for secondary side; decoupling required adjacent to pins 15/16. |
| NC | No connect | Pin 9 is unconnected; must remain floating-no PCB trace or pull-up/down allowed. |
Key Features
| Feature | Design Value |
|---|---|
| Sleep mode with SMb pin | Reduces total quiescent current to 750 µA per side while retaining wake-on-pin capability-critical for always-on BMS monitoring. |
| Reinforced IEC 60747-17 rating | Validated 6000 VRMS isolation with 8.3 mm creepage in WB SOIC-16-enables single-component compliance in medical and EV traction systems. |
| 10 ns propagation delay | Enables sub-100 ns timing alignment between isolated control and feedback paths in 20+ kHz motor inverters. |
| Fail-safe default-low output | Guarantees low-level output during side-A power loss-prevents unintended gate turn-on in isolated IGBT/MOSFET drivers. |
| AEC-Q100 Grade 1 qualification | Validated for automotive applications including onboard chargers and battery management systems up to 125 °C ambient. |
Applications
| Motor Control Gate Driver Interface | Isolated Battery Management System |
|---|---|
|
Use Scenario: Isolating PWM signals and fault feedback between MCU and high-voltage IGBT/MOSFET gate drivers in 3-phase inverters. IC Role / Device Role / Timing Role: Bidirectional signal isolator providing 2 forward (MCU→driver) and 2 reverse (driver→MCU) channels with 10 ns propagation delay. Use Value: Enables precise dead-time control and fast fault reporting (<100 ns latency) while maintaining 6000 VRMS galvanic separation. |
Use Scenario: Isolating cell voltage monitoring and balancing command signals between high-voltage battery stack and low-voltage MCU in EV packs. IC Role / Device Role / Timing Role: Four-channel isolator with default-low fail-safe mode ensuring safe shutdown if MCU supply fails. Use Value: Prevents false balancing activation during brownout events and supports AEC-Q100-compliant operation at 125 °C ambient. |
| Onboard Charger Communication | Industrial PLC Digital I/O Isolation |
|
Use Scenario: Isolating CAN or UART communication lines between OBC controller and vehicle network in 400 V/800 V charging systems. IC Role / Device Role / Timing Role: High-speed (150 Mbps) digital isolator enabling error-free transmission of status and control packets across isolation barrier. Use Value: Supports full-duplex UART at >3 Mbps and meets CISPR-25 Class 5 EMI requirements due to RF modulation architecture. |
Use Scenario: Isolating discrete 24 V DC input/output signals between field devices and PLC CPU in factory automation cabinets. IC Role / Device Role / Timing Role: Four-channel isolator with Schmitt-trigger inputs tolerating ±100 kV/µs transients in noisy industrial environments. Use Value: Eliminates ground loops and prevents latch-up in 24 V sensor/actuator interfaces while supporting 125 °C cabinet temperatures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SI86SM41BC-IS1R | Same pinout and package, but default-high fail-safe output instead of default-low. | Preferred where active-high enable or fault signaling is required in safety logic chains. | Select SI86SM41BC-IS1R only when system-level fail-safe behavior mandates high-level default output. |
| ADUM2400ARWZ | 4-channel, 25 Mbps max data rate, 2.5 kVRMS isolation, SOIC-16 narrow-body package. | Suitable for cost-sensitive industrial I/O where 150 Mbps and 6 kVRMS are not required. | Choose ADUM2400ARWZ for legacy designs needing lower bandwidth and reduced isolation strength-requires layout review for creepage compliance. |
Compared with SI86SM41BC-IS1R (default-high) and ADUM2400ARWZ (25 Mbps, 2.5 kVRMS), SI86SM40BC-IS1R delivers higher speed, reinforced isolation, and automotive-grade reliability-making it optimal for next-generation EV and industrial power systems demanding both performance and safety certification.
Availability
SI86SM40BC-IS1R is available at Aetrix Electronics and suitable for motor control gate drivers, isolated battery management systems, and onboard charger communication requiring stable component supply across automotive and industrial production cycles.
Supply support for SI86SM40BC-IS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies.
The Si86S6xx/Lxx/Mxx family-including SI86SM40BC-IS1R-is designed for high-reliability, high-speed digital isolation in automotive, industrial, and medical systems requiring reinforced insulation and AEC-Q100 qualification.
FAQ
What is the isolation voltage rating and safety certification status of SI86SM40BC-IS1R?
SI86SM40BC-IS1R is rated for 6000 VRMS isolation for 1 minute per UL 1577 and carries reinforced insulation certification per IEC 60747-17. It also meets CSA 62368-1 and CQC GB4943.1 requirements. The WB SOIC-16 package provides 8.3 mm creepage distance, enabling compliance in high-voltage end equipment such as EV traction inverters and medical imaging power supplies.
Does SI86SM40BC-IS1R support bidirectional data flow on all four channels?
Yes, SI86SM40BC-IS1R supports bidirectional signal transfer across all four channels (A1–A4 ↔ B1–B4) without external direction control. Unlike Si86SQ44, it does not require a DIR pin-the channel mapping is fixed and symmetrical, making it ideal for isolated UART, GPIO, or PWM feedback applications where direction is determined by system protocol rather than hardware pin state.
How does the SMb pin function in SI86SM40BC-IS1R, and what current savings does it provide?
The SMb pin in SI86SM40BC-IS1R is an active-low sleep mode control. When pulled low, it disables all transmitter circuits except one dedicated monitoring channel, reducing total quiescent current to 750 µA per side (side-A and side-B combined). This enables ultra-low-power operation in always-on battery monitoring subsystems while retaining immediate wake-on-SMb functionality.
What is the default output state during input-side power loss for SI86SM40BC-IS1R?
SI86SM40BC-IS1R is configured with default-low fail-safe output. When VDD1 drops below UVLO threshold (2.10–2.25 V), outputs B1–B4 are driven low within 0.3 ms-ensuring safe deactivation of downstream power stages in gate driver or BMS applications. This behavior is hard-coded per ordering option and cannot be changed in-circuit.
Which package type and footprint does SI86SM40BC-IS1R use, and what are its creepage/clearance values?
SI86SM40BC-IS1R uses the wide-body SOIC-16 (WB SOIC-16) package with 10.3 mm body width and 8.3 mm minimum creepage distance across the isolation barrier. Its clearance is 8.0 mm, satisfying reinforced insulation requirements for 6000 VRMS working voltage per IEC 60747-17 and UL 1577-critical for designs targeting UL 62368-1 or IEC 60601-1 certification.
SI86SM40BC-IS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- No
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 4/0
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 3750Vrms
- Common Mode Transient Immunity (Min):
- 100kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 14ns, 14ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI86SM40BC-IS1R FAQ
1.How can I place an order for SI86SM40BC-IS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86SM40BC-IS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86SM40BC-IS1R reliable?
The price and inventory of SI86SM40BC-IS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86SM40BC-IS1R is usually 5 days.
3.What payment methods are accepted for SI86SM40BC-IS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86SM40BC-IS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86SM40BC-IS1R?
SI86SM40BC-IS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86SM40BC-IS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86SM40BC-IS1R?
For technical support, including SI86SM40BC-IS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86SM40BC-IS1R requirements.
6.How does Aetrix verify that SI86SM40BC-IS1R is sourced from the original manufacturer or authorized distributors?
All SI86SM40BC-IS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86SM40BC-IS1R meets industry standards.
7.What is the process for return or replacement of SI86SM40BC-IS1R?
All SI86SM40BC-IS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI86SM40BC-IS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86SM40BC-IS1R part is unused and in its original packaging.
Return procedure for SI86SM40BC-IS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86SM40BC-IS1R Tags
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