Skyworks Solutions Inc. SI86SM40EE-AS2R
- Part No.:
- SI86SM40EE-AS2R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI86SM40EE-AS2R.pdf
- Description:
- 6.0 KVRMS SLEEP MODE ISOLATOR, 4
- Quantity:
- Payment:

- Shipping:

Inventory:2,738
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI86SM40EE-AS2R from Skyworks Solutions is a four-channel, reinforced digital isolator with sleep mode control (SMb pin), 6000 VRMS isolation rating, 150 Mbps data rate, and operation across –40 to 125 °C. It features two forward and two reverse signal paths across an RF-based semiconductor isolation barrier, enabling bidirectional communication in isolated gate drivers and battery management systems.
For engineers reviewing the SI86SM40EE-AS2R datasheet, SI86SM40EE-AS2R pinout, SI86SM40EE-AS2R application, or SI86SM40EE-AS2R equivalent, key selection criteria include its AEC-Q100 qualification, 10 ns typical propagation delay, fail-safe default-low output option, and compatibility with isolated SPI, ADC, and motor control interfaces requiring high CMTI and low power during idle states.
Technical Context
The SI86SM40EE-AS2R implements RF-based on-off keying modulation across a monolithic semiconductor isolation barrier, eliminating startup initialization and supporting DC–150 Mbps data transmission. Its architecture includes dedicated SMb (sleep mode active-low) control for side-wide power gating while retaining one always-on channel for wake-up detection.
It supports independent 2.25–5.5 V supplies on both sides, features Schmitt-trigger + CMOS input thresholds for noise immunity, and delivers precise timing with 10 ns propagation delay and 3.5 ns pulse width distortion. The device meets IEC 60747-17 reinforced insulation requirements and UL 1577 (6000 VRMS/1 min).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial links including isolated SPI and QSPI without external clock conditioning. |
| Isolation rating | 6000 VRMS (1 min) - enables use in reinforced insulation applications per IEC 62368-1 and IEC 60601-1. |
| Propagation delay | 10 ns (typical) - ensures tight timing alignment in feedback loops for isolated gate drivers and ADC sampling. |
| Supply voltage | 2.25–5.5 V per side - allows direct interfacing with 3.3 V and 5 V logic domains without level shifters. |
| Operating temperature | –40 to 125 °C - qualified for under-hood automotive and industrial power electronics environments. |
| CMTI | ≥100 kV/µs (min) - prevents false triggering in high-dV/dt environments like traction inverters and SMPS. |
| Sleep current | 750 µA per side - reduces system standby power in battery management and EV charging systems. |
Pinout & Package
SI86SM40EE-AS2R is housed in a WB SOIC-16 package (wide-body, 10.3 mm creepage/clearance), supporting 6000 VRMS isolation. Pin functions are validated per Figure 3 and Table 1 of Skyworks datasheet 206553B.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1, GND1 | Side A supply and ground | Power domain for A-side inputs (A1–A4); bypass requires 0.1 µF + 10 µF capacitors placed near pins. |
| A1–A4 | Side A digital I/O | Four unidirectional channels: A1/A2 forward (A→B), A3/A4 reverse (B→A); no internal direction control logic. |
| SMb | Sleep mode enable (active low) | Drives entire device into 750 µA/side sleep state; high or open = normal operation; internal pull-up not present. |
| Isolation Barrier | RF-coupled dielectric barrier | Monolithic silicon dioxide isolation layer; provides 6000 VRMS withstand, 100 kV/µs CMTI, and <10 ns latency. |
| B1–B4 | Side B digital I/O | Corresponding outputs: B1/B2 mirror A1/A2 (forward), B3/B4 mirror A3/A4 (reverse); tri-state capable via ENx (not present on SI86SM40). |
| VDD2, GND2 | Side B supply and ground | Independent power domain for B-side outputs; supports asymmetrical voltage operation (e.g., 3.3 V A-side / 5 V B-side). |
Key Features
| Feature | Design Value |
|---|---|
| Sleep mode control (SMb) | Reduces total quiescent current to 750 µA per side while retaining wake-up capability via single always-on RF channel. |
| Fail-safe default-low output | Guarantees B-side outputs drive low during A-side power loss-critical for safe shutdown in motor control and BMS fault handling. |
| Reinforced insulation certification | UL 1577 (6000 VRMS), VDE 60747-17, CSA 62368-1/60601-1 - eliminates need for external safety capacitors in medical and EV systems. |
| High-noise immunity inputs | Schmitt-trigger + CMOS threshold inputs with 0.15×VDD hysteresis - rejects >36 ns glitches and sustains operation in 100 kV/µs EFT environments. |
| No start-up initialization | RF modulation architecture enables immediate data transmission at power-on-no configuration registers or handshake required. |
Applications
| Industrial Motor Control | Automotive Battery Management |
|---|---|
|
Use Scenario: Isolating PWM signals and current-sense feedback between MCU and three-phase inverter gate drivers in servo drives. IC Role / Device Role / Timing Role: Four-channel isolator providing two forward (MCU→driver) and two reverse (driver status→MCU) paths with <10 ns skew. Use Value: Enables fast closed-loop response with guaranteed 150 Mbps update rates and 100 kV/µs CMTI immunity against inverter switching noise. |
Use Scenario: Isolating cell voltage monitoring and balancing commands between battery controller and slave monitoring ICs in 400–800 V packs. IC Role / Device Role / Timing Role: Reinforced isolator delivering fail-safe low outputs during controller power loss to disable balancing FETs. Use Value: Meets IEC 61508 SIL-3 functional safety requirements via certified 6000 VRMS barrier and AEC-Q100 Grade 0 qualification. |
| Isolated Switch-Mode Power Supply | Medical Isolated ADC Interface |
|
Use Scenario: Transmitting feedback signals (voltage/current) from secondary side to primary-side PWM controller in 1–3 kW AC/DC converters. IC Role / Device Role / Timing Role: High-speed digital isolator replacing optocouplers to support 1 MHz+ switching frequencies with minimal propagation delay. Use Value: 10 ns propagation delay and 3.5 ns pulse width distortion preserve loop stability margins and reduce compensation complexity. |
Use Scenario: Isolating serial data lines between isolated ADC (e.g., AD7403) and host processor in patient-connected diagnostic equipment. IC Role / Device Role / Timing Role: Reinforced barrier isolator meeting IEC 60601-1 4200 VPK creepage requirements for patient safety. Use Value: UL/VDE-certified 6000 VRMS rating eliminates need for additional isolation barriers in Class I/II medical subsystems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM2400ARWZ | 4-channel, 25 Mbps, 2500 VRMS, no sleep mode, 30 ns propagation delay | Limited to lower-speed industrial PLC I/O; lacks AEC-Q100 and reinforced insulation for automotive BMS | Choose when cost sensitivity outweighs speed, safety, and power requirements. |
| ISO7741FDWR | 4-channel, 100 Mbps, 5000 VRMS, no SMb pin, 11 ns propagation delay, 2.25–5.5 V | Supports similar temp range but lacks 6000 VRMS and AEC-Q100; sleep mode implemented via EN pins only | Prefer for non-automotive industrial systems where 5000 VRMS suffices and SMb-level power gating is unnecessary. |
Compared with ADUM2400ARWZ and ISO7741FDWR, SI86SM40EE-AS2R delivers 6× higher data rate, 20% lower propagation delay, full AEC-Q100 Grade 0 qualification, and dedicated hardware sleep control-making it uniquely suited for next-generation EV traction inverters and high-density medical power supplies.
Availability
SI86SM40EE-AS2R is available at Aetrix Electronics and suitable for industrial motor control, automotive battery management systems, and isolated switch-mode power supplies requiring stable component supply, long-term lifecycle support, and certified reinforced insulation.
Supply support for SI86SM40EE-AS2R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and isolation technologies for high-reliability applications.
The Si86Sxx family-including SI86SM40EE-AS2R-is engineered for automotive and industrial isolation, emphasizing AEC-Q100 compliance, 6000 VRMS reinforced insulation, and ultra-low-power sleep modes for EV and energy infrastructure systems.
FAQ
What is the isolation voltage rating of SI86SM40EE-AS2R and which safety standards does it meet?
SI86SM40EE-AS2R provides 6000 VRMS isolation for 1 minute per UL 1577, and is certified to IEC 60747-17 (reinforced), CSA 62368-1 and 60601-1, and CQC GB4943.1. These approvals validate its use in medical equipment, EV onboard chargers, and industrial inverters requiring reinforced insulation. The wide-body SOIC-16 package enables the full 6000 VRMS rating without external creepage extenders.
How does the SMb pin function in SI86SM40EE-AS2R, and what is its behavior during sleep mode?
The SMb pin on SI86SM40EE-AS2R is an active-low sleep mode enable. When pulled low, it shuts down all transmitter and receiver circuits except one dedicated RF channel that monitors SMb state-enabling wake-up on transition to high or open. In sleep mode, total current drops to 750 µA per side. No external pull-up is required, and the pin must be driven actively or left floating (not tied high) for normal operation.
Does SI86SM40EE-AS2R support fail-safe operation, and how is the default output state determined?
Yes, SI86SM40EE-AS2R supports selectable fail-safe mode. The "EE" in the part number indicates default-low output behavior: when Side A (input side) is unpowered but Side B (output side) remains powered, all B-side outputs drive low. This is critical for safety-critical shutdown in motor control and BMS applications. Default-high variants exist (e.g., "EH") but are not applicable to SI86SM40EE-AS2R.
What are the timing characteristics of SI86SM40EE-AS2R, and how do they impact high-speed control loops?
SI86SM40EE-AS2R delivers 10 ns typical propagation delay and 3.5 ns pulse width distortion, measured at 5 V supply and 25 °C. These values remain stable across –40 to 125 °C and support closed-loop bandwidths exceeding 50 MHz in isolated gate driver feedback paths. Low skew between channels ensures synchronized PWM edge delivery in multi-phase inverters.
Is SI86SM40EE-AS2R compatible with SPI interfaces, and what are its limitations compared to dedicated SPI isolators?
SI86SM40EE-AS2R is not a dedicated SPI isolator-it lacks built-in SPI protocol logic, chip select buffering, or MISO/MOSI labeling. However, its four independent bidirectional-capable channels (A1/B1–A4/B4) can implement isolated SPI by assigning A1–A3 to SCLK, CS, MOSI and B1–B3 to SCLK, CS, MISO. For full SPI protocol handling (e.g., automatic direction control), Skyworks' Si86SS41/51 or Si86SQ44 are recommended alternatives.
SI86SM40EE-AS2R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- SPI
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 4/0
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 6000Vrms
- Common Mode Transient Immunity (Min):
- 150kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 42ns, 42ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI86SM40EE-AS2R FAQ
1.How can I place an order for SI86SM40EE-AS2R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86SM40EE-AS2R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86SM40EE-AS2R reliable?
The price and inventory of SI86SM40EE-AS2R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86SM40EE-AS2R is usually 5 days.
3.What payment methods are accepted for SI86SM40EE-AS2R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86SM40EE-AS2R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86SM40EE-AS2R?
SI86SM40EE-AS2R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86SM40EE-AS2R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86SM40EE-AS2R?
For technical support, including SI86SM40EE-AS2R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86SM40EE-AS2R requirements.
6.How does Aetrix verify that SI86SM40EE-AS2R is sourced from the original manufacturer or authorized distributors?
All SI86SM40EE-AS2R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86SM40EE-AS2R meets industry standards.
7.What is the process for return or replacement of SI86SM40EE-AS2R?
All SI86SM40EE-AS2R units undergo pre-shipment inspection (PSI). If there is an issue with SI86SM40EE-AS2R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86SM40EE-AS2R part is unused and in its original packaging.
Return procedure for SI86SM40EE-AS2R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86SM40EE-AS2R Tags
-
ISO1212DBQR
Texas Instruments

-
ISO6721BDR
Texas Instruments

-
SI8710AC-B-ISR
Skyworks Solutions Inc.

-
ISO7720FDR
Texas Instruments

-
ISO7721DR
Texas Instruments

-
ISO7721FDR
Texas Instruments

-
SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

-
ISO7721DWVR
Texas Instruments
-
ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
