Skyworks Solutions Inc. SI86SM42BC-AS1R
- Part No.:
- SI86SM42BC-AS1R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SI86SM42BC-AS1R.pdf
- Description:
- 6.0 KVRMS SLEEP MODE ISOLATOR, 4
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI86SM42BC-AS1R from Skyworks Solutions is a four-channel reinforced digital isolator with two forward and two reverse signal paths, 6000 VRMS isolation rating, 150 Mbps data rate, and integrated sleep mode (SMb pin) enabling 750 µA per side quiescent current. It operates across 2.25–5.5 V supplies and supports industrial motor control, isolated ADC/DAC interfaces, and battery management systems.
For engineers reviewing the SI86SM42BC-AS1R datasheet, SI86SM42BC-AS1R pinout, SI86SM42BC-AS1R application, or SI86SM42BC-AS1R equivalent, key selection criteria include its AEC-Q100 qualification, fail-safe default-high/low output option, 10 ns typical propagation delay, and SOIC-16 wide-body package supporting reinforced insulation per IEC 60747-17 and UL 1577.
Technical Context
The SI86SM42BC-AS1R implements RF-based on/off keying modulation across a semiconductor isolation barrier, eliminating startup initialization and providing immunity to magnetic fields and fast transients (≥100 kV/µs). Its architecture includes independent undervoltage lockout (UVLO) and reset circuits per side (VDD1/VDD2), with RSTB thresholds at ~1.7 V and UVLO+ at 2.18 V.
Sleep mode is controlled by the active-low SMb pin: when pulled low, it disables all transmitters except one monitoring channel, reducing supply current to 750 µA per side while retaining wake-up capability. The device supports selectable fail-safe output states (default high or low) during unpowered input conditions, as defined by ordering option.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial links including isolated SPI and bidirectional bus protocols. |
| Isolation rating | 6000 VRMS for 1 minute - meets reinforced insulation requirements per UL 1577 and IEC 60747-17 for safety-critical industrial and automotive systems. |
| Propagation delay | 10 ns typical - enables precise timing in closed-loop motor control and real-time power converter feedback paths. |
| Supply voltage | 2.25–5.5 V - interoperable with 3.3 V and 5 V logic domains without level-shifting circuitry. |
| Operating temperature | –40 to 125 °C - qualified for under-hood automotive and industrial ambient environments. |
| Sleep current | 750 µA per side - reduces system standby power in battery management and portable medical equipment. |
| CMTI | ≥100 kV/µs - ensures robust operation in noisy inverter and motor drive applications with fast switching edges. |
Pinout & Package
SI86SM42BC-AS1R is housed in a WB SOIC-16 (wide-body small-outline integrated circuit) package with creepage/clearance ≥8.3 mm, supporting 6000 VRMS reinforced isolation. Pin 1 is marked with a dot; pins 1–8 reside on Side A (input side), pins 9–16 on Side B (output side), separated by an internal semiconductor isolation barrier.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 | Side A power supply | Supplies 2.25–5.5 V to input-side logic and transmitters; requires 0.1 µF + 10 µF bypass capacitors. |
| GND1 | Side A ground | Reference for Side A I/O and supply; must be routed separately from GND2 to maintain isolation integrity. |
| A1–A4 | Side A digital I/O | Four bidirectional channels: A1/A2 forward (A→B), A3/A4 reverse (B→A); Schmitt-trigger inputs with CMOS thresholds. |
| SMb | Sleep mode enable | Active-low control: drives low to enter 750 µA/side sleep mode; high or open enables normal operation. |
| GND2 | Side B ground | Reference for Side B outputs; galvanically isolated from GND1; critical for noise rejection in high-dv/dt environments. |
| B1–B4 | Side B digital I/O | Corresponding isolated outputs: B1/B2 mirror A1/A2 (forward), B3/B4 mirror A3/A4 (reverse). |
| VDD2 | Side B power supply | Independent 2.25–5.5 V supply for output-side logic; enables dual-supply system partitioning. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation | Eliminates LED aging and temperature drift of optocouplers; provides stable timing over –40 to 125 °C with no start-up delay. |
| Sleep mode (SMb) | Reduces total device current to 1.5 mA (750 µA per side) while retaining ability to detect wake-up events on SMb pin. |
| Fail-safe output selection | Ordering option defines default output state (high or low) during VDD1 undervoltage, preventing undefined control signals in fault conditions. |
| High CMTI immunity | ≥100 kV/µs common-mode transient immunity ensures reliable data transmission in gate-driver feedback loops and inverter legs. |
| AEC-Q100 Grade 1 | Qualified for automotive applications including onboard chargers and traction inverters, with full PPAP documentation support. |
Applications
| Industrial Motor Control | Isolated ADC Interface |
|---|---|
|
Use Scenario: Gate driver feedback and current sensing in 3-phase inverter stacks for servo drives and HVAC compressors. IC Role / Device Role / Timing Role: Isolates PWM signals and fault reporting between MCU and high-voltage IGBT/SiC gate drivers while preserving <10 ns timing accuracy. Use Value: Enables safe, high-bandwidth communication across 6000 VRMS barrier without optical degradation or timing drift over temperature. |
Use Scenario: Connecting precision delta-sigma ADCs (e.g., ADS131M04) to isolated microcontrollers in energy metering and power quality analyzers. IC Role / Device Role / Timing Role: Transfers synchronized 24-bit conversion data and clock across isolation boundary with <3.5 ns pulse width distortion. Use Value: Maintains SNR integrity and sampling phase coherence in Class 0.2 metering systems operating at –40 to 125 °C. |
| Battery Management System | Onboard Charger Communication |
|
Use Scenario: Isolating cell voltage monitoring and balancing commands between battery controller and pack-level MCU in EV battery packs. IC Role / Device Role / Timing Role: Provides bidirectional command/data path (A1/A2 forward for commands, A3/A4 reverse for telemetry) with fail-safe default-low output. Use Value: Prevents erroneous balancing activation during power-up or brownout, meeting ISO 26262 ASIL-B functional safety requirements. |
Use Scenario: Interfacing AC/DC controller ICs (e.g., UCC28070) with isolated CAN or UART interfaces in EVSE onboard chargers. IC Role / Device Role / Timing Role: Isolates analog control signals (Vref, current sense) and digital status flags between primary and secondary sides of LLC resonant converters. Use Value: Supports reinforced insulation compliance (IEC 62368-1, 60601-1) while enabling real-time thermal derating and fault reporting at 150 Mbps. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM2402BRWZ | 4-channel, 25 Mbps, 2.5 kVRMS, SOIC-16 narrow-body, no sleep mode, 5 V only supply. | Limited to lower-speed industrial PLC I/O modules; lacks AEC-Q100 qualification and reinforced 6 kVRMS rating. | Choose ADUM2402BRWZ only if data rate ≤25 Mbps and 6 kVRMS isolation is not required. |
| ISO7741FDWR | 4-channel, 100 Mbps, 5 kVRMS, SOIC-16 wide-body, no sleep mode, 1.8–5.5 V supply. | Supports wider voltage range but lacks AEC-Q100 and failsafe output selection; CMTI = 85 kV/µs. | Choose ISO7741FDWR where cost sensitivity outweighs need for automotive qualification and highest CMTI. |
Compared with ADUM2402BRWZ and ISO7741FDWR, SI86SM42BC-AS1R delivers 150 Mbps speed, 6000 VRMS reinforced isolation, AEC-Q100 Grade 1 qualification, and hardware-controlled sleep mode-making it uniquely suited for high-reliability automotive and industrial systems requiring both performance and functional safety.
Availability
SI86SM42BC-AS1R is available at Aetrix Electronics and suitable for industrial motor control, battery management systems, and onboard charger designs requiring stable component supply, long-term lifecycle support, and traceable sourcing for automotive-grade production.
Supply support for SI86SM42BC-AS1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and isolation technologies for wireless, automotive, and industrial markets.
The Si86Sxx family-including SI86SM42BC-AS1R-is designed specifically for high-reliability isolation in safety-critical systems, combining RF-based architecture, reinforced certification, and automotive-grade process flows to meet stringent EMI, lifetime, and thermal requirements.
FAQ
What is the isolation voltage rating of SI86SM42BC-AS1R and which safety standards does it meet?
SI86SM42BC-AS1R provides 6000 VRMS isolation for 1 minute per UL 1577 and is certified to IEC 60747-17 (reinforced insulation), CSA 62368-1/60601-1, and CQC GB4943.1. Its WB SOIC-16 package achieves ≥8.3 mm creepage and clearance, enabling use in medical and industrial equipment requiring reinforced insulation.
Does SI86SM42BC-AS1R support bidirectional communication, and how is direction controlled?
Yes, SI86SM42BC-AS1R supports bidirectional isolation via two forward (A1→B1, A2→B2) and two reverse (A3←B3, A4←B4) channels. Direction is fixed per channel pair-no external DIR pin is used. This architecture simplifies interface design for isolated SPI, ADC telemetry, and control feedback loops without dynamic reconfiguration.
How does the SMb pin function in SI86SM42BC-AS1R, and what is its impact on power consumption?
The SMb pin is an active-low sleep mode enable. When driven low, SI86SM42BC-AS1R enters sleep mode drawing 750 µA per side (1.5 mA total), while retaining one active channel to monitor SMb for wake-up. In normal operation (SMb high or open), typical supply current is 2.83 mA per side at 5 V and 500 kHz.
What is the default output behavior of SI86SM42BC-AS1R during power loss on the input side?
SI86SM42BC-AS1R offers selectable fail-safe output modes via ordering option. For SI86SM42BC-AS1R, the "BC" suffix indicates default-low output behavior when VDD1 is unpowered but VDD2 remains active-ensuring safe shutdown of downstream drivers or controllers during input-side brownout.
Is SI86SM42BC-AS1R qualified for automotive applications, and what documentation is available?
Yes, SI86SM42BC-AS1R is AEC-Q100 Grade 1 qualified (–40 to 125 °C) and supported with AIAG-compliant PPAP documentation, IMDS/CAMDS listings, and full automotive-grade manufacturing flow validation-making it suitable for onboard chargers, battery management, and traction inverter subsystems.
SI86SM42BC-AS1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- SPI
- Isolated Power:
- Yes
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 2/2
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 3750Vrms
- Common Mode Transient Immunity (Min):
- 150kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 42ns, 42ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI86SM42BC-AS1R FAQ
1.How can I place an order for SI86SM42BC-AS1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86SM42BC-AS1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86SM42BC-AS1R reliable?
The price and inventory of SI86SM42BC-AS1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86SM42BC-AS1R is usually 5 days.
3.What payment methods are accepted for SI86SM42BC-AS1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86SM42BC-AS1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86SM42BC-AS1R?
SI86SM42BC-AS1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86SM42BC-AS1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86SM42BC-AS1R?
For technical support, including SI86SM42BC-AS1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86SM42BC-AS1R requirements.
6.How does Aetrix verify that SI86SM42BC-AS1R is sourced from the original manufacturer or authorized distributors?
All SI86SM42BC-AS1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86SM42BC-AS1R meets industry standards.
7.What is the process for return or replacement of SI86SM42BC-AS1R?
All SI86SM42BC-AS1R units undergo pre-shipment inspection (PSI). If there is an issue with SI86SM42BC-AS1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86SM42BC-AS1R part is unused and in its original packaging.
Return procedure for SI86SM42BC-AS1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86SM42BC-AS1R Tags
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ISO1212DBQR
Texas Instruments

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ISO6721BDR
Texas Instruments

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SI8710AC-B-ISR
Skyworks Solutions Inc.

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ISO7720FDR
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ISO7721DR
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ISO7721FDR
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SI8710CC-B-ISR
Skyworks Solutions Inc.

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ISO6741FQDWRQ1
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ISO7721DWVR
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ISO7762FDBQR
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ISO7741DWR
Texas Instruments

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ISO7741FDWR
Texas Instruments
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