Skyworks Solutions Inc. SI86SM42BE-IS2R
- Part No.:
- SI86SM42BE-IS2R
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Digital Isolators
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SI86SM42BE-IS2R.pdf
- Description:
- 6.0 KVRMS LOW POWER ISOLATOR, 4
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI86SM42BE-IS2R from Skyworks Solutions is a 4-channel reinforced digital isolator with two forward and two reverse signal paths, 6000 VRMS isolation rating, 150 Mbps data rate, and integrated sleep mode (SMb pin) enabling 750 µA per side quiescent current. It operates across 2.25–5.5 V supplies and –40 to 125 °C, targeting isolated gate drivers in traction inverters and battery management systems.
For engineers reviewing the SI86SM42BE-IS2R datasheet, SI86SM42BE-IS2R pinout, SI86SM42BE-IS2R application, or SI86SM42BE-IS2R equivalent, key selection criteria include its reinforced IEC 60747-17 certification, tri-state outputs with enable, selectable fail-safe default output (low), and compatibility with high-noise motor control and onboard charger interfaces.
Technical Context
The SI86SM42BE-IS2R implements RF-based on/off keying modulation across a semiconductor isolation barrier, eliminating startup initialization and providing 10 ns typical propagation delay and 3.5 ns pulse width distortion. Its architecture supports independent UVLO monitoring per side (VDD1/VDD2) with 2.18 V rising threshold and 1.7 V reset detection.
Sleep mode is controlled by the active-low SMb pin: when asserted low, it disables all transmitters except one dedicated channel for SMb state monitoring, reducing total supply current to 750 µA per side while retaining fast wake-up capability. The device uses Schmitt-trigger + CMOS-threshold inputs for >100 kV/µs transient immunity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data rate | DC to 150 Mbps - supports high-speed serial links including isolated SPI and bidirectional bus signaling. |
| Isolation rating | 6000 VRMS - meets reinforced insulation requirements per UL 1577 and IEC 60747-17 for safety-critical automotive and industrial systems. |
| Propagation delay | 10 ns typical - enables precise timing in closed-loop motor control and real-time power converter feedback paths. |
| Supply voltage | 2.25–5.5 V - interoperable with 3.3 V and 5 V logic domains without level shifting. |
| Operating temperature | –40 to 125 °C - qualified for under-hood automotive applications including traction inverters and OBCs. |
| Sleep current | 750 µA per side - reduces system standby power in battery management and energy storage systems. |
| Fail-safe mode | Default low output - ensures safe shutdown state during VDD1 loss in isolated gate driver configurations. |
Pinout & Package
SI86SM42BE-IS2R is housed in a WB SOIC-16 package (wide-body, 10.3 mm creepage/clearance), supporting 6000 VRMS isolation. Pin assignments are validated per Figure 3 (Si86SM4x Pinouts) and Table 1 in the datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1, GND1 | Side A power supply and ground | Power domain for input-side channels (A1–A4); requires 0.1 µF + 10 µF bypass capacitors. |
| A1–A4 | Digital I/O (Side A) | Four unidirectional or bidirectional signal inputs/outputs; A1/A2 forward, A3/A4 reverse per SMb-controlled configuration. |
| SMb | Sleep mode enable (active low) | Asserting low disables all transmitters except one monitoring channel; wake-up occurs on rising edge or open-circuit. |
| Isolation Barrier | Galvanic separation | Dielectric barrier certified to 6000 VRMS; separates Side A (control) and Side B (power stage) domains. |
| B1–B4 | Digital I/O (Side B) | Corresponding isolated outputs/inputs; B1/B2 mirror A1/A2 (forward), B3/B4 mirror A3/A4 (reverse). |
| VDD2, GND2 | Side B power supply and ground | Independent power domain for output-side circuitry; supports separate 3.3 V/5 V rails from Side A. |
| NC | No connect | Pin 9 is unconnected; must be left floating or tied to GND2 per layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| RF-based isolation | Eliminates LED aging and temperature drift of optocouplers; delivers stable 10 ns propagation delay across full temperature range. |
| Reinforced IEC 60747-17 rating | Enables use in functional safety architectures (e.g., ISO 26262 ASIL-B/C) without additional external protection components. |
| Tri-state outputs with EN support | Allows bus sharing in multi-device isolated systems; outputs enter high-impedance state when EN pins are deasserted. |
| Schmitt-trigger + CMOS inputs | Provides >300 mV hysteresis and noise immunity up to 100 kV/µs - critical for noisy inverter gate-drive environments. |
| Selectable fail-safe default | Low-default output ensures MOSFET/IGBT gate remains off during primary-side power loss in isolated half-bridge drivers. |
Applications
| Motor Control Systems | Onboard Chargers (OBC) |
|---|---|
|
Use Scenario: Isolating PWM signals between MCU and gate drivers in 3-phase inverter stacks for EV traction motors. IC Role / Device Role / Timing Role: Forward-path isolator for high-side gate drive signals and reverse-path isolator for current-sense feedback. Use Value: 10 ns propagation delay minimizes dead-time uncertainty; 6000 VRMS withstand supports 800 V DC bus systems. |
Use Scenario: Signal isolation between AC/DC controller and DC/DC secondary-side regulation in bidirectional OBCs. IC Role / Device Role / Timing Role: Bidirectional data isolator for isolated communication (e.g., PMBus) and fault reporting across primary/secondary boundaries. Use Value: Sleep mode reduces standby power to <1.5 mW; AEC-Q100 qualification ensures reliability over 15-year vehicle lifetime. |
| Battery Management Systems (BMS) | Traction Inverters |
|
Use Scenario: Isolating cell-monitoring ADC outputs and pack-level control signals in high-voltage EV battery packs. IC Role / Device Role / Timing Role: Reverse-path isolator for analog front-end status reporting and forward-path isolator for balancing command signals. Use Value: –40 to 125 °C operation supports under-pack thermal environments; reinforced insulation prevents leakage in 900 V+ battery stacks. |
Use Scenario: Providing isolated gate drive and DESAT feedback in SiC-based dual inverter modules for dual-motor EV platforms. IC Role / Device Role / Timing Role: High-CMTI isolator for gate drive signals and fast fault reporting with <100 ns response latency. Use Value: 100 kV/µs transient immunity prevents false triggering during fast-switching SiC transitions; 150 Mbps supports advanced modulation schemes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital isolator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADUM4402BRIZ | 4-channel, 100 Mbps, 5000 VRMS, no sleep mode, 2.7–5.5 V supply | Lacks SMb-controlled ultra-low-power mode; lower isolation rating limits use in 800 V+ systems | Prefer ADUM4402BRIZ where cost sensitivity outweighs need for 6000 VRMS or sub-mA standby. |
| ISO6742FDWR | 4-channel, 50 Mbps, 5000 VRMS, 1.71–5.5 V, integrated LDO, no sleep mode | Slower data rate and no sleep mode; includes 3.3 V LDO simplifying secondary-side power design | Choose ISO6742FDWR when secondary-side rail generation is constrained and 50 Mbps suffices for control loop bandwidth. |
Compared with ADUM4402BRIZ and ISO6742FDWR, SI86SM42BE-IS2R provides higher isolation (6000 VRMS), faster data rate (150 Mbps), and unique sleep-mode power savings (750 µA/side), making it optimal for next-generation EV power electronics requiring both performance and efficiency.
Availability
SI86SM42BE-IS2R is available at Aetrix Electronics and suitable for traction inverters, onboard chargers, and battery management systems requiring stable component supply, long-term lifecycle support, and automotive-grade traceability.
Supply support for SI86SM42BE-IS2R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in high-reliability analog and mixed-signal semiconductors, specializing in RF, timing, and isolation solutions for aerospace, automotive, and industrial markets.
The Si86Sxx family was engineered specifically for high-noise, safety-critical power conversion systems-delivering reinforced isolation, AEC-Q100 qualification, and RF-based timing stability unmatched by optocoupler or capacitive alternatives.
FAQ
What is the isolation voltage rating of the SI86SM42BE-IS2R?
The SI86SM42BE-IS2R is rated for 6000 VRMS isolation per UL 1577 and reinforced insulation per IEC 60747-17. This rating applies to the WB SOIC-16 package and is validated for 1 minute at full voltage. It supports end-equipment compliance with IEC 62368-1 and IEC 60601-1 in medical and industrial applications.
How does the SMb pin function in SI86SM42BE-IS2R?
The SMb pin on the SI86SM42BE-IS2R is an active-low sleep mode control. When pulled low, it disables all transmitter circuits except one dedicated channel that monitors SMb state, reducing total current to 750 µA per side. Release (high or open) restores full operation within microseconds. This feature is unique to the Si86SMxx variant.
Does SI86SM42BE-IS2R support fail-safe operation during power loss?
Yes, SI86SM42BE-IS2R supports selectable fail-safe output behavior. The "BE" suffix indicates a default-low configuration: when VDD1 is unpowered but VDD2 remains active, all B-side outputs hold low. This ensures safe shutdown of downstream power switches in gate driver applications.
What are the supply voltage requirements for SI86SM42BE-IS2R?
SI86SM42BE-IS2R operates from 2.25 V to 5.5 V on both VDD1 and VDD2 independently. Each side requires local 0.1 µF ceramic + 10 µF bulk bypass capacitors. The wide range allows direct interfacing with 3.3 V microcontrollers and 5 V gate drivers without level shifters.
Is SI86SM42BE-IS2R qualified for automotive applications?
Yes, SI86SM42BE-IS2R is AEC-Q100 qualified (Grade 1, –40 to 125 °C) and supports AIAG-compliant PPAP documentation. It is built using automotive-specific manufacturing flows and is listed in IMDS/CAMDS, making it suitable for onboard chargers, battery management systems, and traction inverters in BEV/HEV platforms.
SI86SM42BE-IS2R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Type:
- General Purpose
- Isolated Power:
- No
- Number of Channels:
- 4
- Inputs - Side 1/Side 2:
- 2/2
- Channel Type:
- Unidirectional
- Voltage - Isolation:
- 6000Vrms
- Common Mode Transient Immunity (Min):
- 100kV/µs
- Data Rate:
- 150Mbps
- Propagation Delay tpLH / tpHL (Max):
- 14ns, 14ns
- Pulse Width Distortion (Max):
- 2ns
- Rise / Fall Time (Typ):
- 2.5ns, 2.5ns
- Voltage - Supply:
- 2.25V ~ 5.5V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SI86SM42BE-IS2R FAQ
1.How can I place an order for SI86SM42BE-IS2R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI86SM42BE-IS2R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI86SM42BE-IS2R reliable?
The price and inventory of SI86SM42BE-IS2R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI86SM42BE-IS2R is usually 5 days.
3.What payment methods are accepted for SI86SM42BE-IS2R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI86SM42BE-IS2R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI86SM42BE-IS2R?
SI86SM42BE-IS2R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI86SM42BE-IS2R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI86SM42BE-IS2R?
For technical support, including SI86SM42BE-IS2R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI86SM42BE-IS2R requirements.
6.How does Aetrix verify that SI86SM42BE-IS2R is sourced from the original manufacturer or authorized distributors?
All SI86SM42BE-IS2R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI86SM42BE-IS2R meets industry standards.
7.What is the process for return or replacement of SI86SM42BE-IS2R?
All SI86SM42BE-IS2R units undergo pre-shipment inspection (PSI). If there is an issue with SI86SM42BE-IS2R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI86SM42BE-IS2R part is unused and in its original packaging.
Return procedure for SI86SM42BE-IS2R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI86SM42BE-IS2R Tags
-
ISO1212DBQR
Texas Instruments

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ISO6721BDR
Texas Instruments

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SI8710AC-B-ISR
Skyworks Solutions Inc.

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ISO7720FDR
Texas Instruments

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ISO7721DR
Texas Instruments

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ISO7721FDR
Texas Instruments

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SI8710CC-B-ISR
Skyworks Solutions Inc.

-
ISO6741FQDWRQ1
Texas Instruments

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ISO7721DWVR
Texas Instruments
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ISO7762FDBQR
Texas Instruments

-
ISO7741DWR
Texas Instruments

-
ISO7741FDWR
Texas Instruments
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