Vishay Siliconix SIC469ED-T1-GE3
- Part No.:
- SIC469ED-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Package:
- PowerPAK® MLP55-27
- Datasheet:
-
SIC469ED-T1-GE3.pdf
- Description:
- IC REG BCK ADJ POWERPAK MLP55-27
- Quantity:
- Payment:

- Shipping:

Inventory:5,585
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Product details
Overview
SIC469ED-T1-GE3 from Vishay Siliconix is a 2 A synchronous buck DC/DC converter with integrated high-side and low-side MOSFETs, operating from 4.5 V to 60 V input and delivering adjustable output down to 0.8 V. It features voltage-mode constant-on-time (COT) control, 2 MHz max switching frequency, ±1 % output voltage accuracy over –40 °C to +125 °C, and full protection including OCP, OVP, UVP, SCP, and OTP. It serves as a compact, high-efficiency power supply for industrial computing and robotics.
For engineers reviewing the SIC469ED-T1-GE3 datasheet, SIC469ED-T1-GE3 pinout, SIC469ED-T1-GE3 application, or SIC469ED-T1-GE3 equivalent, key selection considerations include its 2 A current rating (scalable within SiC46x family), MLP55-27L package compatibility, programmable soft start via external capacitor, valley-current OCP configuration via ILIMIT pin, and internal compensation eliminating ESR network requirements.
Technical Context
The SIC469ED-T1-GE3 implements a voltage-mode constant-on-time (COT) control architecture with adaptive zero-current detection for seamless transition into diode emulation mode at light loads. Its internal ramp generator and error amplifier enable ultrafast transient response without external loop compensation components.
It integrates a dual N-channel power stage optimized for up to 98 % peak efficiency, supports 100 kHz–2 MHz switching frequency set by an external resistor on fSW pin, and delivers stable regulation across wide VIN (4.5–60 V) and VOUT (0.8–15 V) ranges while maintaining ±1 % output accuracy over full temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 2 A continuous - defines maximum sustained load capability without thermal derating under typical PCB layout and ambient conditions. |
| Input Voltage Range | 4.5 V to 60 V - enables direct operation from 12 V, 24 V, 48 V industrial rails and battery stacks without pre-regulation. |
| Output Voltage Accuracy | ±1 % from –40 °C to +125 °C - ensures precise regulation across automotive and industrial temperature extremes without calibration. |
| Switching Frequency | 100 kHz to 2 MHz (resistor-programmable) - allows optimization of size vs. efficiency: higher fSW reduces inductor/capacitor size; lower fSW improves light-load efficiency. |
| Feedback Reference | 0.800 V ±4 mV (typ.) - sets output voltage via external resistor divider; tight tolerance minimizes output drift due to reference variation. |
| OCP Configuration | Valley current limit selectable via ILIMIT pin (AGND = 2 A, float = 3 A, VDD = 4 A) - enables safe current limiting matched to system-level fault thresholds. |
| Efficiency | 98 % peak - achieved with integrated low-RDS(on) MOSFETs and optimized gate drive, reducing heat sink requirements in space-constrained designs. |
Pinout & Package
Package: PowerPAK® MLP55-27L - 5 mm × 5 mm, 27-pin lead (Pb)-free thermally enhanced QFN with exposed PGND paddle for low thermal resistance (θJA = 12 °C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VCIN | Internal regulator bias supply | Accepts 4.5–60 V input; powers VDD/VDRV LDOs; RC filter recommended to reduce losses when VIN > 5 V. |
| 2 PGOOD | Open-drain power-good indicator | Asserts high-impedance when VFB is within ±10 % of target; requires external pull-up; 25 μs blanking prevents false triggers. |
| 3 EN | Enable control | High-voltage compatible (0–60 V); internal weak pull-down prevents floating; no sequencing required with other supplies. |
| 4 BOOT | High-side gate driver bootstrap | Connects via series R-C to PHASE; ≥4.7 Ω resistor recommended to limit inrush current during bootstrapping. |
| 5,6 PHASE | High-side source / low-side drain node | Switch-node connection point; must be routed with minimal loop area to reduce EMI and switching losses. |
| 7–9,29 VIN | Main power input | Drain of high-side MOSFET; decoupling capacitors must be placed close to VIN/PGND pads for low-impedance path. |
| 10–11,17,30 PGND | Power ground return | High-current return path for MOSFETs and input/output capacitors; connects to exposed thermal pad. |
| 12–14 SW | Switch node | Direct connection to inductor; critical for EMI performance; must avoid routing near sensitive analog traces. |
| 15 GL | Low-side gate driver output | Drives low-side MOSFET gate; not user-accessible - internal only. |
| 16 VDRV | Gate driver supply | Internal LDO output (5.3 V typ.); 4.7 μF decoupling required; can be bypassed with external 5 V supply in Mode 3/4. |
| 19 SS | Soft-start timing | Charged by internal 5 μA current source; external capacitor sets ramp time (tSS ≈ CSS × 0.8 V / 5 μA). |
| 20 VOUT | Output voltage sense point | Internal ripple injection node - connects directly to output capacitor for accurate feedback path stability. |
| 22 VFB | Feedback input | Compares against 0.8 V reference; connects to resistor divider from VOUT to AGND to set output voltage. |
| 23,28 AGND | Analog ground reference | Must be shorted together with wide trace and connected directly under IC to minimize noise coupling into feedback path. |
| 24 fSW | Frequency setting | Resistor to AGND sets switching frequency: RfSW = VOUT × 1.9×10⁻¹⁰ / fSW. |
| 25 ILIMIT | Current limit select | AGND = 2 A, float = 3 A, VDD = 4 A - configures valley-current OCP threshold per application safety margin. |
| 26 VDD | Bias supply output | Internal LDO output (5 V typ.); 1 μF decoupling required; UVLO threshold 4.0 V (rising) with 150 mV hysteresis. |
| 27 MODE | Operating mode select | Resistor to AGND selects power-save mode and VDRV regulator state (Mode 1–4 per datasheet Table 1). |
Key Features
| Feature | Design Value |
|---|---|
| Internally compensated loop | Stable with any output capacitor type (ceramic, polymer, electrolytic); eliminates need for external ESR network or compensation components. |
| Ultrafast transient response | Minimizes required output capacitance - achieves tight regulation with <10 μF total ceramic output capacitance under typical loads. |
| Programmable light-load efficiency | Diode emulation + frequency foldback reduces quiescent current to 156 μA (operating) and 4 μA (shutdown), extending battery life in always-on systems. |
| Robust fault protection suite | Includes cycle-by-cycle OCP, hiccup-mode UVP, latch-off OVP, thermal shutdown with 35 °C hysteresis, and UVLO on all supply pins. |
| Pre-bias start-up support | Prevents negative voltage spikes and excessive current sinking when output is pre-charged; enables hot-swap and rail sequencing applications. |
Applications
| Industrial Motor Drives | Robotics Power Modules |
|---|---|
|
Use Scenario: Powering microcontrollers, sensors, and gate drivers in servo motor controllers requiring clean, regulated 3.3 V or 5 V rails from 24 V bus. IC Role / Device Role / Timing Role: Primary buck regulator supplying logic and interface circuitry; operates at 500 kHz to balance size and EMI in compact enclosures. Use Value: Internal compensation and ceramic-capacitor stability eliminate bulk electrolytics, reducing board area by >30 % versus legacy solutions. |
Use Scenario: Generating 12 V intermediate rail for motor H-bridge drivers and 5 V for MCU/FPGA in autonomous mobile robots with 48 V battery input. IC Role / Device Role / Timing Role: High-input-voltage buck stage enabling single-stage conversion from battery to multiple system rails. Use Value: 60 V absolute max input rating allows direct connection to 48 V nominal battery without derating or external TVS clamping. |
| Networking Equipment | Industrial IoT Gateways |
|
Use Scenario: Providing 3.3 V power to Ethernet PHYs and management controllers in PoE-powered switches and base stations. IC Role / Device Role / Timing Role: Point-of-load regulator with PGOOD signaling for system-level power sequencing and fault reporting. Use Value: Open-drain PGOOD with 25 μs blanking ensures reliable status indication during line transients common in telecom environments. |
Use Scenario: Supplying 1.8 V and 3.3 V rails to ARM Cortex-M7 microcontrollers and wireless modules (LTE-M, NB-IoT) in edge sensor gateways. IC Role / Device Role / Timing Role: Efficient, low-quiescent-power regulator supporting battery backup and energy harvesting modes. Use Value: 4 μA shutdown current and programmable soft start enable rapid wake-up from deep sleep while minimizing leakage loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2451DT-LF-Z (Monolithic Power Systems) | 3 A rated, 4.5–36 V input, fixed 500 kHz fSW, no internal VDRV LDO bypass option | Limited to ≤36 V input; lacks programmable OCP and pre-bias start-up; simpler but less flexible | Select when 36 V max input suffices and design prioritizes cost over configurability and wide VIN range. |
| TPS54202HDDCR (Texas Instruments) | 2 A rated, 4.5–28 V input, 2.5 V to 6 V output, integrated FETs, Eco-mode™ for light-load efficiency | Lower VIN range excludes 48 V industrial use; no OVP/UVP latching; smaller 3 mm × 2 mm package | Choose for space-constrained consumer applications where 28 V max input is acceptable and footprint is critical. |
Compared with MP2451DT-LF-Z and TPS54202HDDCR, the SIC469ED-T1-GE3 uniquely supports 60 V input, offers three OCP levels via ILIMIT pin, enables external VDRV bypass for higher efficiency, and guarantees ±1 % output accuracy across –40 °C to +125 °C - making it optimal for ruggedized industrial and robotics power designs.
Availability
SIC469ED-T1-GE3 is available at Aetrix Electronics and suitable for industrial motor drives, robotics power modules, networking equipment, and industrial IoT gateways requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across production batches.
Supply support for SIC469ED-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability power management, sensing, and signal conditioning devices for industrial, automotive, and computing markets.
The SiC46x family - including SIC469ED-T1-GE3 - was designed specifically for high-density, wide-input-voltage DC/DC conversion in space- and thermal-constrained industrial and automation systems, emphasizing integration, protection robustness, and ease of design-in.
FAQ
What is the maximum input voltage rating for the SIC469ED-T1-GE3?
The SIC469ED-T1-GE3 has an absolute maximum input voltage (VIN) rating of 66 V, with recommended operating range from 4.5 V to 60 V. This allows direct operation from 48 V industrial buses and telecom rectified rails without external clamping or pre-regulation, provided thermal limits are observed per the 12 °C/W θJA specification.
How does the ILIMIT pin configure overcurrent protection on the SIC469ED-T1-GE3?
The ILIMIT pin on the SIC469ED-T1-GE3 selects the valley-current OCP threshold: tying to AGND sets 2 A (50 %), leaving floating sets 3 A (75 %), and connecting to VDD sets 4 A (100 %). This matches the device's 2 A continuous rating while allowing headroom for surge currents or safety margin adjustments in final system validation.
Can the SIC469ED-T1-GE3 operate with only ceramic output capacitors?
Yes, the SIC469ED-T1-GE3 is internally compensated and stable with any capacitor type, including all-ceramic output networks. Its voltage-mode COT architecture uses internal ramp generation instead of relying on capacitor ESR, eliminating the need for bulk electrolytic or polymer capacitors - simplifying layout and improving reliability in high-vibration environments.
What is the purpose of the VCIN pin on the SIC469ED-T1-GE3?
The VCIN pin on the SIC469ED-T1-GE3 supplies the internal VDD and VDRV LDOs. It accepts 4.5–60 V and may be tied directly to VIN or to a lower auxiliary supply (>5 V) to reduce linear regulator losses. A 0.1 μF decoupling capacitor to AGND is mandatory, and an RC filter is recommended when VIN exceeds 5 V to improve efficiency.
Does the SIC469ED-T1-GE3 support pre-bias start-up?
Yes, the SIC469ED-T1-GE3 supports pre-bias start-up: if the FB voltage exceeds the internal soft-start ramp at power-on, the control logic inhibits switching to prevent reverse current flow through the low-side MOSFET and avoid output voltage collapse or negative spikes - essential for hot-swap and redundant power supply applications.
SIC469ED-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- microBUCK®
- Package/Case:
- PowerPAK® MLP55-27
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 60V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 15V
- Current - Output:
- 2A
- Frequency - Switching:
- 100kHz ~ 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® MLP55-27
SIC469ED-T1-GE3 FAQ
1.How can I place an order for SIC469ED-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIC469ED-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIC469ED-T1-GE3 reliable?
The price and inventory of SIC469ED-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIC469ED-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIC469ED-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIC469ED-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIC469ED-T1-GE3?
SIC469ED-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIC469ED-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIC469ED-T1-GE3?
For technical support, including SIC469ED-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIC469ED-T1-GE3 requirements.
6.How does Aetrix verify that SIC469ED-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIC469ED-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIC469ED-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIC469ED-T1-GE3?
All SIC469ED-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIC469ED-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIC469ED-T1-GE3 part is unused and in its original packaging.
Return procedure for SIC469ED-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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