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Home > Products > Integrated Circuits (ICs) > Interface > Controllers

NXP Semiconductors SJA1000/N1,112

Name: SJA1000/N1,112
Brand: NXP Semiconductors
SKU: SJA1000/N1,112
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SJA1000/N1,112

Manufacturer:: NXP Semiconductors

Category:: Controllers

Package:: 28-DIP (0.600", 15.24mm)

Datasheet:: SJA1000/N1,112.pdf

Description:: IC STAND-ALONE CAN CTRLR 28-DIP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SJA1000/N1,112 from NXP Semiconductors (formerly Philips) is a stand-alone CAN 2.0B controller IC designed for automotive and industrial bus communication. It supports both BasicCAN (PCA82C200-compatible) and extended PeliCAN modes, delivers up to 1 Mbit/s bit rate, features a 64-byte receive FIFO, and operates across −40 °C to +125 °C ambient temperature. It interfaces directly with 8-bit microcontrollers via multiplexed AD0–AD7 bus and supports dual CAN output drivers (TX0/TX1).

For engineers reviewing the SJA1000/N1,112 datasheet, SJA1000/N1,112 pinout, SJA1000/N1,112 application, or SJA1000/N1,112 equivalent, key selection considerations include mode-selectable register mapping (BasicCAN vs. PeliCAN), programmable bit timing (BTR0/BTR1), hardware-supported hot-plug bit-rate detection, listen-only mode for passive monitoring, and self-reception capability for loopback testing.

Technical Context

The SJA1000/N1,112 implements two distinct operational modes: default BasicCAN mode ensures full software and pin compatibility with the PCA82C200, while PeliCAN mode enables full CAN 2.0B compliance-including 29-bit identifier handling, read/write error counters (RXERR/TXERR), arbitration lost capture (ALC), and programmable error warning limit (EWLR). Mode selection is controlled by the CAN-mode bit in the Clock Divider Register (CDR).

Its architecture integrates Interface Management Logic (IML) for CPU register access, Bit Stream Processor (BSP) for frame serialization and error handling, Bit Timing Logic (BTL) with configurable synchronization jump width (SJW), time segments (TSEG1/TSEG2), and sample point control, and Error Management Logic (EML) for error confinement. The 64-byte RXFIFO decouples CPU message processing from real-time reception, reducing overrun risk versus legacy dual-buffer designs.

Key Specifications

Parameter	Value and Actual Design Meaning
CAN Protocol	CAN 2.0B compliant: supports both 11-bit standard and 29-bit extended frames in PeliCAN mode; tolerates extended frames in BasicCAN mode without interrupt generation.
Max Bit Rate	1 Mbit/s: enables high-speed communication in short-haul industrial networks and automotive subsystems with minimal propagation delay compensation.
Receive Buffer	64-byte RXFIFO: allows CPU to process one received message while up to 63 additional bytes accumulate-critical for bursty traffic without data loss.
Operating Temp	−40 °C to +125 °C: validated for under-hood automotive ECUs and harsh industrial environments without derating.
Interface Bus	Multiplexed AD0–AD7 with ALE/AS, RD/E, WR, CS: compatible with Intel 80C51 and Motorola 68000 families without glue logic.
Output Drivers	Dual TX0/TX1 outputs with programmable polarity and mode (OCMODE0/1): supports direct connection to discrete transceivers or integrated CAN PHYs.
Interrupt Logic	Open-drain INT output with wired-OR capability: enables multi-controller interrupt sharing on single MCU IRQ line.

Pinout & Package

Package: DIP28 (plastic dual in-line package; 28 leads; 600 mil width; SOT117-1).

Pin/Terminal	Circuit Role	Design Meaning
AD7–AD0	Multiplexed address/data bus	Shared 8-bit bidirectional bus for register and message buffer access; requires external latch (ALE/AS) for demultiplexing in Intel mode.
ALE/AS	Address latch enable / address strobe	Demultiplexes AD[7:0] in Intel mode (ALE pulse); serves as address strobe in Motorola mode for synchronous access.
CS	Chip select	Active-low enable: gates all internal register accesses; must be asserted during valid address/data cycles.
RD/E, WR	Read/enable and write control	Intel-mode RD/E controls read timing; WR controls write setup/hold; Motorola mode repurposes WR as combined RD/WR signal.
CLKOUT	Programmable clock output	Provides divided oscillator clock to host MCU; disabled via CDR clock-off bit-eliminates need for external clock source.
MODE	Bus interface mode select	Logic HIGH = Intel 80C51-compatible timing; LOW = Motorola 68000-compatible timing; sets default clock divider ratio.
TX0, TX1	CAN differential output drivers	Drive complementary signals to external CAN transceiver; polarity and drive strength configured via Output Control Register (OCR).
RX0, RX1	CAN differential input comparators	Accept dominant/recessive levels from transceiver; bypassable via CDR.CBP bit when external comparator is used-reducing internal latency.
INT	Open-drain interrupt output	Active-low wired-OR interrupt: asserts on any enabled condition (RX, TX, error, overrun); wakes MCU from sleep on dominant edge.
RST	Reset input	Active-low asynchronous reset; supports automatic power-on reset via RC network (e.g., 1 µF + 50 kΩ).

Key Features

Feature	Design Value
PeliCAN mode extensions	Enables full CAN 2.0B functionality including 29-bit ID support, error counters with read/write access, and arbitration lost position capture-essential for diagnostic and safety-critical systems.
Listen-only mode	Disables ACK transmission and active error flags, allowing non-intrusive bus monitoring without affecting network arbitration or error counters.
Hot-plug bit-rate detection	Software-driven auto-detection of bus bit rate during runtime-enabling dynamic reconfiguration in mixed-speed networks or field-upgrade scenarios.
Self-reception request	Allows transmitted messages to be echoed into RXFIFO-enabling local loopback verification without external transceiver wiring or bus loading.
Bypassable RX comparator	CBP bit in CDR disables internal comparator when external transceiver provides level-shifting-reducing total propagation delay by up to 200 ns.

Applications

Automotive Body Control Module	Industrial PLC Backplane
Use Scenario: Centralized control of door locks, lighting, HVAC, and window actuators via CAN bus in modern vehicles. IC Role / Device Role / Timing Role: Stand-alone CAN controller managing message framing, arbitration, error handling, and FIFO buffering between MCU and physical layer. Use Value: Enables deterministic, fault-tolerant communication across distributed ECUs using proven CAN 2.0B protocol at up to 500 kbit/s-meeting ISO 11898-1 requirements.	Use Scenario: Real-time I/O data exchange between modular PLC CPUs and remote I/O stations over ruggedized CAN backbone. IC Role / Device Role / Timing Role: Protocol engine handling bit timing, acceptance filtering, and message queuing for deterministic scan-cycle updates. Use Value: 64-byte RXFIFO prevents message loss during high-priority task execution; extended temperature range ensures reliability in unconditioned control cabinets.
Medical Infusion Pump Network	Off-Highway Vehicle Telematics
Use Scenario: Interconnecting infusion pumps, syringe drivers, and central monitoring units in hospital environments requiring EMI resilience and functional safety. IC Role / Device Role / Timing Role: Isolated CAN node controller providing CRC-checked message transport, error confinement, and bus-off recovery. Use Value: Listen-only mode allows continuous bus health monitoring without disrupting therapy delivery; −40 °C to +125 °C rating supports sterilization cycles and ambient storage.	Use Scenario: Aggregating GPS, engine telemetry, and hydraulic sensor data from multiple subsystems in construction and agricultural machinery. IC Role / Device Role / Timing Role: Robust CAN interface bridging microcontroller peripherals to high-noise mobile equipment bus. Use Value: Dual TX/RX drivers and programmable output configuration simplify integration with diverse CAN transceivers; hot-plug detection adapts to variable bus speeds across OEM variants.

Automotive Body Control Module

Industrial PLC Backplane

Use Scenario: Centralized control of door locks, lighting, HVAC, and window actuators via CAN bus in modern vehicles.

IC Role / Device Role / Timing Role: Stand-alone CAN controller managing message framing, arbitration, error handling, and FIFO buffering between MCU and physical layer.

Use Value: Enables deterministic, fault-tolerant communication across distributed ECUs using proven CAN 2.0B protocol at up to 500 kbit/s-meeting ISO 11898-1 requirements.

Use Scenario: Real-time I/O data exchange between modular PLC CPUs and remote I/O stations over ruggedized CAN backbone.

IC Role / Device Role / Timing Role: Protocol engine handling bit timing, acceptance filtering, and message queuing for deterministic scan-cycle updates.

Use Value: 64-byte RXFIFO prevents message loss during high-priority task execution; extended temperature range ensures reliability in unconditioned control cabinets.

Medical Infusion Pump Network

Off-Highway Vehicle Telematics

Use Scenario: Interconnecting infusion pumps, syringe drivers, and central monitoring units in hospital environments requiring EMI resilience and functional safety.

IC Role / Device Role / Timing Role: Isolated CAN node controller providing CRC-checked message transport, error confinement, and bus-off recovery.

Use Value: Listen-only mode allows continuous bus health monitoring without disrupting therapy delivery; −40 °C to +125 °C rating supports sterilization cycles and ambient storage.

Use Scenario: Aggregating GPS, engine telemetry, and hydraulic sensor data from multiple subsystems in construction and agricultural machinery.

IC Role / Device Role / Timing Role: Robust CAN interface bridging microcontroller peripherals to high-noise mobile equipment bus.

Use Value: Dual TX/RX drivers and programmable output configuration simplify integration with diverse CAN transceivers; hot-plug detection adapts to variable bus speeds across OEM variants.

Equivalent & Alternatives

The following parts are listed as comparable options for similar CAN controller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MCP2515-I/P	SPI interface only; no parallel bus; requires external crystal (up to 25 MHz); no listen-only or hot-plug detection modes.	Best suited for space-constrained designs with SPI-capable MCUs; lacks direct 8051/68K bus compatibility.	Select MCP2515-I/P when board layout favors SPI routing and external clock sources are acceptable.
TJA1050T/CM	Physical-layer transceiver only-not a controller; requires external MCU with CAN peripheral or SJA1000-style controller.	Used downstream of SJA1000/N1,112 to drive CAN bus; not functionally substitutable as standalone controller.	Choose TJA1050T/CM only as companion transceiver-not as controller replacement.

Compared with MCP2515-I/P, SJA1000/N1,112 offers native parallel microcontroller interfacing and advanced diagnostics (ALC, EWLR), while TJA1050T/CM serves a fundamentally different layer and cannot replace controller functionality.

Availability

SJA1000/N1,112 is available at Aetrix Electronics and suitable for automotive body control modules, industrial PLC backplanes, and medical infusion pump networks requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for SJA1000/N1,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.

The SJA1000/N1,112 belongs to NXP's legacy CAN controller product line, engineered specifically for robust, low-latency, and software-compatible migration from PCA82C200-based systems in mission-critical embedded networks.

FAQ

What is the primary function of the SJA1000/N1,112 in a CAN network?

The SJA1000/N1,112 serves as a stand-alone CAN protocol controller that handles message framing, arbitration, error detection/correction, and bit timing-offloading these tasks from the host microcontroller. It manages the complete CAN 2.0B data link layer, enabling reliable communication between nodes without requiring CAN peripheral hardware in the MCU. Its dual-mode operation (BasicCAN and PeliCAN) ensures backward compatibility while supporting advanced diagnostics and extended identifiers.

Does the SJA1000/N1,112 require an external CAN transceiver to operate?

Yes, the SJA1000/N1,112 requires an external CAN transceiver (e.g., TJA1050 or PCA82C251) to drive the physical bus lines. It provides differential TX0/TX1 outputs and RX0/RX1 inputs but does not include the voltage-level translation or bus-driving capability needed for ISO 11898-2 compliance. The RX comparator can be bypassed via the CDR.CBP bit when using transceivers with integrated comparators-reducing total signal path delay.

How does the SJA1000/N1,112 support both Intel and Motorola microcontroller buses?

The SJA1000/N1,112 supports both bus architectures through the MODE pin and configurable control signals: MODE = HIGH selects Intel 80C51 timing (using ALE/AS as address latch enable and separate RD/E and WR), while MODE = LOW enables Motorola 68000 timing (using AS as address strobe and WR as combined RD/WR). The CLKOUT frequency and default clock divider ratio also differ between modes, ensuring seamless integration without external timing logic.

What distinguishes BasicCAN mode from PeliCAN mode in the SJA1000/N1,112?

BasicCAN mode provides full pin and software compatibility with the PCA82C200, supporting only 11-bit identifiers and limited error reporting. PeliCAN mode unlocks full CAN 2.0B functionality-including 29-bit identifiers, read/write error counters (RXERR/TXERR), arbitration lost capture (ALC), programmable error warning limit (EWLR), and listen-only operation. Mode selection is controlled by the CAN-mode bit in the Clock Divider Register (CDR), with BasicCAN as the default after reset.

Can the SJA1000/N1,112 operate without an external crystal oscillator?

No-the SJA1000/N1,112 requires an external crystal (typically 16 MHz or 24 MHz) connected between XTAL1 and XTAL2 to generate its internal clock. The oscillator amplifier is integrated, but no internal RC oscillator is provided. Capacitors (15 pF recommended) must be placed from XTAL1 and XTAL2 to VSS1 to stabilize oscillation. The CLKOUT signal-derived from this oscillator via the programmable clock divider-can then feed the host MCU, eliminating the need for a second crystal.

SJA1000/N1,112 Specifications

Product attributes: Attribute value

Manufacturer:: NXP Semiconductors

Package/Case:: 28-DIP (0.600", 15.24mm)

Programmable:: Not Verified

Protocol:: CANbus

Function:: Controller

Interface:: Parallel

Standards:: CAN 2.0

Voltage - Supply:: 4.5V ~ 5.5V

Current - Supply:: 15mA

Operating Temperature:: -40°C ~ 125°C

Supplier Device Package:: 28-DIP

Grade:: -

Qualification:: -

SJA1000/N1,112 FAQ

1.How can I place an order for SJA1000/N1,112 through Aetrix?

Please submit a Request for Quotation (RFQ) for SJA1000/N1,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SJA1000/N1,112 reliable?

The price and inventory of SJA1000/N1,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SJA1000/N1,112 is usually 5 days.

3.What payment methods are accepted for SJA1000/N1,112?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SJA1000/N1,112 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SJA1000/N1,112?

SJA1000/N1,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SJA1000/N1,112 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SJA1000/N1,112?

For technical support, including SJA1000/N1,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SJA1000/N1,112 requirements.

6.How does Aetrix verify that SJA1000/N1,112 is sourced from the original manufacturer or authorized distributors?

All SJA1000/N1,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SJA1000/N1,112 meets industry standards.

7.What is the process for return or replacement of SJA1000/N1,112?

All SJA1000/N1,112 units undergo pre-shipment inspection (PSI). If there is an issue with SJA1000/N1,112, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SJA1000/N1,112 part is unused and in its original packaging.

Return procedure for SJA1000/N1,112:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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