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NXP Semiconductors SJA1105ELY
- Part No.:
- SJA1105ELY
- Manufacturer:
- NXP Semiconductors
- Category:
- Controllers
- Package:
- 159-LFBGA
- Datasheet:
-
SJA1105ELY.pdf
- Description:
- IC ETHERNET SWITCH SPI 159LFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:2,570
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Product details
Overview
SJA1105ELY from NXP Semiconductors is a 5-port IEEE 802.3-compliant automotive Ethernet switch supporting MII, RMII, and RGMII per port, with 128 kB frame buffer, 1024-entry MAC learning table, and hardware AVB (IEEE 802.1AS/802.1Qav) support. It operates across −40 °C to +105 °C and is AEC-Q100 qualified for gateway, body domain controller, and ECU daisy-chain applications.
For engineers reviewing the SJA1105ELY datasheet, SJA1105ELY pinout, SJA1105ELY application, or SJA1105ELY equivalent, key selection considerations include per-port interface mode configurability (MII/RMII/RGMII), AVB timestamping and credit-based shaping, deterministic frame handling up to 1 Gbit/s, and LFBGA159 package compatibility with automotive thermal and ESD requirements.
Technical Context
The SJA1105ELY implements a store-and-forward architecture with dynamic memory management (DMM/FMC/FBM) for frame buffering and scheduling. Its Clock Generation Unit (CGU) delivers 25 MHz system clock input and reference clock output, while the SPI slave interface (up to 25 MHz, mode 1) enables host configuration of VLAN, address lookup, policing, and forwarding tables.
Hardware-accelerated AVB functions include IEEE 1588v2 one-step sync forwarding, ingress/egress per-port timestamping, ten configurable credit-based shapers, and support for AVB SR Classes A/B/C. The device lacks TTEthernet/TSN features-those are exclusive to the SJA1105TEL variant.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Ports | 5 independent Ethernet ports, each configurable as MII, RMII, or RGMII |
| Data Rate Support | MII/RMII: 10/100 Mbit/s; RGMII: 10/100/1000 Mbit/s |
| Frame Buffer | 128 kB on-chip memory for store-and-forward operation with dynamic allocation |
| MAC Address Table | 1024 entries with configurable static/dynamic mix and aging |
| AVB Compliance | Hardware IEEE 802.1AS (PTP), 802.1Qav (credit shapers), and 1588v2 transparent clock update |
| Operating Temperature | −40 °C to +105 °C ambient, Automotive Grade 2 qualification |
| Supply Voltages | VDD_CORE = 1.2 V; VDDIO_MIIx = 3.3 V / 2.5 V; VDDIO_HOST = 1.8–3.3 V |
Pinout & Package
LFBGA159 (12 mm × 12 mm) package with 159 solder balls, optimized for automotive PCB layout and thermal dissipation under AEC-Q100 conditions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_CORE (D6, D9, F4, etc.) | Core power supply | 1.2 V supply for internal logic; requires low-noise decoupling near pins |
| VDDIO_MIIx (D4, E4, G4, etc.) | I/O supply for xMII interfaces | Configurable 3.3 V / 2.5 V per port group; sets signal voltage level for MII/RMII/RGMII |
| RST_N (P3) | Active-low reset input | Asynchronous hard reset; must be held low during power-up sequencing |
| SCK/SDI/SDO/SS_N (P5, N5, P4, N6) | SPI slave interface | 25 MHz max clock; CPOL=0, CPHA=1; used for full configuration loading and runtime register access |
| TXD0–TXD3 / RXD0–RXD3 (A2–G2, etc.) | xMII data lanes | Port-specific transmit/receive data; pin function depends on configured interface mode (MII/RMII/RGMII) |
| CLK_OUT (H1) | Reference clock output | 25 MHz CMOS output; drives external PHYs or secondary switches in cascaded topologies |
Key Features
| Feature | Design Value |
|---|---|
| Per-port interface flexibility | Each of five ports independently set to MII, RMII, or RGMII-enables mixed PHY connectivity (e.g., TJA1100 BroadR-Reach + Gigabit PHYs) without redesign |
| Hardware AVB acceleration | Dedicated timestamping, credit shapers, and 1588v2 sync forwarding eliminate host CPU overhead for time-critical infotainment and ADAS traffic |
| VLAN and QoS engine | 4096 VLANs with per-port egress tagging/untagging and 8 priority queues per port-enables strict traffic segregation in safety-critical domains |
| Robust diagnostics | Frame mirroring, broadcast storm protection, and real-time statistics (dropped frames, buffer load) simplify in-vehicle network debugging and validation |
| Automotive-grade reliability | AEC-Q100 Grade 2 qualification, −40 °C to +105 °C operation, and HBM ±2000 V ESD rating ensure field durability in harsh vehicle environments |
Applications
| Automotive Gateway | Body Domain Controller |
|---|---|
Use Scenario: Aggregating CAN FD, LIN, and Ethernet traffic between powertrain, chassis, and infotainment domains. IC Role / Device Role / Timing Role: Central Ethernet switch bridging legacy buses to high-speed backbone; provides AVB-synchronized audio/video streams. Use Value: Enables deterministic latency for OTA updates and secure firmware distribution across ECUs using VLAN-isolated channels. | Use Scenario: Managing lighting, door modules, seat controls, and HVAC via distributed Ethernet nodes. IC Role / Device Role / Timing Role: Local switching hub with per-port rate limiting and frame mirroring for diagnostic trace capture. Use Value: Reduces wiring harness weight by replacing point-to-point CAN links with daisy-chained Ethernet, while maintaining functional safety via ingress policing. |
| ADAS Sensor Fusion Hub | Infotainment Head Unit |
Use Scenario: Interconnecting radar, camera, and ultrasonic sensors to central processing unit with synchronized timestamps. IC Role / Device Role / Timing Role: Time-aware switch providing IEEE 1588v2 hardware timestamping and one-step sync forwarding for sensor data alignment. Use Value: Achieves sub-microsecond timestamp accuracy across multi-sensor inputs-critical for fusion algorithms requiring precise temporal correlation. | Use Scenario: Delivering low-latency, high-fidelity audio/video streams to displays and speakers in premium vehicle cabins. IC Role / Device Role / Timing Role: AVB bridge supporting IEEE 802.1Qav Class A (≤2 ms latency) and Class B (≤50 ms latency) traffic with credit-based shaping. Use Value: Guarantees jitter-free playback and lip-sync accuracy without software-based QoS, reducing host processor load and OS dependency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive Ethernet switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Marvell 88Q5050 | 5-port automotive switch with integrated 100BASE-T1 PHYs; supports TSN (802.1Qbv/Qbu); larger 169-pin BGA package | Eliminates need for external PHYs but increases BOM count; targets higher integration tier than SJA1105ELY's PHY-agnostic design | Select when PHY integration and TSN determinism outweigh cost and layout flexibility advantages of discrete PHY + SJA1105ELY |
| NXP SJA1105P | Pin-compatible successor with enhanced TSN support (802.1Qbv/Qci/Qcc), larger 256 kB buffer, and extended temperature range (−40 °C to +125 °C) | Backward-compatible configuration but requires updated firmware; suited for next-gen platforms needing future-proof TSN readiness | Select for new designs requiring long-term roadmap alignment and expanded deterministic networking capabilities beyond AVB |
Compared with Marvell 88Q5050 and NXP SJA1105P, the SJA1105ELY offers optimal balance of AVB performance, PHY interface flexibility, and proven AEC-Q100 deployment-making it ideal for cost-sensitive, non-TSN automotive gateways where discrete PHY selection and legacy software compatibility are priorities.
Availability
SJA1105ELY is available at Aetrix Electronics and suitable for automotive gateway systems, body domain controllers, ADAS sensor hubs, and infotainment head units requiring stable component supply, AEC-Q100 compliance, and long-term lifecycle support.
Supply support for SJA1105ELY includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on automotive, industrial, IoT, and communication infrastructure solutions, with deep expertise in secure connectivity and edge processing.
The SJA1105 product line was designed specifically for automotive Ethernet networking-delivering scalable, AVB-enabled switching in compact packages for domain controllers, gateways, and centralized vehicle architectures.
FAQ
What Ethernet interface modes does the SJA1105ELY support per port?
The SJA1105ELY supports MII, RMII, and RGMII modes on each of its five ports-configurable independently via SPI. MII and RMII operate at 10/100 Mbit/s; RGMII adds 1000 Mbit/s capability. Interface voltage levels (3.3 V or 2.5 V) are set per port group using VDDIO_MIIx pins. This flexibility allows direct connection to diverse PHYs including NXP's TJA1100 and standard Fast/Gigabit Ethernet transceivers. The SJA1105ELY does not support GMII or SGMII.
Does the SJA1105ELY support Time-Sensitive Networking (TSN) features like IEEE 802.1Qbv?
No, the SJA1105ELY does not support TSN features such as IEEE 802.1Qbv (time-aware shaper) or 802.1Qci (per-stream policing). These capabilities are exclusive to the SJA1105TEL variant. The SJA1105ELY implements full Audio Video Bridging (AVB) per IEEE 802.1AS and 802.1Qav-including hardware timestamping, credit-based shapers, and 1588v2 one-step sync forwarding-but lacks deterministic time-triggered scheduling required for TSN. For TSN deployments, consider the SJA1105TEL or newer SJA1105P.
What is the role of the SPI interface on the SJA1105ELY, and what timing constraints apply?
The SPI interface on the SJA1105ELY serves as the primary host configuration and control channel, operating as a slave in Mode 1 (CPOL = 0, CPHA = 1) up to 25 MHz. It is used to load the initial configuration stream and access runtime registers for VLAN, address lookup, policing, and forwarding tables. Critical timing constraints include a >130 ns read-after-write delay for same-register access and a 64 ns delay between control and data phases when reading CGU registers-or alternatively, limiting SPI frequency to ≤17.8 MHz. The SJA1105ELY supports 1.8 V, 2.5 V, and 3.3 V host I/O via VDDIO_HOST.
How does the SJA1105ELY handle frame buffering and memory management?
The SJA1105ELY uses a 128 kB on-chip frame buffer managed by three coordinated blocks: Dynamic Memory Management (DMM), Frame Memory Controller (FMC), and Frame Buffer Management (FBM). The DMM allocates memory handles for ingress frames and tracks metadata; the FMC converts handles to virtual addresses; and the FBM optimizes physical memory usage based on frame size. This architecture enables store-and-forward operation with configurable partitioning per port, automatic frame dropping on overflow, and statistics collection for buffer load and dropped frames-ensuring deterministic latency and robust congestion handling in automotive networks.
Is the SJA1105ELY pin-compatible with other variants in the SJA1105 family?
Yes, the SJA1105ELY is pin-compatible with the SJA1105TEL variant-both use the LFBGA159 package with identical ball mapping and footprint. This allows hardware reuse across AVB-only (SJA1105ELY) and AVB+TSN (SJA1105TEL) designs. However, firmware and configuration differ significantly: the SJA1105TEL requires additional setup for virtual link lookup, policing, and schedule engine blocks. Pin compatibility does not extend to the SJA1105P, which uses a different package (LFBGA256) and revised pinout.
SJA1105ELY Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 159-LFBGA
- Programmable:
- Not Verified
- Protocol:
- Ethernet
- Function:
- Switch
- Interface:
- SPI
- Standards:
- IEEE 802.3
- Voltage - Supply:
- 1.65V ~ 3.6V
- Current - Supply:
- 3.5mA
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Supplier Device Package:
- 159-LFBGA (12x12)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
SJA1105ELY FAQ
1.How can I place an order for SJA1105ELY through Aetrix?
Please submit a Request for Quotation (RFQ) for SJA1105ELY on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SJA1105ELY reliable?
The price and inventory of SJA1105ELY are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SJA1105ELY is usually 5 days.
3.What payment methods are accepted for SJA1105ELY?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SJA1105ELY transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SJA1105ELY?
SJA1105ELY orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SJA1105ELY order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SJA1105ELY?
For technical support, including SJA1105ELY datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SJA1105ELY requirements.
6.How does Aetrix verify that SJA1105ELY is sourced from the original manufacturer or authorized distributors?
All SJA1105ELY products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SJA1105ELY meets industry standards.
7.What is the process for return or replacement of SJA1105ELY?
All SJA1105ELY units undergo pre-shipment inspection (PSI). If there is an issue with SJA1105ELY, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SJA1105ELY part is unused and in its original packaging.
Return procedure for SJA1105ELY:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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