My Inquiry
My Account
NXP Semiconductors SJA1105RELY
- Part No.:
- SJA1105RELY
- Manufacturer:
- NXP Semiconductors
- Category:
- Controllers
- Package:
- 159-LFBGA
- Datasheet:
-
SJA1105RELY.pdf
- Description:
- IC ETHERNET SWITCH SPI 159LFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:155
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SJA1105RELY from NXP Semiconductors is a 5-port automotive Ethernet switch IC supporting IEEE 802.1Q VLANs, IEEE 802.1AS timestamping, and IEEE 802.1Qav AVB traffic shaping. It operates across 10/100/1000 Mbit/s via RGMII/SGMII, features independent 1.8/2.5/3.3 V I/O domains, 1.2 V core, and is qualified to AEC-Q100 Grade 2 (−40 °C to +105 °C) for in-vehicle networking.
For engineers reviewing the SJA1105RELY datasheet, SJA1105RELY pinout, SJA1105RELY application, or SJA1105RELY equivalent, key selection criteria include AVB-aware hardware shaping (16 credit-based shapers), IEEE 1588v2 one-step sync forwarding, automotive temperature compliance, and LFBGA159 package compatibility with SJA1105P/Q/S variants.
Technical Context
The SJA1105RELY implements a store-and-forward switching architecture with per-port configurable PHY interface modes (MII/RMII/RGMII/SGMII), enabling flexible integration with Fast or Gigabit Ethernet PHYs and host processors. Its hardware-accelerated AVB engine supports SR Class A/B/C traffic scheduling and IEEE 802.1Qav-compliant credit-based shaping allocated freely per priority queue and port.
It integrates IEEE 1588v2 one-step sync forwarding for deterministic time synchronization and provides real-time statistics on dropped frames and buffer load. The device uses a 25 MHz system clock input and delivers a 25 MHz reference clock output, with JTAG (IEEE 1149.1/1149.6) support for boundary scan and TAP access.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Port count | 5-port Ethernet switch with full store-and-forward operation |
| Data rate per port | 10/100 Mbit/s (MII/RMII); 10/100/1000 Mbit/s (RGMII/SGMII) |
| VLAN support | 4096 IEEE 802.1Q VLANs with tag insertion/stripping |
| AVB shaping | 16 hardware credit-based shapers, allocable per port and priority queue |
| Timing protocol | IEEE 1588v2 one-step sync forwarding in hardware |
| Operating temp | AEC-Q100 Grade 2: −40 °C to +105 °C ambient |
| Core voltage | 1.2 V core supply; independent 1.8/2.5/3.3 V I/O domains |
Pinout & Package
LFBGA159 (12 mm × 12 mm) package with 159 solder balls; pin-compatible with SJA1105P/Q/S variants per ordering table.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDIO_1–VDDIO_5 | I/O power supply | Independent 1.8/2.5/3.3 V domains per port group for flexible PHY interfacing |
| VDDCORE | Core power supply | 1.2 V regulated supply for internal logic and switching fabric |
| CLKIN | System clock input | 25 MHz crystal or AC-coupled single-ended clock input |
| CLKOUT | Reference clock output | 25 MHz buffered reference clock for cascaded devices or PHYs |
| SPI_CS / SPI_SCK / SPI_MOSI / SPI_MISO | Host configuration interface | Quad-wire SPI for non-volatile configuration loading and runtime register access |
| TCK / TMS / TDI / TDO | JTAG test interface | IEEE 1149.1/1149.6 compliant boundary scan and TAP controller access |
Key Features
| Feature | Design Value |
|---|---|
| Hardware AVB shaping | 16 credit-based shapers assignable per port/priority - enables deterministic Class A/B/C traffic without CPU overhead |
| IEEE 1588v2 sync forwarding | One-step hardware timestamping and forwarding - reduces PTP latency and jitter in multi-hop networks |
| Flexible PHY interface | MII/RMII/RGMII/SGMII support with programmable drive strength - eliminates need for external level shifters or delay components |
| Automotive qualification | AEC-Q100 Rev-H Grade 2 certified - validated for under-hood and infotainment ECU deployment |
| VLAN and QoS | 4096 VLANs with IEEE 802.1Q tagging and priority-based queuing - isolates safety-critical and infotainment traffic |
Applications
| Automotive ADAS Domain Controller | In-Vehicle Infotainment (IVI) Gateway |
|---|---|
Use Scenario: Aggregating camera, radar, and sensor data streams within a centralized ADAS ECU using time-synchronized Ethernet. IC Role / Device Role / Timing Role: Low-latency 5-port switch with IEEE 1588v2 one-step sync forwarding and AVB shaping for deterministic sensor fusion timing. Use Value: Enables sub-microsecond timestamp alignment across sensors and eliminates software-based PTP stack overhead. | Use Scenario: Bridging infotainment head unit, telematics control unit, and rear-seat display over a unified Ethernet backbone. IC Role / Device Role / Timing Role: VLAN-isolated switching node with 4096 VLAN support and priority-based QoS for concurrent audio/video/control traffic. Use Value: Guarantees bandwidth reservation for Class B AVB streams while preventing interference from diagnostics or firmware updates. |
| Automotive Zonal Gateway | Commercial Vehicle Telematics Hub |
Use Scenario: Consolidating body control, lighting, and HVAC modules into a zonal architecture with centralized network management. IC Role / Device Role / Timing Role: Automotive-grade switch with AEC-Q100 Grade 2 rating and independent I/O voltage domains for mixed-voltage module interconnection. Use Value: Supports direct connection to 1.8 V cameras, 3.3 V microcontrollers, and 2.5 V CAN transceivers without external level translation. | Use Scenario: Enabling remote diagnostics, fleet tracking, and over-the-air updates across multiple vehicle subsystems in heavy-duty trucks. IC Role / Device Role / Timing Role: Robust Ethernet switch with JTAG boundary scan and SPI-based firmware update capability for field-deployed reliability. Use Value: Allows in-service reconfiguration and traceable firmware versioning via SPI without requiring physical rework or JTAG debug access. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive Ethernet switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SJA1105SEL | Same LFBGA159 package and pinout; supports identical AVB/1588v2 features but adds SGMII-only mode and enhanced security boot options | Preferred where secure boot and cryptographic authentication of switch configuration are required | Select SJA1105SEL when secure firmware loading and tamper-resistant configuration storage are mandatory |
| Marvell 88Q5050 | 5-port automotive switch with IEEE 802.1Qav/1AS support; differs in SPI register map, clock tree architecture, and lacks native RGMII internal delay compensation | Used in commercial truck telematics where extended temperature range (−40 °C to +125 °C) is prioritized over RGMII component reduction | Choose Marvell 88Q5050 only if design requires >+105 °C operation and can accommodate external RGMII delay matching |
Compared with SJA1105RELY, SJA1105SEL offers enhanced security features at identical pinout and AVB performance, while Marvell 88Q5050 trades RGMII integration for wider temperature tolerance - making SJA1105RELY optimal for cost-sensitive, RGMII-dependent automotive ECUs needing AEC-Q100 Grade 2 compliance.
Availability
SJA1105RELY is available at Aetrix Electronics and suitable for automotive ADAS domain controllers, in-vehicle infotainment gateways, and zonal electronic control units requiring stable component supply, long-term lifecycle assurance, and AEC-Q100-compliant sourcing.
Supply support for SJA1105RELY includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with leadership in automotive Ethernet and functional safety technologies.
The SJA1105RELY belongs to NXP's SJA1105P/Q/R/S family of automotive-qualified Ethernet switches, designed specifically for deterministic, time-sensitive networking in next-generation vehicle architectures including domain and zonal controllers.
FAQ
What Ethernet standards does the SJA1105RELY support?
The SJA1105RELY supports IEEE 802.3 for physical layer compliance, IEEE 802.1Q for VLAN tagging, IEEE 802.1AS for time synchronization, and IEEE 802.1Qav for AVB traffic shaping. It also implements IEEE 1588v2 one-step sync forwarding in hardware. These capabilities are confirmed in the official NXP SJA1105P/Q/R/S objective short data sheet Rev. 1 (2017). The SJA1105RELY does not support TSN enhancements beyond 802.1Qav/1AS.
Is the SJA1105RELY pin-compatible with other SJA1105 variants?
Yes, the SJA1105RELY is pin-compatible with SJA1105PEL, SJA1105QEL, and SJA1105SEL in the LFBGA159 package (SOT1427-1), as explicitly stated in Table 1 of the NXP objective short data sheet. This allows drop-in replacement among P/Q/R/S variants when interface mode and feature requirements align. The SJA1105RELY retains identical ball mapping and electrical pin functions across all five ports, SPI, JTAG, and power domains.
What is the maximum operating temperature for the SJA1105RELY?
The SJA1105RELY is qualified for automotive Grade 2 ambient operation from −40 °C to +105 °C, per AEC-Q100 Rev-H requirements. This rating is specified in Section 1.1 of the NXP SJA1105P/Q/R/S objective short data sheet and applies to the full operating voltage and frequency range. It is not rated for Grade 0 (−40 °C to +125 °C) or Grade 1 (−40 °C to +125 °C) conditions.
Does the SJA1105RELY support RGMII without external delay components?
Yes, the SJA1105RELY includes internal delay compensation for RGMII interfaces, eliminating the need for external delay components such as PCB trace length matching or discrete delay ICs. This is documented in Section 1.3 ("Interface features") of the NXP objective short data sheet, which states "internal delay for interface connection without external delay components" - a key differentiator for compact automotive ECU designs.
How is configuration loaded into the SJA1105RELY at startup?
The SJA1105RELY loads its switch configuration via SPI interface during power-up, using an external non-volatile memory (e.g., SPI flash) connected to the SPI_CS, SPI_SCK, SPI_MOSI, and SPI_MISO pins. Configuration is stored in a binary format defined by NXP's SJA1105 configuration toolchain. The SJA1105RELY does not embed configuration memory and relies entirely on external SPI-based initialization - a requirement confirmed in both the short data sheet and NXP application notes.
SJA1105RELY Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 159-LFBGA
- Programmable:
- Not Verified
- Protocol:
- Ethernet
- Function:
- Switch
- Interface:
- SPI
- Standards:
- IEEE 802.3
- Voltage - Supply:
- 1.65V ~ 3.6V
- Current - Supply:
- 3.5mA
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Supplier Device Package:
- 159-LFBGA (12x12)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
SJA1105RELY FAQ
1.How can I place an order for SJA1105RELY through Aetrix?
Please submit a Request for Quotation (RFQ) for SJA1105RELY on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SJA1105RELY reliable?
The price and inventory of SJA1105RELY are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SJA1105RELY is usually 5 days.
3.What payment methods are accepted for SJA1105RELY?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SJA1105RELY transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SJA1105RELY?
SJA1105RELY orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SJA1105RELY order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SJA1105RELY?
For technical support, including SJA1105RELY datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SJA1105RELY requirements.
6.How does Aetrix verify that SJA1105RELY is sourced from the original manufacturer or authorized distributors?
All SJA1105RELY products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SJA1105RELY meets industry standards.
7.What is the process for return or replacement of SJA1105RELY?
All SJA1105RELY units undergo pre-shipment inspection (PSI). If there is an issue with SJA1105RELY, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SJA1105RELY part is unused and in its original packaging.
Return procedure for SJA1105RELY:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SJA1105RELY Tags
-
PTN5150AHXMP
NXP Semiconductors
-
USB3740B-AI9-TR
Microchip Technology
-
USB3740B-AI2-TR
Microchip Technology
-
USB3300-EZK-TR
Microchip Technology
-
USB3300-EZK
Microchip Technology
-
FUSB340TMX
onsemi
-
FUSB302BMPX
onsemi
-
DP83826IRHBR
Texas Instruments
-
MCP2518FDT-E/QBB
Microchip Technology
-
FUSB302MPX
onsemi
-
MCP2518FDT-E/SL
Microchip Technology
-
FT260Q-R
FTDI, Future Technology Devices International Ltd
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
