Renesas SLG46116V-SKT
- Part No.:
- SLG46116V-SKT
- Manufacturer:
- Renesas
- Category:
- Programming Adapters, Sockets
- Package:
- Datasheet:
-
SLG46116V-SKT.pdf
- Description:
- SLG4SA14-16X25 SOCKET ADAPTER
- Quantity:
- Payment:

- Shipping:

Inventory:1,551
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SLG46116V-SKT from Renesas Electronics is a programmable mixed-signal matrix IC integrating two analog comparators, four combinational LUTs (two 2-bit, two 3-bit), three 8-bit counter/delay generators, a trimmed RC oscillator (25 kHz / 2 MHz), Power-On Reset, and a soft-start P-FET power switch with slew rate control. It delivers 1.25 A switching capability at 3.3 V VIN, supports 1.5–5.5 V input voltage range, and operates across –40 °C to +85 °C for LED driver, haptic motor control, and system RESET applications.
For engineers reviewing the SLG46116V-SKT datasheet, SLG46116V-SKT pinout, SLG46116V-SKT application, or SLG46116V-SKT equivalent, this device enables rapid prototyping of custom power sequencing and analog-digital logic functions in ultra-compact STQFN-14 packaging - with OTP NVM configuration, read-back protection, and full GPIO flexibility including Vref output and external clock input.
Technical Context
The SLG46116V-SKT implements a user-configurable interconnect matrix routing signals between macrocells including ACMPs, LUTs, counters, and the integrated P-FET power switch. Its programmable delay/degitch filter, pipe delay (8-stage/2-output), and selectable edge detection support precise timing control without external components.
Power management is handled via dedicated VIN/VOUT pins driving the internal CuFET-based P-channel switch, with RDSON as low as 28.5 mΩ at 5.5 V and controlled turn-on via PWR_SW_ON with 12–76 µs delay depending on input voltage. All I/O pins support configurable pull-up/pull-down (10 kΩ/100 kΩ/1 MΩ) and multiple drive strengths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 1.5 V to 5.5 V - supports direct integration into 1.8 V, 3.3 V, and 5 V power domains without level-shifting. |
| P-FET IDS | 1.25 A @ 3.3 V VIN - enables high-efficiency load switching for LEDs, motors, or rail enable in portable systems. |
| RDSON | 28.5 mΩ @ 5.5 V - minimizes conduction loss and thermal rise during sustained current delivery. |
| LUT Count | 4 total (2×2-bit, 2×3-bit) - provides sufficient combinatorial logic density for state machines, glue logic, and signal conditioning. |
| Counter/Delay Units | 3 independent 8-bit CNT/DLY blocks - allows concurrent timing functions such as debounce, pulse generation, and sequenced delays. |
| Operating Temp | –40 °C to +85 °C - qualified for industrial and automotive cabin-ambient environments. |
| Package | 1.6 × 2.5 × 0.55 mm STQFN-14 - enables space-constrained PCB layouts in wearables and IoT edge nodes. |
Pinout & Package
SLG46116V-SKT uses a 14-pin STQFN package (1.6 × 2.5 × 0.55 mm, Pb-free/RoHS-compliant) with exposed thermal pad. Pin 1 is GPI-only; Pins 2–4, 10–13 are multi-function GPIO; Pin 5 is VIN; Pin 7 is VOUT; Pins 8 and 9 are AGND/GND; Pin 14 is VDD; Pin 6 is NC.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 (GPI) | General Purpose Input | Dedicated digital input only - supports Schmitt trigger or low-voltage mode; fixed pull-down resistor selection. |
| Pin 2 (GPIO) | Analog Comparator 0 (+) / Digital I/O | Configurable as comparator positive input or push-pull/open-drain output; supports Vref output and 2X drive strength. |
| Pin 3 (GPIO) | Analog Comparator 0 (–) / Digital I/O | Configurable as comparator negative input or digital I/O; enables differential sensing or logic-level translation. |
| Pin 4 (PWR_SW_ON) | Power Switch Control Input | Enables/disables P-FET switch; VIH = 0.85×VIN or VDD - ensures robust turn-on across supply voltages. |
| Pin 5 (VIN) | P-FET Drain Input | High-side switch input node - accepts up to 5.5 V; leakage < 0.1 µA when off. |
| Pin 7 (VOUT) | P-FET Source Output | Switched output node - drives loads directly; includes slew rate control to limit EMI during turn-on. |
| Pin 8 (AGND) | Analog Ground | Separate ground reference for comparators and Vref - improves noise immunity in mixed-signal operation. |
| Pin 9 (GND) | Digital Ground | Digital return path - isolated from AGND per internal power rail partitioning to reduce coupling. |
| Pin 10–13 (GPIO) | Multi-function I/O | Support push-pull, open-drain NMOS/PMOS, analog I/O, external clock input (Pin 13), and OE-controlled 3-state (Pin 12). |
| Pin 14 (VDD) | Main Supply | 1.8 V / 3.3 V / 5 V compatible supply - powers logic core and macrocells; requires 0.1 µF decoupling capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| OTP NVM Configuration | One-time-programmable memory stores user-defined interconnect and macrocell settings - eliminates external configuration EEPROM and boot firmware. |
| Soft-Start P-FET Switch | Controlled ramp-up via slew rate limiting - reduces inrush current and prevents supply droop during load activation. |
| Read Back Protection | Hardware lock prevents unauthorized readout of programmed logic - secures proprietary IP in production units. |
| Programmable Delay/Filter | Configurable deglitch filter (125–500 ns) and edge-detect delay - replaces discrete RC networks and Schmitt triggers. |
| Voltage Reference Output | Stable internal bandgap reference routed to GPIO (Pin 12) - enables precision analog thresholding without external components. |
| RC Oscillator Options | 25 kHz or 2 MHz selectable frequency with dual-stage divider - provides accurate timing for counters and PWM without crystal. |
Applications
| LED Driver | Haptic Motor Driver |
|---|---|
|
Use Scenario: Driving RGB LED strings in portable medical devices requiring dimming, fault detection, and thermal derating. IC Role / Device Role / Timing Role: Configurable LUTs generate PWM signals; comparators monitor LED current sense voltage; P-FET switch enables/disables rail. Use Value: Replaces 3–5 discrete ICs (driver, comparator, MOSFET, RC filter) while reducing BOM count and board area by >40%. |
Use Scenario: Controlling linear resonant actuators (LRAs) in smartwatches with precise amplitude and duration control. IC Role / Device Role / Timing Role: Counter/DLY blocks generate burst-mode drive pulses; ACMPs detect back-EMF for closed-loop timing; GPIOs interface with driver IC. Use Value: Enables sub-millisecond timing resolution and adaptive waveform shaping - improving tactile feedback fidelity and battery life. |
| Power Sequencing | System RESET Generator |
|
Use Scenario: Managing startup order of multiple voltage rails (e.g., 1.2 V core, 3.3 V I/O, 5 V peripherals) in FPGA-based edge AI modules. IC Role / Device Role / Timing Role: LUTs implement AND/OR logic for enable dependencies; counters enforce millisecond-scale delays; P-FETs control individual rails. Use Value: Eliminates need for dedicated power sequencer ICs and external timing capacitors - simplifying design validation and layout. |
Use Scenario: Generating clean, glitch-free RESET signals synchronized to power rail stabilization in automotive infotainment head units. IC Role / Device Role / Timing Role: POR circuit detects VDD crossing 1.346 V threshold; LUTs combine with ACMPs to add voltage-margin monitoring on critical rails. Use Value: Ensures deterministic reset assertion before MCU initialization - preventing brown-out lockup and firmware corruption. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable mixed-signal logic applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SLG46120V | Includes discharge FET on PWR_SW output; adds third analog comparator and one additional 3-bit LUT. | Better suited for bidirectional power control (e.g., hot-swap, reverse-current blocking) where active discharge is required. | Select SLG46120V only if discharge functionality is needed - SLG46116V-SKT lacks discharge path and saves cost/power in unidirectional use cases. |
| SLG46533V | Higher gate count (6 LUTs, 4 ACMPs, 4 CNT/DLY), supports I²C configuration interface and enhanced power switch (1.8 A). | Targets complex system management requiring field reconfiguration, telemetry, or higher current loads like solenoids. | Choose SLG46533V for designs needing post-deployment updates or >1.25 A switching - SLG46116V-SKT offers optimal size/cost for fixed-function embedded control. |
Compared with SLG46120V and SLG46533V, the SLG46116V-SKT delivers the smallest footprint and lowest static current (0.5 µA @ 1.8 V) while retaining essential mixed-signal building blocks - making it ideal for cost-sensitive, space-constrained applications where discharge or reprogrammability are unnecessary.
Availability
SLG46116V-SKT is available at Aetrix Electronics and suitable for LED driver, haptic motor control, and power sequencing applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for SLG46116V-SKT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets.
The GreenPAK family - including SLG46116V-SKT - was designed to replace discrete logic, timing, and analog functions with field-programmable, ultra-low-power mixed-signal ICs targeting space- and cost-constrained embedded systems.
FAQ
What is the maximum continuous current rating of the integrated P-FET in SLG46116V-SKT?
The SLG46116V-SKT's integrated P-FET supports 1.25 A continuous current at VIN = 3.3 V and TA = 25 °C. At 1.5 V VIN, the rated current drops to 1.0 A due to increased RDSON. Peak current capability is 1.5 A for ≤1 ms with 1% duty cycle. Thermal derating applies above 85 °C ambient.
Can SLG46116V-SKT be reprogrammed after initial OTP programming?
No - the SLG46116V-SKT uses one-time-programmable (OTP) NVM. However, Renesas GreenPAK Designer software supports full on-chip emulation without programming NVM, allowing unlimited configuration changes while powered. Only final production units require OTP programming.
Does SLG46116V-SKT support external clock input, and which pin is used?
Yes - SLG46116V-SKT supports external clock input on Pin 13 (GPIO), configurable via register settings. This enables synchronization with system clocks or precision timing sources beyond the internal RC oscillator's ±2% accuracy.
How many analog comparators does SLG46116V-SKT include, and what hysteresis options are available?
The SLG46116V-SKT integrates two analog comparators (ACMP0 and ACMP1). Each supports selectable hysteresis of 0 mV, 25 mV, 50 mV, or 200 mV - configurable per comparator to improve noise immunity in sensor interface or overvoltage detection circuits.
What GPIO pins on SLG46116V-SKT can output the internal voltage reference?
Only Pin 12 (GPIO) can be configured to output the internal bandgap voltage reference (Vref). This is enabled via register bit settings and supports drive capability up to 13.7 µA at 5 V VDD - sufficient for biasing external comparators or ADC references.
SLG46116V-SKT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- GreenPAK™
- Packaging:
- Bag
- Product Status:
- Active
- Module/Board Type:
- Socket Module - QFN
- For Use With/Related Products:
- SLG46116
SLG46116V-SKT FAQ
1.How can I place an order for SLG46116V-SKT through Aetrix?
Please submit a Request for Quotation (RFQ) for SLG46116V-SKT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SLG46116V-SKT reliable?
The price and inventory of SLG46116V-SKT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLG46116V-SKT is usually 5 days.
3.What payment methods are accepted for SLG46116V-SKT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLG46116V-SKT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SLG46116V-SKT?
SLG46116V-SKT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SLG46116V-SKT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SLG46116V-SKT?
For technical support, including SLG46116V-SKT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLG46116V-SKT requirements.
6.How does Aetrix verify that SLG46116V-SKT is sourced from the original manufacturer or authorized distributors?
All SLG46116V-SKT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLG46116V-SKT meets industry standards.
7.What is the process for return or replacement of SLG46116V-SKT?
All SLG46116V-SKT units undergo pre-shipment inspection (PSI). If there is an issue with SLG46116V-SKT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SLG46116V-SKT part is unused and in its original packaging.
Return procedure for SLG46116V-SKT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SLG46116V-SKT Tags

-
AC102015
Microchip Technology

-
LGA SOCKET SML
Telit Cinterion
-
SI5332-32SKT-DK
Skyworks Solutions Inc.
-
SI5332-40SKT-DK
Skyworks Solutions Inc.
-
SI538X4X-64SKT-DK
Skyworks Solutions Inc.

-
PA-SOD6SM18-28
Logical Systems Inc.
-
SI538X4X-44SKT-DK
Skyworks Solutions Inc.

-
SLG47528V-SKT
Renesas Electronics Operations Services Limited

-
SLG47525V-SKT
Renesas Electronics Operations Services Limited

-
LSOCTS08EA-1
BPM Microsystems
-
ATSTK600-UC3A0X-144
Microchip Technology

-
LSOCS08EA-1
BPM Microsystems
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

