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Renesas SLG46117V

Part No.:
SLG46117V
Manufacturer:
Renesas
Category:
CPLDs (Complex Programmable Logic Devices)
Package:
14-UFQFN
Datasheet:
AetrixSLG46117V.pdf
Description:
IC CPLD 7MC 14STQFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,877

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Product details

Overview

SLG46117V from Renesas Electronics Corporation is a programmable mixed-signal matrix IC integrating logic, analog comparators, LUT-based combinatorial logic, and a soft-start P-FET power switch with integrated discharge resistor. It delivers 1.25 A peak switching capability at 3.3 V, features 14-pin STQFN packaging, operates from 1.5–5.5 V input, and supports power sequencing, LED/haptic drive, and system RESET functions.

For engineers reviewing the SLG46117V datasheet, SLG46117V pinout, SLG46117V application, or SLG46117V equivalent, this page provides verified electrical specs, macrocell configuration details, power switch timing characteristics (TTotal_On, TRise, TDelay_Off), RDSON values across VIN, and confirmed I/O flexibility including Schmitt-triggered inputs, programmable pull resistors, and 3-state output on Pin 12.

Technical Context

The SLG46117V implements a user-programmable interconnect matrix routing signals between seven multi-function GPIOs, two analog comparators (ACMP0/ACMP1), four LUTs (two 2-bit, two 3-bit), seven combination function macrocells (including DFF/latch/LUT selectable modes), three 8-bit counter/delay generators, and a trimmed RC oscillator with 25 kHz/2 MHz options. All logic is configured via one-time-programmable NVM.

Its integrated P-FET power switch (Pin 5/VIN → Pin 7/VOUT) features slew-rate control, soft-start, and an internal discharge resistor (RDIS = 65–400 Ω). The switch is controlled by Pin 4 (PWR_SW_ON), which accepts logic-level enable with VIH ≥ 0.85×VIN and VIL ≤ 0.3 V, and exhibits turn-on delay (TOn_Delay) from 12–76 μs depending on VIN and load.

Key Specifications

ParameterValue and Actual Design Meaning
VIN Range1.5 V to 5.5 V - supports direct connection to common rail voltages without external level-shifting.
Power Switch IDS Peak1.25 A @ 3.3 V - enables driving medium-power loads like LEDs or haptic motors without external FET.
RDSON @ 3.3 V36.4 mΩ (typ) - ensures <120 mW conduction loss at 1 A, reducing thermal stress in compact layouts.
Startup Time0.27 ms - fast initialization for responsive power sequencing in battery-powered systems.
GPIO Count7 programmable I/O pins - includes dual analog comparator inputs (Pins 2 & 3), 3-state capable Pin 12, and configurable pull-up/down (10 kΩ/100 kΩ/1 MΩ).
LUT Resources4 total LUTs (2×2-bit, 2×3-bit) + 7 macrocells with DFF/latch/pipe delay/CNT/DLY options - sufficient for implementing state machines, debounce, timing control, and analog-digital hybrid logic.
Operating Temp−40 °C to +85 °C - qualified for industrial and consumer end equipment with ambient thermal cycling.

Pinout & Package

SLG46117V uses a 14-pin STQFN package (1.6 × 2.5 × 0.55 mm), Pb-free/RoHS-compliant, with exposed thermal pad. Pin 6 is NC; Pins 8 (AGND) and 9 (GND) are separate ground connections for analog/digital separation.

Pin/TerminalCircuit RoleDesign Meaning
1 GPIGeneral Purpose Input onlyDedicated digital input with fixed pull-down; no output capability - used for hardwired control or status sensing.
2 GPIOI/O or ACMP0(+) inputConfigurable as digital I/O or positive input to Analog Comparator 0 - enables voltage monitoring with hysteresis (0/25/50/200 mV).
3 GPIOI/O or ACMP0(−) inputConfigurable as digital I/O or negative input to Analog Comparator 0 - supports differential or single-ended analog sensing.
4 PWR_SW_ONPower switch enable inputLogic-level control pin with VIH ≥ 0.85×VIN; initiates soft-start ramp on VOUT with 12–76 μs delay depending on VIN.
5 VINP-FET switch inputHigh-side power rail input (1.5–5.5 V); connects directly to source of internal P-FET - no external components required.
7 VOUTP-FET switch outputSwitched output node; features integrated discharge path (RDIS = 65–400 Ω) for rapid turn-off and safe load discharging.
11 GPIOI/O or POR outputCan drive POR signal externally or serve as general-purpose I/O - useful for synchronizing downstream reset sequences.
12 GPIOI/O with OE and Vref outputSupports 3-state output via OE control; also drives internal bandgap Vref (1.2 V) to external circuitry for precision analog reference.
13 GPIOI/O or external clock inputAccepts external clock up to 25 MHz - allows precise timing control beyond internal RC oscillator limits.
14 VDDMain supply (1.8–5 V)Core logic supply; decoupling requires 0.1 μF capacitor; current limit per side is 73 mA at TJ = 85 °C.

Key Features

FeatureDesign Value
Soft-start P-FET power switchEnables controlled VOUT ramp (TRISE = 92–296 μs) to prevent inrush current and EMI spikes during power-up.
Integrated discharge resistorRDIS = 65–400 Ω ensures rapid VOUT collapse (<7 μs off-delay) and eliminates need for external bleeder circuitry.
Programmable delay/deglitch filterConfigurable 125–500 ns filtering (at 3.3 V) suppresses noise-induced glitches on critical control lines like PWR_SW_ON.
Read-back protection (Read Lock)Prevents unauthorized readout of programmed NVM configuration - essential for IP protection in production firmware.
Trimmed RC oscillator25 kHz or 2 MHz selectable frequency with ±5 % accuracy - eliminates external crystal/capacitor for timing-critical but non-precision applications.
Two analog comparatorsACMP0/ACMP1 with user-selectable hysteresis (0/25/50/200 mV) and shared Vref - enables robust threshold detection for battery monitoring or fault signaling.

Applications

Power Sequencing ControlLED/Haptic Load Driver

Use Scenario: Coordinating startup order of multiple voltage rails (e.g., 3.3 V before 1.2 V) in portable electronics with tight space constraints.

IC Role / Device Role / Timing Role: SLG46117V acts as a programmable sequencer using its LUTs and counters to generate timed enable signals, while its P-FET switch controls the 3.3 V rail directly.

Use Value: Reduces BOM count by replacing discrete logic + MOSFET + RC timing networks; achieves sub-100 μs timing resolution via internal counters.

Use Scenario: Driving RGB LEDs or eccentric rotating mass (ERM) haptic motors requiring PWM dimming and soft-start to avoid audible click/noise.

IC Role / Device Role / Timing Role: SLG46117V generates PWM via LUT+counter, applies soft-start to VOUT, and uses GPIOs to manage enable/feedback paths.

Use Value: Eliminates external gate driver and RC soft-start network; leverages low RDSON (36.4 mΩ @ 3.3 V) for >95 % efficiency at 500 mA load.

System-Level RESET GeneratorAnalog Threshold Monitor

Use Scenario: Generating a clean, debounced, and voltage-monitored RESET signal for microcontrollers after power stabilization.

IC Role / Device Role / Timing Role: SLG46117V monitors VDD with POR, conditions external reset inputs via deglitch filter, and asserts RESET via GPIO with programmable hold time.

Use Value: Replaces RC+Schmitt trigger + manual reset switch circuit; integrates power-good detection and glitch immunity in one chip.

Use Scenario: Monitoring battery voltage or sensor output to trigger alerts when crossing thresholds (e.g., low-battery warning at 3.0 V).

IC Role / Device Role / Timing Role: SLG46117V uses ACMP0 with internal Vref (1.2 V) and resistor divider to compare analog input; outputs result to GPIO or LUT logic.

Use Value: No external op-amp or reference IC needed; hysteresis prevents chatter near trip point; consumes only 0.5–1.0 μA quiescent current.

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable mixed-signal applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
SLG46120VSame STQFN-14 package; adds third analog comparator and higher-current 2 A P-FET switch (RDSON = 22 mΩ @ 5.5 V).Better suited for dual-rail monitoring or higher-power loads; not drop-in due to different macrocell allocation and NVM layout.Select SLG46120V only if additional comparator or >1.25 A switch current is required - revalidation of logic configuration and timing is necessary.
SLG46121VSame feature set as SLG46117V but with enhanced ESD rating (4 kV HBM vs. 2 kV) and extended temperature range (−40 °C to +105 °C).Required for automotive cabin modules or industrial controllers operating above 85 °C ambient.Choose SLG46121V for high-reliability environments where extended temp or ESD robustness is mandatory - pinout and programming are identical.

Compared with SLG46117V, SLG46120V offers higher power-switch capability and extra analog resources at the cost of design revalidation, while SLG46121V provides identical functionality with improved ruggedness for harsher thermal/ESD conditions - both retain the same 14-pin STQFN footprint and GPIO count.

Availability

SLG46117V is available at Aetrix Electronics and suitable for power sequencing, LED/haptic drive, and system RESET applications requiring stable component supply, RoHS compliance, and compact 1.6 × 2.5 mm packaging.

Supply support for SLG46117V includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation is a global semiconductor leader delivering trusted embedded solutions for automotive, industrial, infrastructure, and IoT markets.

The GreenPAK family, including SLG46117V, was designed to replace discrete logic, analog, and power components with a single programmable mixed-signal IC - targeting space-constrained, cost-sensitive, and rapidly prototyped applications.

FAQ

What is the maximum continuous current the SLG46117V power switch can deliver?

The SLG46117V power switch supports 1.0 A continuous current at VIN = 1.5 V and up to 1.25 A peak (for ≤1 ms, 1 % duty cycle) at VIN = 3.3 V. Its RDSON ranges from 28.5 mΩ @ 5.5 V to 77.6 mΩ @ 1.5 V, defining thermal limits under sustained load. Derating is required above 85 °C ambient per IVDD/IGND ratings.

Does the SLG46117V require external components to operate its P-FET power switch?

No, the SLG46117V integrates all necessary elements for its P-FET power switch: soft-start control, slew-rate limiting, and a discharge resistor (RDIS = 65–400 Ω). Only a 0.1 μF decoupling capacitor on VDD and appropriate load capacitance on VOUT are required per the datasheet - no external gate drivers, RC networks, or bleeder resistors are needed.

How many analog comparators does the SLG46117V include, and what hysteresis options are available?

The SLG46117V includes two analog comparators (ACMP0 and ACMP1), each supporting selectable hysteresis of 0 mV, 25 mV, 50 mV, or 200 mV. These comparators share the internal 1.2 V bandgap reference and accept inputs up to VDD on the positive side and up to 1.2 V on the negative side - enabling flexible threshold detection for battery monitoring or fault signaling in SLG46117V designs.

Can the SLG46117V be reprogrammed after initial configuration?

The SLG46117V uses one-time-programmable (OTP) NVM for final configuration. However, Renesas GreenPAK Designer software supports on-chip emulation: logic configurations can be loaded dynamically while powered, allowing full functional validation without committing to OTP. Once verified, the design is written to NVM - after that, SLG46117V retains the configuration permanently and cannot be reprogrammed.

What GPIO pins on the SLG46117V support 3-state output, and how is it enabled?

Only Pin 12 of the SLG46117V supports true 3-state output, enabled via its dedicated Output Enable (OE) control bit in the configuration register. When OE = 0, Pin 12 enters high-impedance mode; when OE = 1, it drives push-pull logic levels. This capability allows SLG46117V to share buses or interface with bidirectional signals without external transceivers.

SLG46117V Specifications

Product attributes
Attribute value
Manufacturer:
Renesas
Series:
-
Package/Case:
14-UFQFN
Packaging:
Tape & Reel (TR)
Product Status:
Active
Programmable:
Not Verified
Programmable Type:
OTP
Delay Time tpd(1) Max:
-
Voltage Supply - Internal:
1.71V ~ 1.89V, 3V ~ 3.6V, 4.5V ~ 5.5V
Number of Logic Elements/Blocks:
-
Number of Macrocells:
7
Number of Gates:
-
Number of I/O:
6
Operating Temperature:
-40°C ~ 85°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
14-STQFN (1.6x2.5)

SLG46117V FAQ

1.How can I place an order for SLG46117V through Aetrix?

Please submit a Request for Quotation (RFQ) for SLG46117V on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SLG46117V reliable?

The price and inventory of SLG46117V are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLG46117V is usually 5 days.

3.What payment methods are accepted for SLG46117V?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLG46117V transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SLG46117V?

SLG46117V orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SLG46117V order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SLG46117V?

For technical support, including SLG46117V datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLG46117V requirements.

6.How does Aetrix verify that SLG46117V is sourced from the original manufacturer or authorized distributors?

All SLG46117V products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLG46117V meets industry standards.

7.What is the process for return or replacement of SLG46117V?

All SLG46117V units undergo pre-shipment inspection (PSI). If there is an issue with SLG46117V, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SLG46117V part is unused and in its original packaging.

Return procedure for SLG46117V:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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