Renesas SLG46117V-SKT
- Part No.:
- SLG46117V-SKT
- Manufacturer:
- Renesas
- Category:
- Programming Adapters, Sockets
- Package:
- Datasheet:
-
SLG46117V-SKT.pdf
- Description:
- SLG4SA14-16X25 SOCKET ADAPTER
- Quantity:
- Payment:

- Shipping:

Inventory:2,471
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Product details
Overview
SLG46117V-SKT from Renesas Electronics is a programmable mixed-signal matrix IC integrating logic, analog comparators, LUT-based combinatorial logic, three 8-bit counter/delay generators, and a soft-start P-FET power switch with integrated discharge resistor. It delivers 1.25 A peak switching capability at 3.3 V VIN, 28.5 mΩ RDS(ON) at 5.5 V, and operates across 1.5–5.5 V input voltage range for power plane control in compact embedded systems.
For engineers reviewing the SLG46117V-SKT datasheet, SLG46117V-SKT pinout, SLG46117V-SKT application, or SLG46117V-SKT equivalent, this device supports rapid prototyping of power sequencing, LED/haptic drivers, and system RESET with configurable timing, slew rate control, and on-chip analog signal conditioning - all within a 1.6 × 2.5 mm STQFN-14 package.
Technical Context
The SLG46117V-SKT implements a user-programmable interconnect matrix routing signals between seven multi-function I/O pins, two analog comparators (with selectable hysteresis), four LUTs (two 2-bit, two 3-bit), and seven combination macrocells - each configurable as DFF/latch, pipe delay, or CNT/DLY. Its RC oscillator offers 25 kHz or 2 MHz operation with dual-stage division.
Power switching is managed by a dedicated P-FET with programmable soft-start ramp control, TON_DELAY down to 12.0 µs (VIN = 5.0 V), total turn-on time of 114 µs, and integrated 65–400 Ω discharge resistance. All logic and analog functions are configured via one-time-programmable NVM.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 1.5 V to 5.5 V - supports direct connection to common rail voltages including 1.8 V, 3.3 V, and 5 V systems without level-shifting. |
| P-FET IDS Peak | 1.25 A @ VIN = 3.3 V - enables driving moderate-power loads like LEDs, haptic motors, or auxiliary rails. |
| RDS(ON) | 28.5 mΩ @ 5.5 V - ensures low conduction loss and minimal self-heating during sustained 1 A operation. |
| TTOTAL_ON | 114 µs @ VIN = 5.0 V - provides precise, repeatable power-up timing for sequencing-critical subsystems. |
| Macrocell Count | 7 combination function macrocells + 4 LUTs + 3 CNT/DLY - sufficient to implement complex state machines, debounce filters, and multi-stage delays without external logic. |
| Package | 14-pin STQFN (1.6 × 2.5 × 0.55 mm) - ultra-compact footprint ideal for space-constrained portable and wearable designs. |
| Operating Temp | −40 °C to +85 °C - qualified for industrial and consumer-grade embedded applications with no derating required. |
Pinout & Package
SLG46117V-SKT uses a 14-pin STQFN package (1.6 × 2.5 × 0.55 mm, Pb-free/RoHS-compliant) with exposed thermal pad. Pin 1 is GPI-only; Pins 2–4, 10–13 are GPIO with configurable I/O modes; Pin 5 is VIN (P-FET input); Pin 7 is VOUT (P-FET output); Pins 8 and 9 are AGND/GND; Pin 14 is VDD; Pin 6 is NC.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 (GPI) | General Purpose Input only | Dedicated digital input with Schmitt trigger or low-voltage mode - used for wake-up, enable, or status sensing without output contention. |
| Pin 4 (PWR_SW_ON) | Power switch control input/output | Configurable as logic-level gate driver input or open-drain output - initiates soft-start sequence when asserted high relative to VIN or VDD. |
| Pin 5 (VIN) | P-FET source input | High-side switch input rail - accepts 1.5–5.5 V supply; connects directly to battery or DC/DC output. |
| Pin 7 (VOUT) | P-FET drain output | Switched output node - drives load with controlled rise time and integrated discharge path to GND when off. |
| Pin 12 (GPIO) | Configurable I/O with OE support | Supports 3-state output via external enable logic - enables bus sharing or isolated signal routing in multi-rail systems. |
Key Features
| Feature | Design Value |
|---|---|
| Soft-start P-FET power switch | Programmable slew rate control and 114–399 µs total turn-on time prevents inrush current in sensitive loads. |
| Integrated discharge resistor | 65–400 Ω RDIS ensures fast, reliable VOUT discharge after shutdown - eliminates need for external bleeder circuitry. |
| OTP NVM configuration | One-time-programmable memory retains user logic design permanently - enables secure, tamper-resistant firmware deployment. |
| Two analog comparators | Configurable hysteresis (0/25/50/200 mV) and shared VREF - supports precision threshold detection for battery monitoring or fault signaling. |
| Programmable RC oscillator | 25 kHz or 2 MHz with dual-stage divider - provides accurate, low-power clocking for timers and state machines without external crystal. |
Applications
| Power Sequencing Control | LED Driver |
|---|---|
Use Scenario: Coordinating startup order of multiple voltage rails (e.g., core, I/O, analog) in FPGA or SoC-based systems. IC Role / Device Role / Timing Role: Configurable logic engine and P-FET switch provide deterministic, slew-controlled power-up timing with inter-rail dependencies. Use Value: Eliminates discrete RC timers and MOSFET drivers; reduces BOM count by up to 7 components per rail while improving repeatability. | Use Scenario: Driving RGB or white LEDs in portable devices requiring brightness modulation and overcurrent protection. IC Role / Device Role / Timing Role: P-FET switch handles current delivery; LUTs and counters generate PWM waveforms; comparators monitor LED current via sense resistor. Use Value: Enables closed-loop dimming and fault response in <1 mm² area - no external PWM generator or op-amp needed. |
| Haptic Motor Driver | System RESET with Power Switch |
Use Scenario: Driving ERM/LRA vibration motors in wearables where mechanical response time and power efficiency are critical. IC Role / Device Role / Timing Role: Soft-start P-FET delivers controlled voltage ramp to motor; programmable delays shape activation profile and prevent audible click. Use Value: Achieves smooth actuation onset with <120 µs timing resolution - replaces discrete MOSFET + RC + logic IC solution. | Use Scenario: Generating clean, sequenced RESET pulses for microcontrollers or PMICs during brown-out or manual reset events. IC Role / Device Role / Timing Role: Combines POR detection, P-FET switch, and programmable delay macrocells to assert RESET only after stable VDD and defined hold time. Use Value: Guarantees robust reset assertion across temperature and supply variation - removes risk of premature release seen with RC-based solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable mixed-signal power control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SLG46120V | Same STQFN-14 package; adds third analog comparator and higher drive strength (1.5 A peak), but no integrated discharge resistor. | Preferred for dual-threshold monitoring (e.g., under/over-voltage lockout), but requires external discharge path for fast VOUT decay. | Select when additional analog sensing capability outweighs need for integrated discharge; verify layout accommodates external 100 Ω resistor. |
| SLG46533V | Higher integration: includes 4x ACMP, 2x DAC, and 2x ADC channels; larger 20-pin STQFN package; no integrated P-FET switch. | Suitable for sensor signal conditioning and closed-loop control, but requires external high-side switch for power delivery. | Choose when analog measurement and feedback dominate over power switching - not a drop-in replacement for SLG46117V-SKT's integrated FET functionality. |
Compared with SLG46120V and SLG46533V, the SLG46117V-SKT uniquely balances compact size, integrated soft-start P-FET with discharge, and sufficient logic resources for sequencing - making it optimal for cost- and space-sensitive power control where full analog front-end capability is unnecessary.
Availability
SLG46117V-SKT is available at Aetrix Electronics and suitable for power sequencing, LED/haptic driver, and system RESET applications requiring stable component supply, consistent parametric performance across voltage/temperature, and long-term production continuity.
Supply support for SLG46117V-SKT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering microcontrollers, analog, power, and connectivity solutions for automotive, industrial, infrastructure, and IoT markets.
The GreenPAK family, including SLG46117V-SKT, was designed to replace discrete logic, timing, and analog components with field-configurable, ultra-low-power mixed-signal ICs targeting space-constrained embedded power management and interface functions.
FAQ
What is the maximum continuous current rating for the P-FET in SLG46117V-SKT?
The SLG46117V-SKT P-FET is rated for 1.0 A continuous current at VIN = 1.5 V (per datasheet Section 5.0, Power Switch Electrical Characteristics). At higher VIN (e.g., 3.3 V or 5.5 V), thermal limits and RDS(ON) allow brief peak currents up to 1.25 A, but sustained operation above 1.0 A requires careful PCB thermal design and ambient derating.
Can SLG46117V-SKT be reprogrammed after initial OTP programming?
No - the SLG46117V-SKT uses one-time-programmable (OTP) NVM for final configuration. However, Renesas GreenPAK Designer software supports on-chip emulation: logic can be loaded into volatile RAM for functional verification without burning OTP, enabling unlimited design iterations before final programming.
Does SLG46117V-SKT support I²C or SPI communication interfaces?
No - SLG46117V-SKT does not include dedicated serial communication peripherals. Its I/O pins are configurable as general-purpose digital inputs/outputs or analog comparator terminals, but lack hardware UART, I²C, or SPI controllers. Communication with host processors must be implemented via GPIO bit-banging or external bridge ICs.
What is the purpose of the NC pin (Pin 6) on SLG46117V-SKT?
Pin 6 is designated "No Connect" (NC) in the SLG46117V-SKT datasheet and must remain unconnected in PCB layout. It is an unused bond pad with no internal connection - leaving it floating avoids unintended coupling or ESD paths, and solder mask should fully cover the pad to prevent accidental shorts.
How is the discharge resistor in SLG46117V-SKT activated during power-off?
The discharge resistor (RDIS = 65–400 Ω) in SLG46117V-SKT is automatically enabled when the P-FET is turned off - no external control signal or configuration is required. It connects VOUT to GND internally, ensuring rapid decay of output voltage (<100 µs typical for 1 µF load) to prevent floating-rail conditions or unintended downstream device behavior.
SLG46117V-SKT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- GreenPAK™
- Packaging:
- Bag
- Product Status:
- Active
- Module/Board Type:
- Socket Module - QFN
- For Use With/Related Products:
- SLG46117
SLG46117V-SKT FAQ
1.How can I place an order for SLG46117V-SKT through Aetrix?
Please submit a Request for Quotation (RFQ) for SLG46117V-SKT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SLG46117V-SKT reliable?
The price and inventory of SLG46117V-SKT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLG46117V-SKT is usually 5 days.
3.What payment methods are accepted for SLG46117V-SKT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLG46117V-SKT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SLG46117V-SKT?
SLG46117V-SKT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SLG46117V-SKT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SLG46117V-SKT?
For technical support, including SLG46117V-SKT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLG46117V-SKT requirements.
6.How does Aetrix verify that SLG46117V-SKT is sourced from the original manufacturer or authorized distributors?
All SLG46117V-SKT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLG46117V-SKT meets industry standards.
7.What is the process for return or replacement of SLG46117V-SKT?
All SLG46117V-SKT units undergo pre-shipment inspection (PSI). If there is an issue with SLG46117V-SKT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SLG46117V-SKT part is unused and in its original packaging.
Return procedure for SLG46117V-SKT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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