Renesas SLG46120P

Overview

SLG46120P from Renesas Electronics is a one-time-programmable (OTP) GreenPAK programmable mixed-signal array integrating two analog comparators, five LUTs (one 2-bit + four 3-bit), twelve combination function macrocells, dual counter/delay generators (8-bit and 14-bit), RC oscillator (25 kHz / 2 MHz), bandgap reference, and POR. It operates from 1.8 V to 5 V across –40 °C to +85 °C and targets low-power system-level glue logic replacement in PC peripherals and handheld electronics.

For engineers reviewing the SLG46120P datasheet, SLG46120P pinout, SLG46120P application, or SLG46120P equivalent, key selection criteria include its 12-pin STQFN-12 (2 × 2 mm, 0.5 mm pitch) package, OTP NVM configuration, dual-voltage comparator support with selectable hysteresis/gain, programmable deglitch filter, and 3-state output capability on Pins 6 and 10.

Technical Context

The SLG46120P implements a user-configurable digital interconnect matrix routing signals between 10 multi-function I/O pins and internal macrocells. Its analog subsystem includes two ACMPs with independent hysteresis (0/25/50/200 mV) and gain (1×/0.5×/0.33×/0.25×) settings, plus a programmable Vref output on Pin 10.

Digital timing is supported by an integrated RC oscillator with dual-stage division (pre-divider ×1/2/4/8; output divider ×1/2/3/4/8/12/24/64), enabling precise clock generation without external components. All macrocell delays-including LUT propagation (e.g., 3-bit LUT: 6.5–24.4 ns), CNT/DLY (11.8–44.2 ns), and filter (50.7–193 ns)-are voltage- and temperature-dependent per published typicals at 1.8 V/3.3 V/5 V.

Key Specifications

Pinout & Package

SLG46120P uses a 12-pin STQFN package measuring 2 mm × 2 mm × 0.55 mm with 0.5 mm pitch. The package is RoHS-compliant and halogen-free.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable mixed-signal applications.

Compared with SLG46120V, SLG46120P provides identical functionality in a larger, more assembly-friendly package; compared with SLG46533V, it trades reprogrammability and expanded analog resources for lower unit cost and smaller die size-making SLG46120P ideal for high-volume, finalized designs with strict BOM and footprint constraints.

Availability

SLG46120P is available at Aetrix Electronics and suitable for USB-C PD interfaces, smartphone wake logic, PC fan control, and industrial sensor conditioning requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for SLG46120P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation is a global semiconductor leader delivering microcontrollers, analog power, and SoC solutions for automotive, industrial, and enterprise applications.

The GreenPAK family-including SLG46120P-is designed for rapid implementation of custom mixed-signal logic in space- and power-constrained systems, targeting cost reduction and design cycle acceleration versus discrete alternatives.

FAQ

What is the programming method for SLG46120P?

The SLG46120P uses one-time-programmable (OTP) non-volatile memory to store its configuration. Users develop logic in GreenPAK Designer software, verify behavior via on-chip emulation (power-dependent), then program the NVM using a GreenPAK programmer. Once programmed, the SLG46120P retains its configuration permanently without external storage or boot code.

Does SLG46120P support external clock sources?

Yes, SLG46120P supports external clock inputs via Pin 12, which can be configured as an EXTCLK terminal. This allows synchronization with system clocks or precision oscillators, enabling accurate timing in applications such as PWM generation, event counting, or deterministic delay chains beyond the internal RC oscillator's accuracy.

Can SLG46120P generate a stable voltage reference for external circuits?

Yes, SLG46120P includes an internal bandgap voltage reference that can be routed to Pin 10 as a buffered Vref output. This reference is stable across temperature and supply voltage, and supports external loading up to 100 µA-sufficient for biasing comparators, ADC references, or sensor excitation in low-power systems.

How many analog comparators does SLG46120P integrate, and what are their key specifications?

SLG46120P integrates two independent analog comparators (ACMP0 and ACMP1). Each supports selectable hysteresis (0/25/50/200 mV) and gain (1×/0.5×/0.33×/0.25×), with input voltage ranges up to VDD on the positive side and up to 1.2 V on the negative side. ACMP0 accepts inputs on Pins 3 and 4; ACMP1 uses Pin 6 as its positive input with OE control.

What are the output drive capabilities of SLG46120P GPIOs?

SLG46120P GPIOs support push-pull (1X/2X strength), open-drain NMOS, and open-drain PMOS outputs. At 3.3 V, push-pull 2X delivers up to 2.66 mA sink and 2.68 mA source; open-drain NMOS 2X sinks up to 22.9 mA. Drive strength and mode are configured per-pin via register settings, enabling flexible interfacing with LEDs, MOSFET gates, or logic families.