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Renesas SLG46535V
- Part No.:
- SLG46535V
- Manufacturer:
- Renesas
- Package:
- 14-UFQFN
- Datasheet:
-
SLG46535V.pdf
- Description:
- IC CPLD 19MC 14STQFN
- Quantity:
- Payment:
- Shipping:
Inventory:1,445
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Product details
Overview
SLG46535V from Renesas Electronics is a programmable mixed-signal matrix IC with dual supply (VDD/VDD2), asynchronous state machine (8-state), three analog comparators, nineteen macrocells (including LUTs, DFFs, counters, delays), and I²C interface. It operates from 1.8 V to 5 V on both supplies (VDD2 ≤ VDD) and supports level translation between independent voltage domains in portable electronics power management.
For engineers reviewing the SLG46535V datasheet, SLG46535V pinout, SLG46535V application, or SLG46535V equivalent, this device enables rapid prototyping of custom logic, voltage-domain bridging, analog threshold detection, and low-power system control without FPGA complexity or MCU firmware overhead.
Technical Context
The SLG46535V implements a reconfigurable interconnect matrix with OTP-programmable macrocells, supporting combinational logic (LUTs), sequential logic (DFFs/latches), analog functions (ACMP0–ACMP2), and timing primitives (CNT/DLY0–CNT/DLY6, pipe delay). Its dual-supply architecture isolates I/O banks: pins 2–8 reference VDD; pins 10,12–14 reference VDD2.
I²C serial communication (up to 400 kHz) enables configuration and RAM read/write access. The embedded 8-state ASM provides deterministic state transitions driven by configurable input logic, while the 25 MHz RC oscillator and optional crystal oscillator support precise timing generation and clock domain synchronization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDD Range | 1.8 V (±5 %) to 5 V (±10 %); powers core logic and VDD-referenced I/O (pins 2–8) |
| VDD2 Range | 1.8 V (±5 %) to 5 V (±10 %), VDD2 ≤ VDD; powers VDD2-referenced I/O (pins 10,12–14) for dual-domain interfacing |
| Operating Temp | −40 °C to +85 °C; validated for industrial and consumer-grade embedded systems |
| I²C Speed | Up to 400 kHz; enables fast configuration and 8-byte RAM read/write over standard SMBus-compatible interface |
| Macrocell Count | 19 programmable combination function macrocells including LUTs (2-/3-/4-bit), DFFs, counters, delays, and filters |
| Analog Comparators | 3 ACMPs (ACMP0–ACMP2); support voltage monitoring, window detection, and hysteresis-based signal conditioning |
| ASM States | 8-state asynchronous state machine; enables finite-state logic for sequenced control without CPU intervention |
Pinout & Package
14-pin STQFN package: 2.0 mm × 2.2 mm × 0.55 mm, 0.4 mm pitch, RoHS-compliant/halogen-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VDD) | Primary power supply | Supplies core logic and I/O bank (pins 2–8); must be ≥ VDD2 |
| 2 (GPI) | General-purpose input | Dedicated input-only pin; no output drive capability; referenced to VDD |
| 3 (GPIO) | General-purpose I/O | VDD-referenced bidirectional pin with configurable drive strength and Schmitt trigger |
| 4 (GPIO) | GPIO or ACMP0(+) input | Configurable as digital I/O or positive input to analog comparator 0 |
| 5 (GPIO) | GPIO or ACMP0(−) input | Configurable as digital I/O or negative input to analog comparator 0; supports OE control |
| 6 (SCL/GPIO) | I²C clock or GPIO | NMOS open-drain only; functions as SCL when I²C enabled; otherwise general-purpose input/output |
| 7 (SDA/GPIO) | I²C data or GPIO | NMOS open-drain only; functions as SDA when I²C enabled; otherwise general-purpose input/output |
| 8 (GPIO) | GPIO or ACMP1(+) input | Configurable as digital I/O or positive input to analog comparator 1; supports OE control |
| 9 (GND) | Ground reference | Common return path for both VDD and VDD2 supplies |
| 10 (GPIO) | GPIO or ACMP1(−) input | VDD2-referenced I/O; configurable as digital I/O or negative input to analog comparator 1 |
| 11 (VDD2) | Secondary power supply | Supplies VDD2-referenced I/O bank (pins 10,12–14); enables level translation between domains |
| 12 (GPIO) | GPIO with OE control | VDD2-referenced bidirectional pin; output enable controlled by internal logic |
| 13 (GPIO) | General-purpose I/O | VDD2-referenced bidirectional pin with configurable drive strength and Schmitt trigger |
| 14 (GPIO) | GPIO or external clock input | VDD2-referenced; configurable as digital I/O or external clock source for internal timing blocks |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent supply domains (VDD/VDD2) | Enables seamless level translation and isolation between 1.8 V/3.3 V/5 V subsystems without external translators |
| OTP-programmable macrocells (19 total) | Allows hardware-level customization of logic, timing, and analog functions without firmware or mask changes |
| Three analog comparators with hysteresis | Supports battery voltage monitoring, overvoltage/undervoltage detection, and sensor thresholding with noise immunity |
| Asynchronous 8-state state machine | Provides deterministic, low-latency sequencing for power-up sequences, fault recovery, or mode switching |
| I²C interface with 8-byte RAM | Permits runtime configuration updates and status register reads/writes without reprogramming OTP memory |
| Read-back protection (Read Lock) | Prevents unauthorized extraction of programmed logic configuration, securing proprietary IP in production units |
Applications
| USB-C Power Delivery Controller Auxiliary Logic | Smartphone Battery Management Sequencing |
|---|---|
|
Use Scenario: Managing handshake timing, VBUS discharge control, and fault flag aggregation in USB-C PD implementations. IC Role / Device Role / Timing Role: Configurable logic engine coordinating PD controller signals, ACMP-based VBUS sensing, and state-driven discharge sequencing. Use Value: Replaces discrete logic + comparators + timers; reduces BOM count and PCB area while enabling field-upgradable behavior via I²C. |
Use Scenario: Enforcing safe charge/discharge sequences, thermal foldback, and fuel-gauge interface arbitration in smartphone PMIC subsystems. IC Role / Device Role / Timing Role: Asynchronous state machine executing battery safety protocols, with ACMPs monitoring cell voltage/temperature thresholds. Use Value: Eliminates need for microcontroller polling loops; delivers deterministic response to critical events with sub-microsecond latency. |
| Industrial Sensor Node Signal Conditioning | PC Peripherals Power Sequencing |
|
Use Scenario: Converting analog sensor outputs (e.g., thermistor, pressure transducer) into clean digital alerts and PWM outputs for local actuation. IC Role / Device Role / Timing Role: Analog comparator front-end with hysteresis filtering, followed by LUT-based debounce and programmable delay for stable edge generation. Use Value: Integrates signal conditioning, timing, and logic in one 2.2 mm × 2.0 mm package-no external op-amps, RC networks, or timers required. |
Use Scenario: Controlling power-rail enable sequencing, reset assertion timing, and fault latching across multi-rail motherboard peripherals (e.g., NVMe add-in cards). IC Role / Device Role / Timing Role: Dual-supply I/O bridges 3.3 V control logic to 12 V/5 V power FET gates; macrocells implement precise delay chains and OR'ed fault propagation. Use Value: Guarantees strict power-up/down ordering per PCIe/CXL specs while supporting dynamic reconfiguration via I²C during system debug. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable mixed-signal logic applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SLG46537V | Same 14-pin STQFN package but includes additional 25 kHz/2 MHz oscillator option and enhanced I²C address flexibility; identical macrocell count and dual-supply architecture. | Preferred where low-frequency clock generation (e.g., RTC backup, slow polling) is required alongside high-speed logic. | Select SLG46537V if oscillator flexibility beyond 25 MHz RC/crystal is needed; SLG46535V suffices for pure logic/timing/level-shift use cases. |
| SLG46620V | 20-pin STQFN (3 × 3 mm); adds fourth analog comparator, more LUTs (24 vs. 19), larger RAM (16 bytes), and higher drive strength (4× NMOS OD on select pins). | Better suited for complex sensor fusion, multi-channel power sequencing, or designs requiring >3 ACMP inputs. | Choose SLG46535V for space-constrained, cost-sensitive dual-domain logic; upgrade to SLG46620V only when expanded analog/digital resources are confirmed necessary. |
Compared with SLG46537V and SLG46620V, the SLG46535V delivers optimal balance of dual-supply I/O flexibility, analog integration, and minimal footprint-ideal for compact, single-chip level translation and state-machine control without over-specifying resources.
Availability
SLG46535V is available at Aetrix Electronics and suitable for USB-C PD controllers, smartphone battery management systems, industrial sensor nodes, and PC peripheral power sequencing requiring stable component supply and long-term lifecycle support.
Supply support for SLG46535V includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering microcontrollers, analog, power, and SoC solutions for automotive, industrial, and enterprise applications.
The GreenPAK family-including SLG46535V-is designed for rapid implementation of custom mixed-signal logic in space-constrained, low-power embedded systems without firmware development.
FAQ
What is the primary function of the SLG46535V in a system design?
The SLG46535V serves as a field-configurable mixed-signal logic device that replaces discrete gates, comparators, timers, and level shifters. Its OTP-programmable macrocells, dual-supply I/O, and integrated ACMPs allow engineers to implement custom voltage-domain bridging, analog threshold detection, and state-driven control directly in hardware-reducing component count and eliminating MCU firmware overhead for deterministic real-time tasks.
Does the SLG46535V support true bidirectional level translation between VDD and VDD2 domains?
Yes-the SLG46535V enables true bidirectional level translation because its GPIO pins are partitioned by supply: pins 2–8 are VDD-referenced, pins 10,12–14 are VDD2-referenced, and internal logic can dynamically control direction and drive strength. This allows high-to-low and low-to-high translation without external components, provided VDD2 ≤ VDD and both supplies are within 1.8 V–5 V range.
Can the SLG46535V be reprogrammed after initial OTP programming?
No-the SLG46535V uses one-time-programmable (OTP) NVM for final configuration. However, Renesas GreenPAK Designer software supports full on-chip emulation: logic configurations can be loaded and tested repeatedly while powered, without altering OTP. Only when the design is finalized is the OTP written-ensuring design security and preventing accidental overwrite.
How many analog comparators does the SLG46535V include, and what are their key electrical limits?
The SLG46535V integrates three analog comparators (ACMP0–ACMP2). Each supports input voltage ranges up to VDD on the positive input and up to 1.2 V on the negative input. Input hysteresis is configurable via internal settings, and all ACMPs operate across the full −40 °C to +85 °C temperature range with guaranteed performance at 1.8 V, 3.3 V, and 5 V VDD.
Is I²C communication mandatory to configure the SLG46535V, or can it operate autonomously after programming?
I²C is optional for runtime interaction but not required for operation. Once the OTP is programmed, the SLG46535V executes its configured logic autonomously at power-up. I²C is used only for debugging, reading back RAM contents, updating non-OTP registers, or performing in-system verification-making it fully functional in systems without an I²C master.
SLG46535V Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 14-UFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Programmable Type:
- OTP
- Delay Time tpd(1) Max:
- -
- Voltage Supply - Internal:
- 1.71V ~ 1.89V, 3V ~ 3.6V, 4.5V ~ 5.5V
- Number of Logic Elements/Blocks:
- -
- Number of Macrocells:
- 19
- Number of Gates:
- 1
- Number of I/O:
- 10
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-STQFN (2x2.2)
SLG46535V FAQ
1.How can I place an order for SLG46535V through Aetrix?
Please submit a Request for Quotation (RFQ) for SLG46535V on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SLG46535V reliable?
The price and inventory of SLG46535V are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLG46535V is usually 5 days.
3.What payment methods are accepted for SLG46535V?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLG46535V transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SLG46535V?
SLG46535V orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SLG46535V order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SLG46535V?
For technical support, including SLG46535V datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLG46535V requirements.
6.How does Aetrix verify that SLG46535V is sourced from the original manufacturer or authorized distributors?
All SLG46535V products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLG46535V meets industry standards.
7.What is the process for return or replacement of SLG46535V?
All SLG46535V units undergo pre-shipment inspection (PSI). If there is an issue with SLG46535V, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SLG46535V part is unused and in its original packaging.
Return procedure for SLG46535V:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SLG46535V Tags
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5M40ZE64C5N
Intel
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ATF1502ASV-15AU44
Microchip Technology
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Microchip Technology
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Intel
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Intel
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LC4032V-75TN48C
Lattice Semiconductor Corporation
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Microchip Technology
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Intel
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