Renesas SLG47513M
- Part No.:
- SLG47513M
- Manufacturer:
- Renesas
- Package:
- 16-UFQFN
- Datasheet:
-
SLG47513M.pdf
- Description:
- IC CPLD 23MC 16MSTQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,970
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SLG47513M from Renesas Electronics is a low-voltage (1.0–1.65 V), OTP-programmable mixed-signal matrix IC integrating two high-speed analog comparators, 15 combination function macrocells, I²C interface, 2.048 kHz and 25 MHz oscillators, and an analog temperature sensor - enabling compact, ultra-low-power logic+analog functions in space-constrained portable electronics.
For engineers reviewing the SLG47513M datasheet, SLG47513M pinout, SLG47513M application, or SLG47513M equivalent, this device supports rapid prototyping of custom signal conditioning, power sequencing, wake/sleep control, and sensor interface logic without FPGA or MCU overhead - with verified support for STQFN-12 and MSTQFN-16 packages and full I²C programmability.
Technical Context
The SLG47513M implements a configurable interconnect matrix routing signals between GPIOs, analog comparators, LUTs, DFFs, shift registers, counters/delays, and I²C blocks. Its dual-oscillator system (2.048 kHz for low-power timing and 25 MHz for high-speed logic) feeds all macrocells and supports dynamic clock gating per functional block.
Each of its 15 combination macrocells can be independently configured as 2-/3-/4-bit LUTs, DFFs/latches, or shift registers; seven multi-function macrocells add integrated 8-bit delay/counters, and one includes a 16-bit counter/delay - all operating within the 1.0–1.65 V supply range and –40 °C to +85 °C temperature envelope.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDD Range | 1.0 V to 1.65 V - enables direct integration with single-cell Li-ion/Li-poly or coin-cell battery systems without level-shifting. |
| Operating Temp | –40 °C to +85 °C - qualified for industrial and consumer portable applications including fitness bands and tablets. |
| Oscillators | 2.048 kHz (low-power timing) and 25 MHz (high-speed logic) - selectable per macrocell, no external crystal required. |
| Analog Comparators | Two ACMPxH with internal Vref options - support voltage monitoring, battery threshold detection, and analog signal digitization. |
| I²C Interface | Standard-mode (100 kbps) and fast-mode (400 kbps) compatible - enables in-system configuration and runtime reprogramming. |
| Macrocell Count | 15 combination + 8 multi-function macrocells - delivers up to 23 independent logic/counter/timing blocks in one die. |
| Package Options | STQFN-12 (1.6 × 1.6 mm) and MSTQFN-16 (1.6 × 1.6 mm) - footprint-compatible, pin-different variants for I/O scalability. |
Pinout & Package
SLG47513M is available in two RoHS-compliant, halogen-free QFN packages: STQFN-12 (1.6 mm × 1.6 mm × 0.55 mm, 0.4 mm pitch) and MSTQFN-16 (1.6 mm × 1.6 mm × 0.55 mm, 0.4 mm pitch). Pin assignments differ between variants; the STQFN-12 version uses pins 1–12, while MSTQFN-16 adds four dedicated I/Os (P13–P16) and reassigns VDD/VSS positions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Power Supply | Main 1.0–1.65 V supply input; powers all digital and analog blocks including oscillators and comparators. |
| VSS | Ground | Digital/analog common reference; requires low-impedance connection to minimize noise coupling into ACMPs. |
| SCL | I²C Clock | Open-drain input/output supporting standard/fast-mode I²C; internally pulled up when enabled in I²C mode. |
| SDA | I²C Data | Open-drain bidirectional data line; used for configuration, register read/write, and runtime macrocell control. |
| P0–P9 | Configurable GPIO | Programmable as input, output, or bidirectional; support pull-up/down, deglitching, edge detection, and I²C mode. |
| ACMP0H+/– | Analog Comparator 0 Inputs | Differential high-speed inputs referenced to internal Vref or external source; enable precision threshold sensing. |
| ACMP1H+/– | Analog Comparator 1 Inputs | Independent second comparator channel with identical specs; allows dual-threshold or window-comparator designs. |
| TEMP | Temperature Sensor Output | Analog voltage output proportional to die temperature; calibrated for ±2.5 °C accuracy across –40 °C to +85 °C. |
Key Features
| Feature | Design Value |
|---|---|
| OTP NVM Configuration | One-time programmable memory stores full interconnect, macrocell, and I/O setup - eliminates boot firmware and external configuration EEPROM. |
| Wake/Sleep Controller | Hardware-based low-power state manager using programmable delays and counter-triggered wake events - reduces system-level sleep current to sub-µA. |
| Programmable Pattern Generator | Single macrocell generates user-defined periodic waveforms (e.g., PWM, strobes, clocks) without CPU intervention - ideal for LED drivers or sensor triggers. |
| Edge Detector + Deglitch Filter | Configurable digital input filter with adjustable pulse-width rejection (≥50 ns) and clean edge outputs - prevents false interrupts from noisy switch or sensor inputs. |
| Power-On Reset with CRC | Hardware POR validates NVM integrity at startup; CRC check ensures configuration correctness before macrocell activation - critical for safety-critical sequencing. |
Applications
| Battery Monitoring System | Portable Device Power Sequencing |
|---|---|
|
Use Scenario: Real-time monitoring of single-cell Li-ion voltage during charge/discharge cycles in fitness bands or Bluetooth earbuds. IC Role / Device Role / Timing Role: SLG47513M acts as analog threshold detector and state sequencer - comparing battery voltage against multiple Vref levels and triggering alerts or shutdown via GPIO. Use Value: Replaces discrete comparator + logic + timer ICs; achieves <1 µA quiescent current in sleep mode while maintaining accurate 10 mV threshold resolution. |
Use Scenario: Controlled power-up sequence for SoC, display, and RF modules in smartphones or tablets to prevent inrush current and bus contention. IC Role / Device Role / Timing Role: SLG47513M serves as hardware-based power sequencer - generating precise, cascaded enable signals with programmable delays between rails. Use Value: Eliminates software dependency on boot ROM; guarantees deterministic timing (<±1% variation) across –40 °C to +85 °C with no firmware updates required. |
| Wearable Sensor Interface | USB-C Port Detection & Control |
|
Use Scenario: Conditioning and event-driven wake-up for accelerometer/HRM sensors in smartwatches during motion detection. IC Role / Device Role / Timing Role: SLG47513M functions as analog front-end and interrupt generator - amplifying/conditioning sensor outputs and issuing wake pulses to host MCU only on valid activity. Use Value: Reduces average system current by >90% versus always-on MCU polling; leverages internal 2.048 kHz oscillator for ultra-low-power timing. |
Use Scenario: Detecting USB-C plug insertion, orientation (CC1/CC2), and role negotiation (DFP/UFP) in portable docks or adapters. IC Role / Device Role / Timing Role: SLG47513M operates as CC-line monitor and state machine - interpreting voltage levels on CC pins and controlling VCONN/MUX switches via GPIO. Use Value: Integrates comparator, logic, and timing in one 1.6 × 1.6 mm package; supports USB PD 3.0 sink behavior without external microcontroller. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable mixed-signal logic applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SLG46533V | Lower voltage range (0.9–1.8 V), fewer macrocells (12 combo + 4 multi-function), no analog temperature sensor or 25 MHz oscillator. | Targeted at simpler power management tasks; lacks dual-oscillator flexibility and thermal awareness needed for wearables. | Select SLG46533V only if design requires wider VDD tolerance and minimal analog functionality - not suitable for temperature-compensated timing. |
| SLG46620V | Higher I/O count (20 pins), added 10-bit ADC, but no analog comparators or internal Vref; operates at 1.8–5.5 V. | Designed for higher-voltage sensor hubs; incompatible with 1.0–1.65 V battery rails and lacks ACMP-based fast response. | Choose SLG46620V when ADC-based signal acquisition dominates over comparator-driven event detection - requires level-shifting for SLG47513M-compatible systems. |
Compared with SLG46533V and SLG46620V, the SLG47513M uniquely combines sub-1.65 V operation, dual high-speed comparators, integrated temperature sensing, and 25 MHz logic speed - making it the only GreenPAK variant qualified for battery-coupled, thermally aware, event-driven portable systems.
Availability
SLG47513M is available at Aetrix Electronics and suitable for battery-powered wearables, portable medical devices, and USB-C accessory designs requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for SLG47513M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader delivering trusted microcontrollers, analog, power, and SoC solutions for automotive, industrial, and IoT markets - with over 40 years of mixed-signal IP heritage.
The SLG47513M belongs to Renesas' GreenPAK family - purpose-built for replacing discrete logic, timers, and analog comparators in ultra-low-power portable electronics through field-configurable, OTP-programmable mixed-signal integration.
FAQ
What is the programming method for SLG47513M?
The SLG47513M uses one-time programmable (OTP) non-volatile memory to store configuration data. Programming is performed via the I²C interface using Renesas' GreenPAK Designer software and a compatible programmer (e.g., SLG4DVKHP). Once programmed, the configuration persists without power and cannot be erased or rewritten - ensuring tamper-resistant, repeatable behavior in production units.
Does SLG47513M support both STQFN-12 and MSTQFN-16 packages with identical functionality?
Yes, SLG47513M is offered in both STQFN-12 and MSTQFN-16 packages with identical electrical specifications and macrocell resources. The MSTQFN-16 adds four additional GPIOs (P13–P16) and relocates VDD/VSS pins - allowing scalable I/O expansion without redesigning logic functionality or changing firmware.
Can SLG47513M operate without an external clock source?
Yes, SLG47513M contains two fully integrated on-die oscillators: a precision 2.048 kHz oscillator for low-power timing and a 25 MHz oscillator for high-speed logic. Both are factory-trimmed and require no external components - enabling complete self-contained operation in battery-powered systems.
How does the analog temperature sensor in SLG47513M interface with system logic?
The SLG47513M's analog temperature sensor outputs a voltage (TEMP pin) proportional to junction temperature, calibrated to ±2.5 °C accuracy from –40 °C to +85 °C. This analog signal can be fed directly into one of the two high-speed analog comparators (ACMP0H or ACMP1H) to trigger thermal alerts or adjust timing parameters without MCU involvement.
Is read-back protection enabled by default on SLG47513M?
Yes, SLG47513M includes Read Back Protection (Read Lock) that, once activated during programming, prevents unauthorized access to the OTP configuration memory contents. This feature is irreversible and ensures intellectual property security in production firmware - critical for proprietary logic designs deployed in consumer electronics.
SLG47513M Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 16-UFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Programmable Type:
- OTP
- Delay Time tpd(1) Max:
- -
- Voltage Supply - Internal:
- 1V ~ 1.65V
- Number of Logic Elements/Blocks:
- -
- Number of Macrocells:
- 23
- Number of Gates:
- -
- Number of I/O:
- 14
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-MSTQFN (1.6x1.6)
SLG47513M FAQ
1.How can I place an order for SLG47513M through Aetrix?
Please submit a Request for Quotation (RFQ) for SLG47513M on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SLG47513M reliable?
The price and inventory of SLG47513M are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLG47513M is usually 5 days.
3.What payment methods are accepted for SLG47513M?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLG47513M transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SLG47513M?
SLG47513M orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SLG47513M order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SLG47513M?
For technical support, including SLG47513M datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLG47513M requirements.
6.How does Aetrix verify that SLG47513M is sourced from the original manufacturer or authorized distributors?
All SLG47513M products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLG47513M meets industry standards.
7.What is the process for return or replacement of SLG47513M?
All SLG47513M units undergo pre-shipment inspection (PSI). If there is an issue with SLG47513M, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SLG47513M part is unused and in its original packaging.
Return procedure for SLG47513M:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SLG47513M Tags

-
5M40ZE64C5N
Intel

-
ATF1502ASV-15AU44
Microchip Technology

-
5M80ZE64C5N
Intel

-
5M80ZT100C5N
Intel

-
ATF1502AS-10AU44
Microchip Technology

-
ATF1502AS-10JU44
Microchip Technology

-
5M80ZE64I5N
Intel

-
5M80ZT100I5N
Intel
-
LC4032V-75TN48C
Lattice Semiconductor Corporation

-
ATF1504ASV-15AU44
Microchip Technology

-
ATF1504AS-10JU44
Microchip Technology

-
5M160ZE64C5N
Intel
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

