Renesas SLG59H1009V
- Part No.:
- SLG59H1009V
- Manufacturer:
- Renesas
- Package:
- 18-PowerUFQFN
- Datasheet:
-
SLG59H1009V.pdf
- Description:
- IC PWR SWITCH N-CHAN 1:1 18STQFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SLG59H1009V from Renesas Electronics is a high-voltage, self-powered NMOS load switch optimized for 4.5 V to 22 V power-rail switching up to 4 A continuous current. It delivers stable 13.1 mΩ RDSON across voltage and temperature, integrates VIN overvoltage lockout selection (SEL0/SEL1), and provides an analog MOSFET current monitor output (10 µA/A) for real-time load diagnostics in point-of-load distribution.
For engineers reviewing the SLG59H1009V datasheet, SLG59H1009V pinout, SLG59H1009V application, or SLG59H1009V equivalent, this device supports precise inrush control via external CAP capacitor, dual-stage current limiting (resistor-adjustable active limit + internal short-circuit protection), fast 4 kΩ output discharge, and open-drain FAULT signaling for system-level fault management.
Technical Context
The SLG59H1009V implements a proprietary copper-pillar interconnect NMOS FET architecture enabling low thermal resistance (θJA = 40 °C/W) and stable RDSON (<0.05 mΩ/V vs. VIN, <0.06 mΩ/°C vs. temperature). Its state machine governs turn-on slew rate (set by external 10–20 nF CAP), active current limit response (120 µs), and automatic SOA protection triggered at >5 W dissipation for >2.5 ms.
Protection logic includes VIN OVLO (configurable 22.7–25.2 V via SEL0/SEL1), thermal shutdown (125 °C) with hysteresis (restart at 100 °C), and dual-mode current limiting: resistor-set active limit (4.2–4.9 A with 21 kΩ RSET) and fixed internal short-circuit limit (0.5 A). The IOUT monitor operates linearly from 0.5 A to 4 A with 45 µs response time and 0.5–4 V compliance range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 22 V continuous - supports 5 V, 9 V, 12 V, and 20 V PoL rails without external regulation. |
| RDSON | 13.1 mΩ at 22 V and 25 °C - enables <100 mW conduction loss at 4 A, critical for thermally constrained PCB layouts. |
| Continuous Current | 4 A - rated for sustained operation within -40 °C to 85 °C ambient with proper thermal design. |
| Current Monitor Accuracy | 10 µA/A ±7% - provides scalable analog feedback for system ADC-based load monitoring and diagnostics. |
| VIN OVLO Threshold | 24 V typical (SEL[1,0] = [1,1]) - configurable across four thresholds to match system rail tolerance and safety margins. |
| Output Discharge | 4.4 kΩ typical - actively discharges VOUT within microseconds after shutdown, preventing floating outputs and latch-up risks. |
| Thermal Protection | 125 °C shutdown / 100 °C restart - ensures safe recovery from overload without manual reset or system intervention. |
Pinout & Package
SLG59H1009V is housed in a RoHS-compliant, 1.6 × 3.0 mm STQFN package with 0.40 mm pitch and fused VIN/VOUT power pads for low-inductance, high-current routing. Thermal performance is enhanced by copper pillar interconnects and direct die-to-pad thermal path.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, ON | CMOS Enable Input | Level-sensitive active-HIGH control with VIH > 0.9 V; requires external pull-up or MCU GPIO drive - no internal pull-down. |
| 2, SEL0 / 14, SEL1 | VIN OVLO Configuration Inputs | Binary-select pins setting OVLO threshold (22.7–25.2 V); driven HIGH via 10 kΩ to local logic supply. |
| 3, GND | Main Ground Reference | Common return for charge pump, gate driver, current sense, and state machine - must connect directly to analog/power plane. |
| 4–8, VIN | Power Input / Drain Terminal | Fused 5-pin input accepting up to 4 A; requires ≥47 µF/50 V low-ESR capacitor placed adjacent to pins. |
| 9–13, VOUT | Power Output / Source Terminal | Fused 5-pin output delivering switched load current; requires ≥47 µF/50 V low-ESR capacitor at VOUT node. |
| 15, FAULT | Open-Drain Fault Output | Asserts LOW within 80 µs on OVLO, current limit, or overtemperature; requires 100 kΩ pull-up to logic supply. |
| 16, CAP | Slew Rate Control Node | Connects external 10–20 nF ceramic capacitor to set VOUT ramp time (1–8 ms) and prevent inrush-induced faults. |
| 17, IOUT | Analog Current Monitor Output | 10 µA/A proportional output; bypass with 180 pF to GND for stability; drives ground-referenced resistor for voltage scaling. |
| 18, RSET | Active Current Limit Set Input | Accepts 1%-tolerance 21 kΩ resistor to configure 4.5 A active current limit; defines IACL with ±0.3 A tolerance. |
Key Features
| Feature | Design Value |
|---|---|
| UL2367 Certification | E468659 listed - validates safety compliance for end-equipment certification in industrial and telecom applications. |
| SOA Protection | 5 W threshold with 2.5 ms timeout - autonomously disables FET during overpower events and auto-resumes after 160 ms cool-down. |
| Capacitor-Adjustable Inrush Control | External 10–20 nF CAP sets monotonic VOUT ramp (0.5–3.9 V/ms) - eliminates non-monotonic start-up into capacitive loads. |
| Two-Stage Current Limiting | Resistor-configurable active limit (4.2–4.9 A) + fixed 0.5 A short-circuit clamp - prevents damage while maintaining system responsiveness. |
| MOSFET Current Monitor | 10 µA/A analog output with 45 µs response - enables real-time load current measurement without shunt resistors or signal conditioning. |
Applications
| Power-Rail Switching | Multifunction Printers |
|---|---|
|
Use Scenario: Sequenced enable of 12 V and 20 V subsystems in modular office equipment with strict inrush limits. IC Role / Device Role / Timing Role: Load switch controlling power delivery to motor drivers, scanner modules, and paper-handling actuators. Use Value: Prevents brown-out during simultaneous startup using CAP-tuned slew rate and avoids tripping upstream supplies via 4.5 A active current limit. |
Use Scenario: Independent power control for print engine, scanner, and network interface in high-speed MFPs. IC Role / Device Role / Timing Role: High-side switch isolating 20 V logic and 12 V motor rails with fault reporting to main controller. Use Value: Enables hot-swap capability and rapid fault isolation via FAULT pin, reducing service downtime and field failures. |
| Telecommunications Equipment | High-performance Computing |
|
Use Scenario: Redundant 48 V DC-DC output stage regulation in base station power modules. IC Role / Device Role / Timing Role: Secondary-side load switch managing power to RF amplifiers and digital signal processors. Use Value: Delivers 4 A at 22 V with ultra-low RDSON and monitors load current via IOUT to detect early-stage component degradation. |
Use Scenario: Point-of-load switching for GPU auxiliary rails and FPGA configuration supplies in AI accelerators. IC Role / Device Role / Timing Role: Precision-controlled power delivery with programmable OVLO to match ASIC voltage tolerances. Use Value: SEL0/SEL1-configurable 24 V OVLO prevents damage from transient surges on 20 V rails while supporting tight system margins. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar load switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS22992DRLR | Lower voltage rating (5.5 V max), no VIN OVLO select, no analog current monitor - uses digital current-limit flag only. | Targeted for low-voltage consumer electronics; lacks high-voltage robustness and diagnostic capability. | Select when operating below 5.5 V and diagnostic monitoring is unnecessary; not suitable for 20 V telecom or industrial rails. |
| RT9759GJ6 | 24 V max rating, 12 mΩ RDSON, but no configurable OVLO, no IOUT monitor, and fixed 3.6 A current limit. | Designed for cost-sensitive computing applications; missing SEL0/SEL1 flexibility and analog telemetry. | Choose for fixed-threshold 24 V systems where current monitoring is handled externally; verify thermal margin at 4 A. |
Compared with TPS22992DRLR and RT9759GJ6, SLG59H1009V uniquely combines 22 V operation, user-selectable OVLO, and integrated 10 µA/A current monitoring - enabling safer, more observable power sequencing in high-reliability industrial and telecom designs without adding external sensing components.
Availability
SLG59H1009V is available at Aetrix Electronics and suitable for power-rail switching, multifunction printers, and telecommunications equipment requiring stable component supply, long-term lifecycle support, and industrial-grade (-40 °C to 85 °C) reliability.
Supply support for SLG59H1009V includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering microcontrollers, analog, power, and SoC solutions for automotive, industrial, infrastructure, and IoT markets.
The SLG59H1009V belongs to Renesas' High Voltage GreenFET family, engineered specifically for robust, high-current load switching in demanding industrial and telecom power architectures with integrated protection and telemetry.
FAQ
What is the maximum input voltage the SLG59H1009V can safely handle?
The SLG59H1009V supports continuous operation up to 22 V, with absolute maximum rating of 30 V. Its VIN overvoltage lockout is configurable between 22.7 V and 25.2 V using SEL0/SEL1 pins - ensuring reliable shutdown before reaching destructive levels. Transient pulses up to 32 V (≤0.1 s) are tolerated per absolute ratings, but sustained operation above 22 V is not recommended.
How does the SLG59H1009V implement inrush current control?
The SLG59H1009V uses an external capacitor on the CAP pin (10–20 nF) to set VOUT slew rate and total turn-on time. This capacitor controls the internal linear ramp generator, producing monotonic VOUT rise (0.5–3.9 V/ms) that prevents peak inrush currents from exceeding the active current limit. The design eliminates need for external RC networks or complex timing circuits.
Can the SLG59H1009V be used without connecting the RSET pin?
No - the RSET pin must be connected to a 1%-tolerance 21 kΩ resistor to ground to configure the active current limit at 4.5 A. Leaving RSET unconnected disables active current limiting, leaving only the internal 0.5 A short-circuit clamp. This compromises system-level fault response and violates recommended operating conditions per the datasheet.
What is the purpose of the IOUT pin on the SLG59H1009V?
The IOUT pin delivers a precision 10 µA/A analog current proportional to the main MOSFET load current (IDS), linear from 0.5 A to 4 A. When routed through a ground-referenced resistor (e.g., 84.5 kΩ), it generates a 0.5–4 V voltage for ADC sampling - enabling real-time load monitoring, predictive maintenance, and system-level power budgeting without shunt resistors or signal conditioning.
Does the SLG59H1009V require external capacitors, and where should they be placed?
Yes - SLG59H1009V requires ≥47 µF/50 V low-ESR capacitors at both VIN (pins 4–8) and VOUT (pins 9–13), placed as close as possible to the respective pins. A 180 pF capacitor is also required from IOUT to GND for stability, and the CAP pin needs a 10–20 nF ceramic capacitor. These placements minimize parasitic inductance and ensure stable regulation and protection response.
SLG59H1009V Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 18-PowerUFQFN
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Type:
- General Purpose
- Number of Outputs:
- 1
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 20V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 4A
- Rds On (Typ):
- 13.1mOhm
- Input Type:
- CMOS
- Features:
- Auto Restart, Load Discharge, Slew Rate Controlled
- Fault Protection:
- Current Limiting (Adjustable), Over Temperature, UVLO
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 18-STQFN (1.6x3)
SLG59H1009V FAQ
1.How can I place an order for SLG59H1009V through Aetrix?
Please submit a Request for Quotation (RFQ) for SLG59H1009V on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SLG59H1009V reliable?
The price and inventory of SLG59H1009V are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLG59H1009V is usually 5 days.
3.What payment methods are accepted for SLG59H1009V?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLG59H1009V transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SLG59H1009V?
SLG59H1009V orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SLG59H1009V order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SLG59H1009V?
For technical support, including SLG59H1009V datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLG59H1009V requirements.
6.How does Aetrix verify that SLG59H1009V is sourced from the original manufacturer or authorized distributors?
All SLG59H1009V products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLG59H1009V meets industry standards.
7.What is the process for return or replacement of SLG59H1009V?
All SLG59H1009V units undergo pre-shipment inspection (PSI). If there is an issue with SLG59H1009V, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SLG59H1009V part is unused and in its original packaging.
Return procedure for SLG59H1009V:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SLG59H1009V Tags

-
TPS22919DCKR
Texas Instruments

-
MIC2091-1YM5-TR
Microchip Technology

-
MIC2090-1YM5-TR
Microchip Technology

-
TPS22995RZFR
Texas Instruments

-
TPS22975DSGR
Texas Instruments

-
SIP32510DT-T1-GE3
Vishay Siliconix

-
ULN2003D1013TR
STMicroelectronics

-
MIC2005A-1YM5-TR
Microchip Technology

-
MIC2005A-1YM6-TR
Microchip Technology

-
TPS22916BYFPR
Texas Instruments

-
TPS22917DBVR
Texas Instruments
-
ULN2003APWR
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
