Renesas SLG59H1302C
- Part No.:
- SLG59H1302C
- Manufacturer:
- Renesas
- Package:
- 28-XFBGA, WLCSP
- Datasheet:
-
SLG59H1302C.pdf
- Description:
- IC PWR SURGE PROT N-CH 28WLCSP
- Quantity:
- Payment:

- Shipping:

Inventory:1,400
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SLG59H1302C from Renesas Electronics is a surge-protected, 28 V tolerant power splitter IC in 28-ball WLCSP (2.98 × 1.69 × 0.44 mm), integrating two independent high-current nFET switches (BUS→OUT: 12 mΩ/6 A; BUS→SYS: 24 mΩ/6 A reverse-blocking) and an always-on 0.1 A LDO delivering ~4.0 V on BUSOK. It serves as a dual-path power routing and protection device in portable battery-powered systems with USB-C or travel adapter input.
For engineers reviewing the SLG59H1302C datasheet, SLG59H1302C pinout, SLG59H1302C application, or SLG59H1302C equivalent, key selection considerations include IEC 61000-4-5 ±130 V surge tolerance, 200 ns overvoltage protection response, push-pull PG assertion on SYS turn-on, and thermal shutdown at 145 °C - all validated across –40 °C to +85 °C industrial operation.
Technical Context
The SLG59H1302C implements dual independent load switch control logic: ON1 (active-low) enables the BUS-to-OUT path, while ON2 (active-high) controls the reverse-blocking BUS-to-SYS path. Each switch includes dedicated OVLO comparators (VOUT_OVLO = 13.9 V typ, VSYS_OVLO = 5.25 V typ) with 200 ns response time and internal debounce (15 ms).
Its integrated "always ON" LDO derives from BUS and delivers regulated ~4.0 V at up to 100 mA on BUSOK, independent of ON1/ON2 states. The PG output asserts high when SYS is powered and stable, and the IC features active-high SD for global shutdown, UVLO (2.4 V typ), and thermal shutdown (145 °C) with 20 °C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| BUS Voltage Range | 2.7 V to 13.3 V continuous; supports USB PD and travel adapter inputs without external regulation |
| BUS-to-OUT RDS(on) | 12 mΩ max at 25 °C; enables ≤6 A continuous current with <100 mV drop at 6 A |
| BUS-to-SYS RDS(on) | 24 mΩ max at 25 °C; provides reverse-current blocking (≤10 nA) and 6 A forward conduction |
| OVP Response Time | 200 ns; protects downstream circuitry from fast transients before damage occurs |
| Surge Tolerance | ±130 V per IEC 61000-4-5; eliminates need for external TVS diodes on BUS line |
| BUSOK Output | 4.0 V ±10% at 100 mA; powers low-voltage monitoring or sequencing logic directly from BUS |
| Operating Temperature | –40 °C to +85 °C; qualified for industrial-grade wearable and mobile applications |
Pinout & Package
SLG59H1302C uses a 28-ball WLCSP package (2.98 × 1.69 × 0.44 mm, 0.4 mm pitch) with exposed thermal pads on BUS, SYS, and OUT terminals for efficient heat dissipation in space-constrained portable designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BUS (B3, C2–C4, D2–D4, E2–E4, F2–F4) | Power Input | 13-contact common input node; connects to charger/adapter; carries full load current and surge energy |
| OUT (B1, B2, C1) | Load Switch Output | 3-contact output to system load (e.g., PMIC rails); controlled by active-low ON1 |
| SYS (D1, E1, F1) | Load Switch Output | 3-contact output to battery (VBAT); reverse-blocking path enabled by active-high ON2 |
| BUSOK (A3) | LDO Output | Always-on 4.0 V regulator output; supplies auxiliary logic without requiring switch activation |
| ON1 (A4) | Digital Control Input | Active-low enable for BUS→OUT path; 1 MΩ internal pull-down ensures safe default OFF state |
| ON2 (B4) | Digital Control Input | Active-high enable for BUS→SYS path; enables battery charging only when asserted |
| SD (A2) | Global Shutdown Input | Active-high shutdown; reduces quiescent current to ≤2 µA for system-level power management |
| PG (A1) | Power Good Output | Push-pull active-high signal asserting when SYS voltage is stable; used for sequencing or fault indication |
| GND (G1–G4) | Analog Ground | 4-contact ground return; must connect to low-impedance PCB ground plane for noise immunity and thermal performance |
Key Features
| Feature | Design Value |
|---|---|
| IEC 61000-4-5 ±130 V Surge Protection | Integrated TVS eliminates external surge components and saves board area in USB-C adapter interfaces |
| Independent Dual Load Switch Control | Separate ON1/ON2 signals allow concurrent or staggered power-up of load and battery paths for robust system sequencing |
| Reverse-Blocking BUS-to-SYS Path | 24 mΩ RDS(on) with <10 nA reverse leakage prevents battery discharge back into faulty or disconnected BUS sources |
| Always-On BUSOK LDO | Delivers stable 4.0 V at 100 mA from BUS without dependency on switch states-enables always-active monitoring circuits |
| 200 ns Overvoltage Protection | Ultra-fast OVP response protects sensitive downstream loads (e.g., PMICs, SoCs) from transient overvoltage events |
Applications
| USB-C Power Delivery Hub | Smartphone Charging Circuit |
|---|---|
Use Scenario: A compact USB-C hub routes power from a 20 V PD source to both system logic (PMIC) and battery simultaneously while surviving hot-plug surges. IC Role / Device Role / Timing Role: SLG59H1302C acts as dual-path power splitter and surge protector - enabling independent control of VBUS-to-PMIC (OUT) and VBUS-to-battery (SYS) rails. Use Value: Integrated ±130 V surge tolerance and 200 ns OVP eliminate external TVS and reduce BOM count; 12 mΩ/24 mΩ RDS(on) minimize conduction loss during 5–6 A charging. |
Use Scenario: Smartphone design requires safe, sequenced power routing from travel adapter to application processor rail and Li-ion battery, with fail-safe shutdown under overvoltage. IC Role / Device Role / Timing Role: SLG59H1302C functions as intelligent power router - ON1 enables main SoC rail only after BUSOK stabilizes; ON2 activates battery charge path post-system boot. Use Value: PG output synchronizes PMIC enable with SYS rail stability; thermal shutdown (145 °C) and UVLO (2.4 V) prevent unsafe operation during brown-out or overheating. |
| Tablet PC Power Management | Wearable Device Charger Interface |
Use Scenario: Tablet uses a single USB-C port for both charging and OTG host functionality, requiring bidirectional power path isolation and surge resilience. IC Role / Device Role / Timing Role: SLG59H1302C provides reverse-blocking BUS-to-SYS path to prevent battery backfeed during OTG mode, while BUSOK powers USB controller logic. Use Value: 24 mΩ RDS(on) and <10 nA reverse leakage ensure minimal voltage drop and zero standby drain; WLCSP footprint fits tight layout constraints near connector. |
Use Scenario: Smartwatch or hearable accepts 5–9 V input from proprietary magnetic charger and must protect internal battery and MCU from ESD/surge events. IC Role / Device Role / Timing Role: SLG59H1302C serves as front-end power conditioner - absorbing IEC 61000-4-5 surges and regulating auxiliary supply via BUSOK for charging status LED or fuel gauge. Use Value: 0.44 mm height and 2.98 × 1.69 mm area enable integration in ultra-thin wearables; 1 µA shutdown current extends shelf-life battery life. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-path power splitting applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS25947L | Single-channel 6.5 A eFuse with 3.5 mΩ RDS(on); no integrated LDO or reverse-blocking SYS path | Requires external LDO and separate battery switch; lacks BUSOK and PG outputs | Choose when only one power path is needed and lowest RDS(on) is critical; not suitable as direct functional replacement |
| RTQ2132B-QA | Automotive-qualified dual-channel load switch (3.5 A each); includes LDO but no surge protection or PG output | Supports -40 °C to +125 °C; lacks IEC 61000-4-5 compliance and 200 ns OVP | Prefer for automotive infotainment where extended temperature range matters more than surge immunity |
Compared with TPS25947L and RTQ2132B-QA, the SLG59H1302C uniquely integrates surge protection, dual independent switching with reverse blocking, an always-on LDO, and PG signaling in a single WLCSP - making it optimal for consumer portable devices requiring compact, robust, and self-contained power routing.
Availability
SLG59H1302C is available at Aetrix Electronics and suitable for wearable devices, tablet PCs, smartphones, and USB-C accessory designs requiring stable component supply, surge resilience, and space-efficient power routing.
Supply support for SLG59H1302C includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering microcontrollers, analog, power, and SoC products for automotive, industrial, infrastructure, and IoT applications.
The SLG59H1302C belongs to Renesas' GreenFET family of highly integrated power management ICs, designed specifically for compact, surge-resilient power routing in portable consumer electronics with stringent size and reliability requirements.
FAQ
What is the maximum continuous current rating for the BUS-to-OUT path in the SLG59H1302C?
The SLG59H1302C supports up to 6 A continuous current on the BUS-to-OUT path, with a typical RDS(on) of 12 mΩ at 25 °C. At 85 °C, RDS(on) rises to 16–18 mΩ, resulting in ~100 mV conduction drop at 6 A - well within thermal limits when using recommended PCB copper area per datasheet layout guidelines.
Does the SLG59H1302C provide reverse current protection on the BUS-to-SYS path?
Yes, the SLG59H1302C implements true reverse-blocking behavior on the BUS-to-SYS path, with measured reverse leakage current of ≤10 nA when VSYS = 4.4 V. This prevents battery discharge into a failed or disconnected BUS source, a critical safety feature in portable charging architectures.
Can the BUSOK output of the SLG59H1302C be loaded with 100 mA continuously?
Yes, the BUSOK output of the SLG59H1302C is rated for 100 mA continuous current, delivering 3.8–4.4 V (depending on load and BUS voltage). At 100 mA and VBUS = 12 V, output voltage remains ≥3.6 V - sufficient to power supervisory ICs, level shifters, or charging status indicators without external regulation.
How does the SLG59H1302C respond to overvoltage on the OUT rail?
When VOUT exceeds the OVLO threshold (13.9 V typical), the SLG59H1302C disables the BUS-to-OUT switch within 200 ns and pulls PG low if SYS remains valid. The device remains latched off until ON1 is cycled or SD is toggled, preventing damage to downstream PMICs or SoCs during transient overvoltage events.
Is the SLG59H1302C pin-compatible with other members of the SLG59H13xx family?
No - the SLG59H1302C has a unique 28-ball WLCSP pinout optimized for dual-path routing and thermal performance. While functionally related to SLG59H1301C (single-path variant), it is not pin-compatible due to differing terminal counts, placement (e.g., 13 BUS pins vs. fewer), and signal assignments such as dedicated PG and BUSOK outputs.
SLG59H1302C Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 28-XFBGA, WLCSP
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Type:
- General Purpose
- Number of Outputs:
- 1
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 2.7V ~ 13.3V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 6A
- Rds On (Typ):
- 12mOhm
- Input Type:
- Non-Inverting
- Features:
- -
- Fault Protection:
- Over Temperature, Over Voltage, UVLO
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-WLCSP (2.98x1.69)
SLG59H1302C FAQ
1.How can I place an order for SLG59H1302C through Aetrix?
Please submit a Request for Quotation (RFQ) for SLG59H1302C on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SLG59H1302C reliable?
The price and inventory of SLG59H1302C are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLG59H1302C is usually 5 days.
3.What payment methods are accepted for SLG59H1302C?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLG59H1302C transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SLG59H1302C?
SLG59H1302C orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SLG59H1302C order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SLG59H1302C?
For technical support, including SLG59H1302C datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLG59H1302C requirements.
6.How does Aetrix verify that SLG59H1302C is sourced from the original manufacturer or authorized distributors?
All SLG59H1302C products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLG59H1302C meets industry standards.
7.What is the process for return or replacement of SLG59H1302C?
All SLG59H1302C units undergo pre-shipment inspection (PSI). If there is an issue with SLG59H1302C, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SLG59H1302C part is unused and in its original packaging.
Return procedure for SLG59H1302C:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SLG59H1302C Tags

-
TPS22919DCKR
Texas Instruments

-
MIC2091-1YM5-TR
Microchip Technology

-
MIC2090-1YM5-TR
Microchip Technology

-
TPS22995RZFR
Texas Instruments

-
TPS22975DSGR
Texas Instruments

-
SIP32510DT-T1-GE3
Vishay Siliconix

-
ULN2003D1013TR
STMicroelectronics

-
MIC2005A-1YM5-TR
Microchip Technology

-
MIC2005A-1YM6-TR
Microchip Technology

-
TPS22916BYFPR
Texas Instruments

-
TPS22917DBVR
Texas Instruments
-
ULN2003APWR
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
