Renesas SLG59H1405V

Overview

SLG59H1405V from Renesas Electronics is a dual-input, single-output 12 V power multiplexer IC designed for manual switchover between 5 V and 12 V power sources in systems with redundant or auxiliary supplies. It integrates two independent load switches - Channel 1 rated at 3 A (5 V input), Channel 2 at 1.25 A (12 V input) - with individual enable control, reverse-current blocking on Channel 1, and seamless switchover in industrial power management applications.

For engineers reviewing the SLG59H1405V datasheet, SLG59H1405V pinout, SLG59H1405V application, or SLG59H1405V equivalent, key selection criteria include its dual-rail UVLO/OVP thresholds (VIN1: 3.6–4.0 V / 5.5–6.2 V; VIN2: 3.6–4.0 V / 13.2–14.5 V), resistor-adjustable current limits (IACL_VIN1 = 3.59–4.57 A; IACL_VIN2 = 1.67–2.13 A), and low R_DS(ON) (40 mΩ / 67 mΩ) enabling high-efficiency power path control.

Technical Context

The SLG59H1405V implements a state-machine-controlled linear ramp architecture to manage controlled turn-on, switchover, and discharge sequences. Its dual-channel design supports strict sequencing: Channel 1 must be enabled before Channel 2, with ≥100 ms delay required between EN1 and EN2 assertion to prevent EN2 signal ignore behavior.

Protection logic integrates independent UVLO (hysteresis 0.09–0.31 V), OVP (response time ≤20 μs), active current limiting (TOCP_delay = 1.3–2.85 ms), short-circuit detection (ISCP = 8 A), and thermal shutdown (THERMON = 140 °C, hysteresis 20 °C), all signaled via open-drain FLAG output.

Key Specifications

Pinout & Package

SLG59H1405V uses a 2 mm × 2.5 mm, 0.5 mm pitch, 12-lead FC-QFN package with exposed thermal pad. Pin 12 is GND; pins 1 and 8 are VBUS (common output); pins 2 and 7 are VIN2 and VIN1 (independent inputs); pins 5 and 6 are EN2 and EN1 (CMOS-compatible enable inputs); pins 10 and 11 are ILIM2 and ILIM1 (current limit programming outputs); pin 3 is open-drain FLAG; pins 4 and 9 are NC.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-input power multiplexer applications.

Compared with TUSB546AIDGST and TPS2113APWR, SLG59H1405V uniquely delivers independent 5 V/12 V rail support, per-channel programmable current limiting, true reverse-current blocking, and comprehensive protection (OVP/UVLO/OTP/SCP) in a compact 2.5 mm × 2 mm FC-QFN - making it the only option for robust, manually sequenced dual-voltage redundancy in space-constrained industrial designs.

Availability

SLG59H1405V is available at Aetrix Electronics and suitable for industrial power redundancy, automotive infotainment supply, medical portable equipment, test & measurement instrumentation, and embedded system backup power requiring stable component supply and full production lifecycle support.

Supply support for SLG59H1405V includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation is a global semiconductor leader delivering microcontrollers, analog, power, and SoC solutions for automotive, industrial, infrastructure, and IoT markets.

The SLG59H1405V belongs to Renesas' GreenFET family of high-efficiency, highly protected load switches - engineered specifically for reliable dual-input power path management in harsh industrial and automotive environments.

FAQ

What is the maximum continuous current rating for each channel of the SLG59H1405V?

The SLG59H1405V supports 3 A continuous current on Channel 1 (VIN1 to VBUS) and 1.25 A continuous current on Channel 2 (VIN2 to VBUS), as specified under IVIN1_VBUS and IVIN2_VBUS in the Electrical Characteristics table. These ratings assume proper PCB layout, thermal management, and operation within the specified voltage and temperature ranges. Exceeding these values may trigger active current limiting or thermal shutdown.

Does the SLG59H1405V support automatic switchover between VIN1 and VIN2?

No, the SLG59H1405V is designed for manual switchover only. Channel selection is controlled explicitly via EN1 and EN2 digital inputs, with mandatory sequencing: EN1 must be asserted first, and EN2 must follow after ≥100 ms. There is no built-in voltage comparator or auto-failover logic - switchover timing and priority are managed externally by the host controller.

How does the SLG59H1405V handle reverse current during switchover from VIN2 to VIN1?

The SLG59H1405V provides true reverse-current blocking (RCB) on Channel 1 only. During VIN2→VIN1 switchover, RCB activates when VBUS exceeds VIN1 by ≥15 mV (VRCB1_T), suppressing reverse current to <0.3 A. Channel 2 has no RCB function. The device also discharges VBUS via internal RDISCHRG (0.7–1.4 kΩ) during switchover to further minimize backfeed risk.

Can the SLG59H1405V be used with input voltages outside its specified operating range?

No. Absolute maximum ratings define hard limits: VIN1 must not exceed 6.5 V, VIN2 must not exceed 18 V, and VBUS must not exceed 18 V. Operation outside the functional ranges (VIN1: 4–5.5 V; VIN2: 4–13.2 V) will trigger UVLO (below 3.6–4.0 V) or OVP (above 5.5–6.2 V for VIN1, 13.2–14.5 V for VIN2), causing latch-off until both EN inputs are pulled low.

What is the purpose of the ILIM1 and ILIM2 pins on the SLG59H1405V?

The ILIM1 and ILIM2 pins are current limit programming outputs. Connecting precision 1%-tolerance resistors between each pin and GND sets the active current limit thresholds: IACL_VIN1 (3.59–4.57 A) and IACL_VIN2 (1.67–2.13 A). For example, a 20 kΩ resistor on ILIM1 configures 4.08 A limit. Open or shorted ILIM pins default to lower factory-set limits (0.52 A / 0.26 A).