Renesas SLG59M1603V

Overview

SLG59M1603V from Renesas Electronics is a dual-channel load switch IC featuring two independent 4.5 A N-channel MOSFETs with reverse current blocking, thermal shutdown protection, and externally adjustable turn-on slew rate via capacitors on CAP_MOS1/CAP_MOS2 pins. It operates from 2.5 V to 5.5 V and supports up to 1000 µF load capacitance per channel - ideal for controlled power rail sequencing in compact industrial and embedded systems.

For engineers reviewing the SLG59M1603V datasheet, SLG59M1603V pinout, SLG59M1603V application, or SLG59M1603V equivalent, key selection considerations include dual-channel independent ramp control, reverse-current blocking capability, thermal shutdown behavior, and STDFN 14L (1 × 3 × 0.55 mm) package constraints for high-density PCB layouts.

Technical Context

The SLG59M1603V integrates two independent charge-pump-driven N-MOSFETs, each with dedicated ON control (CMOS-compatible), external ramp timing capacitor input, and internal discharge paths for gate and source. Each channel provides reverse current blocking when OFF and supports configurable slew rate (1–12 V/ms) and total turn-on time (1–10 ms) via external capacitor selection.

It features over-temperature protection with 125 °C trip and 100 °C hysteresis, 16 mΩ typical R_DS(ON) at 25 °C per channel, and <1 µA shutdown supply current. The device is rated for continuous 4.5 A per channel and peak 6 A (≤10 s/100 s), with maximum 6 V absolute drain voltage and 1.2 W package power dissipation.

Key Specifications

Pinout & Package

SLG59M1603V uses a 14-pin STDFN package (1 mm × 3 mm × 0.55 mm) with fused leads: pins 1&2, 6&7, 8&9, 13&14 are internally connected. Pin 11 is GND; pins 4 and 11 provide power and ground reference for internal charge pumps and logic.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel load switching applications.

Compared with TPS22965DSGR and RTQ2134GSP, the SLG59M1603V uniquely delivers independent dual-channel ramp control, guaranteed reverse-current blocking, and lower R_DS(ON) in a smaller 1×3 mm footprint - making it optimal for space-constrained, multi-rail systems requiring strict sequencing and fault isolation.

Availability

SLG59M1603V is available at Aetrix Electronics and suitable for industrial automation controllers, portable medical monitors, and automotive infotainment modules requiring stable component supply and long-term lifecycle support.

Supply support for SLG59M1603V includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics is a global semiconductor leader delivering microcontrollers, analog, power, and SoC solutions for automotive, industrial, infrastructure, and IoT applications.

The SLG59M1603V belongs to Renesas' Smart Power Switch family, engineered specifically for high-reliability, low-footprint load switching in systems demanding precise power sequencing, reverse-current isolation, and thermal resilience.

FAQ

What is the maximum load capacitance supported by each channel of the SLG59M1603V?

The SLG59M1603V supports up to 1000 µF of capacitance on the source terminal of each channel (MOS1_S and MOS2_S). This specification is validated under conditions including VDD = 5 V, RL = 20 Ω, and external ramp capacitor values that maintain slew rate within datasheet limits. Exceeding 1000 µF may cause extended turn-on time or violate safe operating area limits during inrush. Always verify stability with actual load and layout in the target SLG59M1603V application.

Does the SLG59M1603V provide reverse current blocking when the ON pin is low?

Yes, the SLG59M1603V provides active reverse current blocking when either ON_MOS1 or ON_MOS2 is held low (≤0.3 V), even if the source voltage (VS) is present and VDD is unpowered. Measured IDS leakage is ≤1.5 µA per channel under VS = 1.0–5.0 V and VDD = 0 V at 85 °C. This feature prevents backfeed from downstream circuits into upstream supplies - a critical requirement in multi-rail systems using the SLG59M1603V.

How is the turn-on slew rate configured for each channel of the SLG59M1603V?

The turn-on slew rate for each channel of the SLG59M1603V is set independently using external capacitors connected to CAP_MOS1 (pin 12) and CAP_MOS2 (pin 10). Slew rate ranges from ~1 V/ms to ~12 V/ms depending on capacitor value (0–22 nF typical), VDD, and load conditions. For example, a 4 nF capacitor yields ~3.0 V/ms at VDD = 5 V and TA = 25 °C. The SLG59M1603V datasheet provides graphical curves mapping CAP vs. slew rate and total turn-on time.

What is the thermal shutdown behavior of the SLG59M1603V during overload?

The SLG59M1603V enters thermal shutdown at 125 °C (THERMON) and remains latched off until die temperature falls to 100 °C (THERMOFF), providing 25 °C hysteresis. During shutdown, both channels turn off simultaneously, and the device draws <1 µA from VDD. Recovery is automatic once temperature drops below threshold. This behavior is documented in the SLG59M1603V electrical characteristics table and applies across the full -40 °C to +85 °C operating range.

Can the SLG59M1603V operate with a 2.5 V supply on VDD?

Yes, the SLG59M1603V is fully specified to operate with VDD from 2.5 V to 5.5 V. At 2.5 V, the internal charge pumps still deliver sufficient gate drive to achieve R_DS(ON) ≤25.3 mΩ per channel at 85 °C, and ON_MOS1/ON_MOS2 retain valid CMOS thresholds (VIH ≥2.125 V, VIL ≤0.75 V). All timing, slew, and protection functions remain active - confirmed across temperature in the SLG59M1603V datasheet's Electrical Characteristics table.