Texas Instruments SM72445MT/NOPB
- Part No.:
- SM72445MT/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 28-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
SM72445MT/NOPB.pdf
- Description:
- IC REG CTRLR PHOTOV 1OUT 28TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SM72445MT/NOPB from Texas Instruments is a programmable maximum power point tracking (MPPT) controller for photovoltaic solar power optimizers, featuring four independent PWM gate drive outputs (LIA, HIA, LIB, HIB), 8-channel 10-bit ADC for voltage/current sensing (AVIN, AIIN, AVOUT, AIOUT, A0–A6), I²C interface (SDA/SCL/I2C0–I2C2), and Panel Mode bypass control (PM/PM_OUT). It operates in buck-boost topology with selectable 110 kHz / 135 kHz / 215 kHz switching frequencies and supports output overvoltage and overcurrent protection.
For engineers reviewing the SM72445MT/NOPB datasheet, SM72445MT/NOPB pinout, SM72445MT/NOPB application, or SM72445MT/NOPB equivalent, key selection considerations include PWM frequency configurability via A2 pin, Panel Mode activation logic, analog input scaling for VOUT/IOUT limits, dead-time programmability, and I²C register-level override capability for real-time tuning of MPPT thresholds and offsets.
Technical Context
The SM72445MT/NOPB implements a digital MPPT algorithm that converges to the maximum power point within 10 ms using real-time sampling of input/output voltage and current via its integrated 10-bit ADC. Its control loop dynamically adjusts four PWM signals-two for buck (HIA/LIA) and two for boost (HIB/LIB)-with frequency-selectable dead time (54 ns to 106 ns) to prevent shoot-through in synchronous 4-switch buck-boost converters.
Panel Mode operation is triggered either by external assertion of the PM pin (active-low) or automatically when input-to-output voltage ratio approaches unity; during Panel Mode, the device outputs a 440 kHz square wave on PM_OUT to drive an external bypass FET while halting main converter switching or operating the H-bridge at half-frequency depending on A2 configuration. All configurable parameters-including max output voltage (A0), slew rate (A6), and MPPT entry/exit thresholds (A4/A6)-are set via resistor-divider voltages sampled at startup and reset.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PWM Frequency Options | 110 kHz / 135 kHz / 215 kHz - selectable via A2 pin voltage; determines switching loss vs efficiency trade-off and dead time (106 ns / 87 ns / 54 ns) |
| ADC Resolution & Channels | 10-bit, 8-channel - measures AVIN, AIIN, AVOUT, AIOUT, plus four configuration inputs (A0, A2, A4, A6) for system tuning |
| Operating Temperature | –40°C to +105°C - qualified for outdoor photovoltaic environments including rooftop and ground-mount solar installations |
| I²C Interface | Standard-mode (100 kHz) compatible - enables runtime reconfiguration of registers reg0–reg5 for MPPT thresholds, offsets, dead time, and open-loop duty cycle |
| Supply Voltages | VDDA = VDDD = 4.75 V to 5.25 V - dual 5 V supplies with separate analog/digital grounds (VSSA/VSSD) for noise isolation in high-precision sensing |
| Output Protection | Integrated overvoltage (via A0 limit enforcement in MPPT mode) and overcurrent (via AIOUT vs A4 comparison) - no external comparator required for basic protection |
| Package | TSSOP-28 - surface-mount package with exposed thermal pad; pin-compatible with industry-standard layout practices for solar controller PCBs |
Pinout & Package
TSSOP-28 package with 0.65 mm pitch; thermally enhanced design for continuous operation in ambient temperatures up to +105°C. Pin 1 marked by dot; pin numbering follows standard counter-clockwise convention from top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RST | Active-low reset input | Halts all PWM outputs and PM_OUT immediately; used for fault recovery or system-level synchronization |
| VDDA / VSSA | Analog supply and ground | 5 V ±2.5% analog rail powering ADC and reference; requires 1 µF + 0.1 µF ceramic decoupling to minimize noise on sensing paths |
| VDDD / VSSD | Digital supply and ground | 5 V digital rail powering logic and I²C interface; isolated from analog ground to prevent coupling into sensitive measurements |
| A0–A6 | Configurable analog inputs | Set max output voltage (A0), PWM frequency & Panel Mode type (A2), max output current (A4), slew rate & timing (A6) via resistor dividers |
| AVIN / AIIN / AVOUT / AIOUT | System sensing inputs | Direct connection points for scaled panel input voltage, input current, output voltage, and output current signals; full-scale range = 0–5 V |
| LIA / HIA / LIB / HIB | PWM gate drive outputs | Four independent CMOS-level outputs driving external MOSFETs in 4-switch buck-boost topology; each pair (LIA/HIA, LIB/HIB) controls one leg |
| PM / PM_OUT | Panel Mode control | PM: active-low enable for forced bypass; PM_OUT: 440 kHz square wave output to drive external FET when Panel Mode is active |
| SDA / SCL / I2C0–I2C2 | I²C communication | SDA/SCL: bidirectional data/clock; I2C0–I2C2: hardware address pins setting device I²C address (up to 8 unique addresses) |
Key Features
| Feature | Design Value |
|---|---|
| Programmable MPPT Algorithm | Converges to MPP in ≤10 ms under dynamic irradiance changes; uses real-time AVIN/AIIN/AVOUT/AIOUT sampling without external microcontroller |
| Panel Mode Bypass Logic | Reduces conduction losses by shorting PV panel directly to load when VIN/VOUT ≈ 1; configurable as dedicated-FET or H-bridge-based implementation via A2 |
| I²C Register Override Capability | Allows runtime adjustment of vout_max, iout_max, dead time (tdon/tdoff), and MPPT thresholds without changing external resistors or resetting device |
| Soft-Start with Adaptive Recovery | Ramps output voltage over 250–500 ms depending on PWM frequency; enters Panel Mode if no output current detected, then transitions to MPPT after 60 s or power delta threshold |
| Integrated Protection Functions | Hardware-enforced overvoltage (in MPPT mode only), overcurrent detection, and reset-driven shutdown - reduces need for external protection circuitry |
Applications
| Residential Solar Power Optimizer | Commercial PV String-Level Controller |
|---|---|
|
Use Scenario: Individual solar module equipped with DC-DC optimizer to maximize energy harvest under partial shading or mismatched panels. IC Role / Device Role / Timing Role: Primary MPPT controller managing 4-switch buck-boost converter; performs real-time voltage/current sensing and generates synchronized PWM signals with adaptive dead time. Use Value: Enables >99% peak efficiency in optimized conditions and maintains >95% efficiency across wide input voltage range (15–60 V) and output load variations. |
Use Scenario: Centralized string-level MPPT unit for commercial rooftop arrays where per-module optimization is cost-prohibitive but string-level adaptation improves yield. IC Role / Device Role / Timing Role: Configured in fixed-frequency (135 kHz) mode with I²C-regulated thresholds; interfaces with host MCU via SDA/SCL for fleet-wide parameter updates. Use Value: Reduces BOM count by integrating ADC, PWM generator, and protection logic - eliminates need for separate sense amplifiers, comparators, and gate drivers. |
| Utility-Scale Solar Inverter Auxiliary Control | Off-Grid Solar Charge Controller |
|
Use Scenario: Secondary MPPT stage in multi-stage utility inverter architecture, handling fine-grained voltage matching between PV array and intermediate DC bus. IC Role / Device Role / Timing Role: Operates in high-frequency (215 kHz) mode with minimal dead time (54 ns); uses A6-scaled slew rate limiting to prevent overshoot during rapid irradiance transients. Use Value: Achieves <10 ms MPPT response time critical for maintaining grid-code compliance during cloud-edge events. |
Use Scenario: Standalone solar charge controller for remote telecom or rural electrification systems requiring robust start-up behavior and battery voltage regulation. IC Role / Device Role / Timing Role: Leverages soft-start and Panel Mode to handle cold-start conditions and low-light operation; uses RST pin for battery undervoltage lockout integration. Use Value: Eliminates need for external supervisor ICs - built-in reset, overvoltage, and overcurrent responses reduce system complexity and failure points. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar MPPT controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT8490IMSE#PBF | Fixed 100 kHz switching; no Panel Mode; integrated gate drivers; 16-bit ADC; requires external MOSFETs | Targeted at high-accuracy battery charging with precise CV/CC regulation; lacks direct PV bypass capability | Choose LT8490IMSE#PBF when absolute voltage regulation precision and battery chemistry-specific charge profiles outweigh need for adaptive bypass efficiency. |
| UCC28950PWPR | Phase-shifted full-bridge controller; no integrated ADC; requires external sensing and MCU for MPPT; 1 MHz max frequency | Designed for high-power (>500 W) isolated DC-DC conversion; relies on host processor for algorithm execution | Choose UCC28950PWPR when system already includes a capable MCU and demands galvanic isolation or higher power density than buck-boost topology allows. |
Compared with LT8490IMSE#PBF and UCC28950PWPR, the SM72445MT/NOPB uniquely integrates Panel Mode bypass, 10-bit ADC, and I²C-configurable MPPT parameters in a single TSSOP-28 package - reducing component count and enabling autonomous operation without host processor intervention.
Availability
SM72445MT/NOPB is available at Aetrix Electronics and suitable for residential solar optimizers, commercial PV string controllers, utility-scale auxiliary MPPT stages, off-grid charge controllers, and solar-powered IoT gateways requiring stable component supply and long-term lifecycle support.
Supply support for SM72445MT/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in energy-efficient electronics.
The SM72445MT/NOPB belongs to TI's renewable energy controller product line, designed specifically for high-efficiency photovoltaic DC-DC conversion with autonomous MPPT and adaptive bypass functionality in space-constrained solar optimizer modules.
FAQ
What is the primary function of the SM72445MT/NOPB in a solar power system?
The SM72445MT/NOPB serves as a fully autonomous maximum power point tracking (MPPT) controller for photovoltaic DC-DC optimizers. It continuously monitors input/output voltage and current via its integrated 10-bit ADC, computes the optimal operating point, and generates four synchronized PWM signals to drive a 4-switch buck-boost converter - all without requiring an external microcontroller. Its Panel Mode feature further enhances efficiency by bypassing the converter when input and output voltages align closely.
How does the SM72445MT/NOPB implement Panel Mode, and what are the configuration options?
The SM72445MT/NOPB implements Panel Mode either by pulling the PM pin low or automatically when the input-to-output voltage ratio approaches unity. Configuration is determined by the voltage applied to pin A2: values near 3.44 V or 2.81 V select H-bridge-based Panel Mode (converter continues switching at half frequency), while values near 4.69 V or 4.06 V select dedicated-FET Panel Mode (PM_OUT outputs 440 kHz square wave to drive external bypass FET). The SM72445MT/NOPB datasheet Table 1 specifies exact A2 thresholds and corresponding behaviors.
Can the SM72445MT/NOPB operate without external resistors for configuration, and how is runtime tuning achieved?
Yes - the SM72445MT/NOPB supports both resistor-based startup configuration (via A0–A6 pins) and full runtime tuning via its I²C interface. Registers reg0–reg5 allow dynamic adjustment of vout_max, iout_max, dead time (tdon/tdoff), MPPT thresholds, and ADC offsets without changing external components or resetting the device. This dual-mode flexibility makes the SM72445MT/NOPB suitable for both fixed-function deployments and adaptive systems requiring field updates.
What protection features are integrated into the SM72445MT/NOPB, and how are they enforced?
The SM72445MT/NOPB integrates output overvoltage protection (enforced during MPPT operation only, based on A0-set threshold), overcurrent protection (triggered when AIOUT voltage exceeds A4-set level), and hard reset capability (via RST pin). These protections operate autonomously in hardware - no firmware or external components are needed. However, the datasheet clarifies that overvoltage protection is inactive during Panel Mode or Stand-by, so external clamping remains necessary for full-system safety.
What are the recommended PCB layout practices for the SM72445MT/NOPB to ensure accurate ADC performance?
To ensure accurate ADC performance, the SM72445MT/NOPB requires strict separation of analog and digital sections: VSSA and VSSD must be connected at a single point near the device, AVIN/AIIN/AVOUT/AIOUT traces must be kept short and away from noisy digital lines, and each analog input should be driven by a source impedance <100 Ω. Additionally, VDDA must be decoupled with both 1 µF and 0.1 µF ceramic capacitors placed close to pins 12 and 13, and the TSSOP-28 thermal pad must be solidly connected to a large copper pour for thermal stability.
SM72445MT/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SolarMagic™
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Applications:
- Controller, Photovoltaic Solar Panels
- Voltage - Input:
- 4.75V ~ 5.25V
- Number of Outputs:
- 1
- Voltage - Output:
- -
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSSOP
SM72445MT/NOPB FAQ
1.How can I place an order for SM72445MT/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for SM72445MT/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SM72445MT/NOPB reliable?
The price and inventory of SM72445MT/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SM72445MT/NOPB is usually 5 days.
3.What payment methods are accepted for SM72445MT/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SM72445MT/NOPB transactions.
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4.How is shipping managed for SM72445MT/NOPB?
SM72445MT/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SM72445MT/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SM72445MT/NOPB?
For technical support, including SM72445MT/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SM72445MT/NOPB requirements.
6.How does Aetrix verify that SM72445MT/NOPB is sourced from the original manufacturer or authorized distributors?
All SM72445MT/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SM72445MT/NOPB meets industry standards.
7.What is the process for return or replacement of SM72445MT/NOPB?
All SM72445MT/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with SM72445MT/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SM72445MT/NOPB part is unused and in its original packaging.
Return procedure for SM72445MT/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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