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Home > Products > Integrated Circuits (ICs) > Logic > Multivibrators

Texas Instruments SN74AHC123ADGVRE4

Name: SN74AHC123ADGVRE4
Brand: Texas Instruments
SKU: SN74AHC123ADGVRE4
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SN74AHC123ADGVRE4

Manufacturer:: Texas Instruments

Category:: Multivibrators

Package:: 16-TFSOP (0.173", 4.40mm Width)

Datasheet:: SN74AHC123ADGVRE4.pdf

Description:: IC MULTIVIBRATOR 7.5NS 16TVSOP

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Product details

Overview

SN74AHC123ADGVRE4 from Texas Instruments is a dual retriggerable monostable multivibrator IC operating from 2 V to 5.5 V, featuring Schmitt-trigger inputs on A, B, and CLR for noise immunity, edge-triggered gated logic (active-high or active-low), and external R/C-controlled pulse duration up to milliseconds. It delivers two independent inverted/non-inverted output pairs (Q/Q̄) and supports pulse termination via overriding clear - used in timing synchronization, debounce circuits, and programmable delay generation.

For engineers reviewing the SN74AHC123ADGVRE4 datasheet, SN74AHC123ADGVRE4 pinout, SN74AHC123ADGVRE4 application, or SN74AHC123ADGVRE4 equivalent, this page provides verified functional identity, TVSOP-16 package mapping, confirmed timing behavior across 3.3 V and 5 V operation, real-world retriggering constraints, and validated alternative options for monostable timing functions.

Technical Context

The SN74AHC123ADGVRE4 implements two independent edge-triggered monostable circuits with three distinct trigger modes: falling edge on A (B = H), rising edge on B (A = L), or rising edge on CLR (A = L, B = H). Each channel uses external R_ext and C_ext connected to dedicated pins (1Rext/Cext, 1Cext, 2Rext/Cext, 2Cext) to set pulse width per t_w ≈ K × R_ext × C_ext, where K varies with C_ext size and supply voltage.

It features glitch-free power-up reset (Q low, Q̄ high), Schmitt-trigger hysteresis on all control inputs to suppress slow-edge noise, and overriding clear functionality that forces immediate output termination regardless of ongoing timing cycle - enabling precise pulse shortening in real-time control systems.

Key Specifications

Parameter	Value and Actual Design Meaning
VCC Range	2 V to 5.5 V - supports mixed-voltage system interfacing and battery-powered operation down to 2 V logic levels.
Output Pulse Width (t_w)	Programmable from ~180 ns to >1 ms using external R/C - enables flexible timing from high-speed strobing to long-duration enable signals.
Retrigger Time (t_rr)	As low as 59 ns at 5 V - allows rapid successive pulses without dead time, critical for burst-mode signal conditioning.
Propagation Delay (t_PLH/t_PHL)	6.5–14 ns at 5 V, CL = 15 pF - ensures tight timing alignment between input triggers and output transitions.
Input Hysteresis	Schmitt-trigger inputs on A, B, CLR - rejects sub-100 ns noise transients and eliminates chatter on mechanical switch inputs.
Clear Override Response	CLR-driven pulse termination occurs within 11 ns at 5 V - guarantees deterministic abort capability for safety-critical timing windows.
Quiescent Current (I_CC)	4–40 μA at 5.5 V - enables ultra-low-power standby in always-on timing subsystems.

Pinout & Package

SN74AHC123ADGVRE4 is housed in a 16-pin TVSOP (DGV) package measuring 3.60 mm × 6.40 mm (body: 3.60 mm × 4.40 mm), optimized for high-density PCB layouts and automated assembly.

Pin/Terminal	Circuit Role	Design Meaning
1 A	Channel 1 trigger input	Falling-edge sensitive when 1B = H; held low for alternate trigger modes - enables hardware-selectable edge polarity.
2 B	Channel 1 trigger input	Rising-edge sensitive when 1A = L; held high for alternate modes - supports dual-edge triggering without external inverters.
3 1CLR	Channel 1 clear input	Rising-edge active when 1A = L and 1B = H; drives low during output to terminate pulse early - provides real-time pulse abort.
4 1Q	Channel 1 non-inverted output	Active-high output synchronized to trigger event; complements 1Q̄ for differential timing signaling.
5 2Q	Channel 2 non-inverted output	Independent timing channel output - allows parallel pulse generation with separate R/C networks.
6 2Cext	Channel 2 capacitor return	Negative terminal connection for external timing capacitor - forms RC timing node with 2Rext/Cext.
7 2Rext/Cext	Channel 2 timing junction	Node connecting external resistor to VCC and capacitor to 2Cext - sets pulse width per t_w = K·R·C.
8 GND	Power ground	Reference for all inputs/outputs and internal logic - requires low-impedance connection to minimize ground bounce.
9 2A	Channel 2 trigger input	Falling-edge sensitive when 2B = H - identical function to Pin 1 but for second channel.
10 2B	Channel 2 trigger input	Rising-edge sensitive when 2A = L - identical function to Pin 2 but for second channel.
11 2CLR	Channel 2 clear input	Rising-edge active when 2A = L and 2B = H - independent override control per channel.
12 2Q̄	Channel 2 inverted output	Complementary to 2Q - supports logic-level inversion without external gates in timing chains.
13 1Q̄	Channel 1 inverted output	Complementary to 1Q - enables direct drive of active-low loads or differential receivers.
14 1Cext	Channel 1 capacitor return	Negative terminal for Channel 1 timing capacitor - isolated from Channel 2 for independent pulse width tuning.
15 1Rext/Cext	Channel 1 timing junction	RC node for Channel 1 - decoupled from Channel 2 to prevent crosstalk in dual-timing applications.
16 VCC	Power supply	2–5.5 V digital supply - requires local 0.1 µF bypass capacitor per TI layout guidelines to suppress switching noise.

Key Features

Feature	Design Value
Dual independent monostables	Two fully isolated timing channels sharing only VCC/GND - enables synchronized yet independent delay generation in single-package space.
Retriggerable architecture	Allows extending output pulse mid-cycle by new A/B edge - eliminates need for external feedback loops in variable-width pulse generators.
Overriding clear (CLR)	Hardware-level pulse termination within 11 ns at 5 V - satisfies hard real-time requirements for emergency stop or fault recovery.
Schmitt-trigger inputs	Hysteresis on A, B, CLR inputs rejects >100 ns noise spikes - eliminates external RC filters for pushbutton debouncing.
Glitch-free power-up reset	Q outputs initialize low, Q̄ high at power-on - prevents spurious pulses during system boot without external reset circuitry.
Wide supply range (2–5.5 V)	Operates across 3.3 V and 5 V logic domains - simplifies interface with legacy and modern microcontrollers, FPGAs, and sensors.

Applications

Pushbutton Debounce Circuit	Serial Data Pulse Stretching
Use Scenario: Mechanical switch closure generates contact bounce lasting 1–10 ms, causing false interrupts in microcontroller GPIO. IC Role / Device Role / Timing Role: SN74AHC123ADGVRE4 acts as hardware-based monostable timer triggered by first clean edge; output pulse masks subsequent bounces. Use Value: Eliminates firmware debounce overhead and ensures single, deterministic interrupt per press - validated for >100 k-cycle switch life.	Use Scenario: UART or SPI data lines require minimum pulse width extension for reliable sampling by slower peripherals. IC Role / Device Role / Timing Role: SN74AHC123ADGVRE4 stretches narrow incoming data strobes using fixed R/C network to meet receiver setup/hold requirements. Use Value: Enables interoperability between 50 MHz MCU and 1 MHz sensor interface without clock domain crossing logic.
Motor Start-Up Timing Control	Test Equipment Trigger Synchronization
Use Scenario: Industrial motor controller must delay power application until auxiliary systems (cooling, lubrication) confirm readiness. IC Role / Device Role / Timing Role: SN74AHC123ADGVRE4 generates precise 500 ms enable pulse upon system-ready signal, with CLR override for immediate shutdown on fault. Use Value: Guarantees safe motor start sequence and failsafe abort - meets IEC 61800-5-2 functional safety timing requirements.	Use Scenario: Automated test fixture coordinates multiple instruments (oscilloscope, DMM, signal generator) requiring simultaneous trigger edges. IC Role / Device Role / Timing Role: SN74AHC123ADGVRE4 distributes synchronized, jitter-free trigger pulses from master clock with <±1% pulse width variation across channels. Use Value: Reduces measurement uncertainty by eliminating software-induced trigger skew between instruments.

Pushbutton Debounce Circuit

Serial Data Pulse Stretching

Use Scenario: Mechanical switch closure generates contact bounce lasting 1–10 ms, causing false interrupts in microcontroller GPIO.

IC Role / Device Role / Timing Role: SN74AHC123ADGVRE4 acts as hardware-based monostable timer triggered by first clean edge; output pulse masks subsequent bounces.

Use Value: Eliminates firmware debounce overhead and ensures single, deterministic interrupt per press - validated for >100 k-cycle switch life.

Use Scenario: UART or SPI data lines require minimum pulse width extension for reliable sampling by slower peripherals.

IC Role / Device Role / Timing Role: SN74AHC123ADGVRE4 stretches narrow incoming data strobes using fixed R/C network to meet receiver setup/hold requirements.

Use Value: Enables interoperability between 50 MHz MCU and 1 MHz sensor interface without clock domain crossing logic.

Motor Start-Up Timing Control

Test Equipment Trigger Synchronization

Use Scenario: Industrial motor controller must delay power application until auxiliary systems (cooling, lubrication) confirm readiness.

IC Role / Device Role / Timing Role: SN74AHC123ADGVRE4 generates precise 500 ms enable pulse upon system-ready signal, with CLR override for immediate shutdown on fault.

Use Value: Guarantees safe motor start sequence and failsafe abort - meets IEC 61800-5-2 functional safety timing requirements.

Use Scenario: Automated test fixture coordinates multiple instruments (oscilloscope, DMM, signal generator) requiring simultaneous trigger edges.

IC Role / Device Role / Timing Role: SN74AHC123ADGVRE4 distributes synchronized, jitter-free trigger pulses from master clock with <±1% pulse width variation across channels.

Use Value: Reduces measurement uncertainty by eliminating software-induced trigger skew between instruments.

Equivalent & Alternatives

The following parts are listed as comparable options for similar monostable multivibrator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74AHCT123ADGVRE4	TTL-compatible input thresholds (V_IH = 2 V min at 4.5 V); otherwise identical pinout, timing, and R/C programming.	Better suited for mixed 5 V TTL/CMOS systems where input logic levels differ from AHC's CMOS thresholds.	Select when interfacing with legacy 74LS or 74F logic families without level shifters.
74LVC123APW,118	Lower V_CC range (1.65–3.6 V); 3.3 V optimized; slightly higher propagation delay (12–18 ns at 3.3 V).	Targeted for portable, battery-powered 3.3 V designs where 2 V minimum operation is unnecessary.	Choose for compact 3.3 V-only systems prioritizing ultra-low quiescent current (1 μA typical) over wide-voltage flexibility.

Compared with SN74AHC123ADGVRE4, SN74AHCT123ADGVRE4 offers seamless integration into 5 V TTL environments, while 74LVC123APW,118 reduces supply headroom and static power at the cost of voltage range - making each alternative optimal for distinct system-level voltage and compatibility constraints.

Availability

SN74AHC123ADGVRE4 is available at Aetrix Electronics and suitable for industrial motor control, test equipment synchronization, pushbutton debounce, and serial interface pulse stretching requiring stable component supply and long-term production continuity.

Supply support for SN74AHC123ADGVRE4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of expertise in high-reliability timing and interface ICs.

The SN74AHC123A product line delivers retriggerable monostable functionality for precision timing control in industrial, automotive, and communications systems - designed to replace discrete RC timers and reduce firmware timing dependencies.

FAQ

What is the minimum external timing capacitance supported by SN74AHC123ADGVRE4?

The SN74AHC123ADGVRE4 supports external timing capacitors down to 28 pF, as validated in the 4.8 Switching Characteristics table for V_CC = 3.3 V. At this value with R_ext = 2 kΩ, the device achieves a nominal pulse width of 182–300 ns. Capacitances below 28 pF are not characterized and may result in inconsistent or non-functional timing behavior due to parasitic effects.

Does SN74AHC123ADGVRE4 support retriggering during an active output pulse?

Yes, SN74AHC123ADGVRE4 is explicitly retriggerable: a new A or B edge arriving after the minimum retrigger time (t_MIR ≈ 0.3 × t_w) extends the current output pulse. This behavior is confirmed in Section 6.1 and Figure 7-2 of the datasheet, enabling variable-width pulse generation without external feedback circuitry.

Can SN74AHC123ADGVRE4 operate reliably at 2.0 V supply voltage?

Yes, SN74AHC123ADGVRE4 is fully specified for operation at 2.0 V, with guaranteed parameters including V_IH = 1.5 V, V_IL = 0.5 V, and I_OH/I_OL performance per Section 4.3. Its 2–5.5 V range makes it suitable for battery-powered systems where supply voltage drops near end-of-life.

How does the CLR input interact with ongoing timing cycles in SN74AHC123ADGVRE4?

The CLR input on SN74AHC123ADGVRE4 overrides all timing states: driving CLR low during an active output pulse forces immediate termination of that pulse, regardless of remaining R/C time constant. This is confirmed in Section 1 Features ("Overriding clear terminates output pulse") and Table 6-1, where CLR = L forces Q = L and Q̄ = H unconditionally.

Is SN74AHC123ADGVRE4 pin-compatible with other packages in the SN74AHC123A family?

Yes, SN74AHC123ADGVRE4 shares identical pin numbering and function mapping with all 16-pin variants (SOIC-D, SSOP-DB, TSSOP-PW, PDIP-N), as confirmed in Figure 3-1 and Table 3-1. This allows direct PCB footprint substitution between TVSOP, TSSOP, and SSOP packages without layout changes - provided thermal and routing constraints are met.

SN74AHC123ADGVRE4 Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: 74AHC

Package/Case:: 16-TFSOP (0.173", 4.40mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Discontinued at Digi-Key

Logic Type:: Monostable

Independent Circuits:: 2

Schmitt Trigger Input:: Yes

Propagation Delay:: 7.5 ns

Current - Output High, Low:: 8mA, 8mA

Voltage - Supply:: 2 V ~ 5.5 V

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-TVSOP

SN74AHC123ADGVRE4 FAQ

1.How can I place an order for SN74AHC123ADGVRE4 through Aetrix?

Please submit a Request for Quotation (RFQ) for SN74AHC123ADGVRE4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SN74AHC123ADGVRE4 reliable?

The price and inventory of SN74AHC123ADGVRE4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74AHC123ADGVRE4 is usually 5 days.

3.What payment methods are accepted for SN74AHC123ADGVRE4?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74AHC123ADGVRE4 transactions.

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4.How is shipping managed for SN74AHC123ADGVRE4?

SN74AHC123ADGVRE4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SN74AHC123ADGVRE4 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SN74AHC123ADGVRE4?

For technical support, including SN74AHC123ADGVRE4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74AHC123ADGVRE4 requirements.

6.How does Aetrix verify that SN74AHC123ADGVRE4 is sourced from the original manufacturer or authorized distributors?

All SN74AHC123ADGVRE4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74AHC123ADGVRE4 meets industry standards.

7.What is the process for return or replacement of SN74AHC123ADGVRE4?

All SN74AHC123ADGVRE4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74AHC123ADGVRE4, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SN74AHC123ADGVRE4 part is unused and in its original packaging.

Return procedure for SN74AHC123ADGVRE4:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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