Texas Instruments SN74AHC138DRE4
- Part No.:
- SN74AHC138DRE4
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74AHC138DRE4.pdf
- Description:
- IC DECODER/DEMUX 1X3:8 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,645
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74AHC138DRE4 from Texas Instruments is a 3-line to 8-line decoder/demultiplexer in SOIC-16 package, operating from 2 V to 5.5 V, with propagation delays as low as 5.7 ns at 5 V and ±8 mA output drive capability. It features three enable inputs (two active-low, one active-high) for cascading and demultiplexing, and is designed for high-speed memory decoding and data-routing systems.
For engineers reviewing the SN74AHC138DRE4 datasheet, SN74AHC138DRE4 pinout, SN74AHC138DRE4 application, or SN74AHC138DRE4 equivalent, this page delivers verified electrical specs, functional truth table behavior, thermal resistance (93.8°C/W), ESD ratings (2000V HBM), and real-world use cases in address decoding and I/O expansion.
Technical Context
The SN74AHC138DRE4 implements positive-logic binary decoding with three address inputs (A0–A2) and three enable inputs (G1, G2A, G2B) that collectively determine which of eight outputs (Y0–Y7) is asserted low. Its enable architecture allows direct cascade of multiple units without external inverters - e.g., a 24-line decoder requires no added logic, while a 32-line implementation needs only one inverter.
Internally, it uses advanced CMOS AHC technology delivering rail-to-rail output swing, low static current (≤40 µA at 5.5 V), and input thresholds scaled to VCC (VIH = 0.7×VCC, VIL = 0.3×VCC). Switching performance is characterized at both 3.3 V and 5 V, with load-dependent delays specified for CL = 15 pF and 50 pF.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2 V to 5.5 V - supports mixed-voltage system interfacing and legacy 5 V TTL compatibility |
| Propagation Delay (tPLH/tPHL) | 5.7 ns max at VCC = 5 V, CL = 15 pF - enables sub-100 MHz address decoding in memory subsystems |
| Output Drive | ±8 mA at VCC = 5 V - sufficient to directly drive multiple 74AHC inputs or small LED loads without buffers |
| Input Thresholds | VIH = 3.85 V, VIL = 1.65 V at VCC = 5.5 V - ensures noise margin >0.8 V under worst-case conditions |
| ESD Rating | 2000 V HBM - meets industrial handling requirements without special ESD controls during assembly |
| Thermal Resistance (RθJA) | 93.8°C/W (SOIC-16) - limits junction temperature rise to ≤94°C at 100 mW dissipation in still air |
| Power Dissipation Cap. | 13 pF - determines dynamic power consumption at 1 MHz clocking (P = Cpd × V² × f ≈ 0.33 mW @ 5 V) |
Pinout & Package
SN74AHC138DRE4 is housed in a 16-pin SOIC (D) package measuring 9.9 mm × 6.0 mm (body), with standard 1.27 mm lead pitch and 2.00 mm max height. The thermal pad is absent - this is a surface-mount plastic package with gull-wing leads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0, A1, A2 | Binary address inputs | Select one of eight outputs; logic levels interpreted as LSB→MSB (A0 = 2⁰) |
| G1 | Active-high enable | Must be HIGH for any output to activate; used as primary global enable |
| G2A, G2B | Active-low enables | Both must be LOW for decode operation; G2B is inverted internally for simplified cascading |
| Y0–Y7 | Active-low decoded outputs | Only one output goes LOW per valid address/enable combination; all others remain HIGH |
| VCC, GND | Power supply terminals | Decoupling capacitor (0.1 µF ceramic) required within 5 mm of VCC pin for stable switching |
Key Features
| Feature | Design Value |
|---|---|
| Three enable inputs | Enables hierarchical decoding: two devices can be stacked for 4-to-16 decoding with zero external logic |
| High-speed AHC logic | Delivers 5.7 ns propagation delay at 5 V - faster than standard HC by >2×, critical for tight memory timing budgets |
| Latch-up immunity | Exceeds 250 mA per JESD17 - prevents destructive latch-up during transient overvoltage events |
| Wide VCC range | Operates from 2 V (battery-backed logic) to 5.5 V (industrial 5 V rails) without level shifters |
| CMOS input structure | Input leakage ≤±1 µA - allows direct connection to microcontroller GPIO without pull-up/down resistors |
Applications
| Memory Address Decoding | I/O Port Expansion |
|---|---|
Use Scenario: Selecting one of eight memory banks in a microcontroller-based embedded system with 24-bit address space. IC Role / Device Role / Timing Role: Address decoder that asserts chip-select (CS) signals for SRAM, Flash, or peripheral ICs based on upper address bits. Use Value: Reduces FPGA or MCU pin count by offloading address decoding; enables deterministic <10 ns CS assertion timing across all banks. | Use Scenario: Expanding GPIO count on an ARM Cortex-M0+ MCU with limited native I/O for sensor interface and LED control. IC Role / Device Role / Timing Role: Demultiplexer converting 3-bit port select lines into eight independent enable outputs for peripheral drivers. Use Value: Eliminates need for discrete transistors or shift registers; provides simultaneous, glitch-free activation of up to eight peripherals. |
| Bus Multiplexing | Industrial Control Logic |
Use Scenario: Routing UART, SPI, or I²C signals between multiple sensors and a single host controller in a modular PLC backplane. IC Role / Device Role / Timing Role: Signal path selector using enable inputs as bus arbitration lines and address inputs as channel ID. Use Value: Achieves <10 ns signal path skew between channels - essential for synchronous multi-sensor sampling. | Use Scenario: Implementing safety-critical interlock logic in motor control panels where outputs must respond within defined time windows. IC Role / Device Role / Timing Role: Combinational logic element generating fault-enable signals for contactors and relays based on sensor fusion inputs. Use Value: Guarantees worst-case response latency ≤15 ns - satisfies SIL-2 timing constraints for Category 3 safety functions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar decoder/demultiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC138DR | Slower propagation delay (21 ns @ 5 V), lower drive (±4 mA), wider VCC range (2–6 V) | Suitable for cost-sensitive, non-timing-critical systems; higher noise immunity due to HC hysteresis | Choose when budget constraints outweigh speed requirements and system noise exceeds 1 Vpp |
| 74LVC138AD,118 | Lower VCC range (1.65–3.6 V), faster tPD (4.2 ns @ 3.3 V), smaller TSSOP-16 package | Optimized for 3.3 V-only portable electronics; incompatible with 5 V logic without level translation | Prefer for battery-powered designs requiring minimal board area and sub-5 ns timing at 3.3 V |
Compared with SN74HC138DR and 74LVC138AD,118, the SN74AHC138DRE4 uniquely balances 5 V compatibility, sub-6 ns speed, and industrial-grade ESD/latch-up robustness - making it the optimal choice for mixed-voltage industrial controllers where reliability and timing coexist.
Availability
SN74AHC138DRE4 is available at Aetrix Electronics and suitable for memory address decoding, I/O expansion, bus multiplexing, and industrial control logic requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for SN74AHC138DRE4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions with over 50 years of innovation in high-reliability digital ICs.
The SN74AHC138DRE4 belongs to TI's AHC logic family, engineered for high-speed, low-power decoding in memory systems and data-routing applications where propagation delay and noise immunity are critical design parameters.
FAQ
What is the maximum clock frequency supported by SN74AHC138DRE4 in demultiplexer mode?
The SN74AHC138DRE4 does not operate on a clock; it is combinational logic. Its usable switching frequency depends on propagation delay and system setup/hold timing. With 5.7 ns tPD at 5 V and 15 pF load, it reliably supports address/data strobe rates up to ~80 MHz in memory decode paths, assuming proper PCB layout and termination.
Can SN74AHC138DRE4 drive LEDs directly?
Yes - SN74AHC138DRE4 can sink up to 8 mA per output at 5 V, sufficient to illuminate standard 2 mA indicator LEDs with a 330 Ω series resistor. For higher-current LEDs (>8 mA), an external transistor driver is required to avoid exceeding absolute maximum ratings.
Is SN74AHC138DRE4 pin-compatible with SN74HC138?
Yes - SN74AHC138DRE4 and SN74HC138 share identical SOIC-16 pinout, function table, and terminal assignments. However, SN74AHC138DRE4 offers faster speed, lower input current, and tighter voltage thresholds, so direct substitution is electrically safe but may require timing validation in legacy HC designs.
What is the purpose of the G2B pin on SN74AHC138DRE4?
G2B is an active-low enable input that is internally inverted before reaching the decode logic. This allows cascading two SN74AHC138DRE4 devices to create a 4-to-16 decoder using only address lines - no external inverter needed - because G2B's inversion matches the polarity required for second-stage enable control.
Does SN74AHC138DRE4 require external pull-up resistors on its outputs?
No - SN74AHC138DRE4 has push-pull outputs capable of actively driving HIGH (VOH ≥ 4.4 V at 5 V) and LOW (VOL ≤ 0.36 V). Pull-ups are unnecessary unless open-drain emulation or wired-OR bus topology is specifically required, which this device does not support natively.
SN74AHC138DRE4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74AHC
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 8mA, 8mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SN74AHC138DRE4 FAQ
1.How can I place an order for SN74AHC138DRE4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74AHC138DRE4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74AHC138DRE4 reliable?
The price and inventory of SN74AHC138DRE4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74AHC138DRE4 is usually 5 days.
3.What payment methods are accepted for SN74AHC138DRE4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74AHC138DRE4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74AHC138DRE4?
SN74AHC138DRE4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74AHC138DRE4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74AHC138DRE4?
For technical support, including SN74AHC138DRE4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74AHC138DRE4 requirements.
6.How does Aetrix verify that SN74AHC138DRE4 is sourced from the original manufacturer or authorized distributors?
All SN74AHC138DRE4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74AHC138DRE4 meets industry standards.
7.What is the process for return or replacement of SN74AHC138DRE4?
All SN74AHC138DRE4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74AHC138DRE4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74AHC138DRE4 part is unused and in its original packaging.
Return procedure for SN74AHC138DRE4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74AHC138DRE4 Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
