Texas Instruments SN74AHC367D
- Part No.:
- SN74AHC367D
- Manufacturer:
- Texas Instruments
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74AHC367D.pdf
- Description:
- IC BUF NON-INVERT 5.5V 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:938
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Product details
Overview
SN74AHC367D from Texas Instruments is a hex noninverting buffer/line driver with 3-state outputs, designed for 2V–5.5V operation in bus interface and signal routing applications. It features dual independent output-enable controls (1OE, 2OE), ±8 mA drive strength at 5 V, 16-pin SOIC package, and operates across –40°C to +85°C.
For engineers reviewing the SN74AHC367D datasheet, SN74AHC367D pinout, SN74AHC367D application, or SN74AHC367D equivalent, this page delivers verified electrical specs, functional mode behavior, real-world timing performance at 3.3 V and 5 V, thermal resistance data, and precise pin-level circuit role mapping - all confirmed against TI's SCLS424G production datasheet (Rev. G, July 2024).
Technical Context
The SN74AHC367D implements six independent noninverting buffers grouped into two functional blocks: three buffers per side (1A1–1Y3 and 2A1–2Y2), each controlled by its own active-low enable (1OE, 2OE). Outputs enter high-impedance state when OE is high, enabling bidirectional bus control without external logic.
Its AHC logic family ensures CMOS-compatible input thresholds, rail-to-rail output swing, and propagation delays as low as 3.4 ns (tPLH, 5 V, CL = 15 pF). Input transition rate tolerance (20 ns/V at 5 V) and latch-up immunity (>100 mA per JESD78 Class II) support robust operation in mixed-voltage industrial systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2 V to 5.5 V - supports direct interfacing between 2.5 V, 3.3 V, and 5 V logic domains without level shifters. |
| IOH/IOL Drive | –8 mA / +8 mA at 5 V - sufficient to directly drive LEDs, TTL inputs, or short PCB traces without external buffers. |
| tPLH/tPHL | 3.4 ns min (5 V, CL = 15 pF) - enables reliable operation in sub-100 MHz digital control paths. |
| VIH/VIL Thresholds | 3.85 V max VIH / 1.65 V min VIL at 5.5 V VCC - ensures noise margin >0.7 V under worst-case supply and temperature. |
| ICC Quiescent Current | 4 µA typical (5.5 V) - suitable for low-power standby modes in battery-backed or energy-conscious designs. |
| RθJA | 73 °C/W (SOIC-16) - allows sustained 100 mW dissipation at TA = 85°C with minimal heatsinking. |
| ESD Rating | ±2000 V HBM - meets IEC 61000-4-2 Level 2 for handling in standard assembly environments. |
Pinout & Package
SN74AHC367D uses a 16-pin SOIC (D) package measuring 9.9 mm × 6.0 mm (body: 9.9 mm × 3.9 mm), with gull-wing leads and 1.27 mm pitch. Pin 1 is marked by a beveled corner or index area.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 15 | 1OE, 2OE | Active-low output enable inputs - tie high via pullup to ensure high-Z during power-up; control group isolation. |
| 2, 4, 6, 10, 12, 14 | 1A1–1A4, 2A1–2A2 | Buffer input pins - accept CMOS-level signals; must be tied to VCC or GND if unused to prevent floating. |
| 3, 5, 7, 9, 11, 13 | 1Y1–1Y4, 2Y1–2Y2 | Noninverting 3-state outputs - present A-input logic when OE is low; high-Z otherwise for bus sharing. |
| 8 | GND | Ground reference - connect to system ground plane with low-inductance path to minimize switching noise. |
| 16 | VCC | Power supply - bypass with 0.1 µF ceramic capacitor placed <2 mm from pin to suppress supply transients. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (2–5.5 V) | Enables single-bom reuse across 2.5 V, 3.3 V, and 5 V subsystems without redesign. |
| Dual independent 3-state enables | Allows selective activation of two 3-buffer groups - ideal for multiplexing address/data lines onto shared buses. |
| Low ICC quiescent current | Reduces system standby power - critical for always-on controllers and IoT edge nodes. |
| High noise immunity (20 ns/V input slew) | Rejects slow-rising signals and EMI-induced glitches on long traces or unshielded cables. |
| Latch-up immunity >100 mA | Prevents destructive failure during hot-plug events or transient overvoltage conditions. |
Applications
| Industrial PLC I/O Expansion | Automotive Body Control Module |
|---|---|
Use Scenario: Expanding discrete input/output capacity in programmable logic controllers using shared backplane buses. IC Role / Device Role / Timing Role: Buffers sensor status signals and drives relay coil drivers while isolating microcontroller GPIOs from bus noise. Use Value: Enables 6-channel parallel data transfer with <10 ns skew between channels and guaranteed high-Z isolation during firmware updates. | Use Scenario: Controlling LED indicators and solenoid drivers in vehicle door modules with mixed 3.3 V MCU and 5 V actuator supplies. IC Role / Device Role / Timing Role: Level-translating and buffering MCU GPIOs to drive 5 V indicator LEDs and 12 V-compatible optocoupler inputs. Use Value: Eliminates need for discrete level shifters; ±8 mA drive directly lights standard 20 mA LEDs at full brightness. |
| Medical Diagnostic Equipment Backplane | Test & Measurement Instrumentation |
Use Scenario: Routing analog front-end calibration signals and digital control lines across modular instrument chassis. IC Role / Device Role / Timing Role: Isolating ADC reference voltage monitoring lines and enabling/disabling DAC output paths via 3-state control. Use Value: Prevents signal corruption during module hot-swap; 73 °C/W RθJA supports continuous operation in sealed enclosures. | Use Scenario: Managing signal routing between FPGA-based pattern generators and DUT interface boards in automated test systems. IC Role / Device Role / Timing Role: Driving multiple DUT control lines simultaneously while supporting dynamic reconfiguration via OE pins. Use Value: Achieves <5 ns inter-channel skew and supports 100+ million cycles of enable/disable toggling without degradation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar hex buffer with 3-state output applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74AHCT367D | TTL-compatible input thresholds (VIH = 2 V min at 4.5 V); identical pinout and drive strength. | Better suited for legacy 5 V TTL system integration where AHC's higher VIH may cause marginal recognition. | Select SN74AHCT367D only when interfacing with older 74LS/74F logic families requiring lower VIH. |
| 74LVC244APW | Octal (8-channel) configuration; 3.3 V only (1.65–3.6 V); 24 mA drive; TSSOP-20 package. | Higher channel count and drive for dense 3.3 V-only PCB layouts; not drop-in compatible due to pin count and voltage range. | Choose 74LVC244APW when expanding to 8 signals and operating exclusively at 3.3 V with higher fanout requirements. |
Compared with SN74AHC367D, SN74AHCT367D offers TTL input compatibility at the cost of reduced noise margin, while 74LVC244APW provides double the channel count and higher drive but requires board redesign and restricts VCC to 3.3 V systems.
Availability
SN74AHC367D is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, automotive body control modules, and medical diagnostic equipment backplanes requiring stable component supply across extended product lifecycles.
Supply support for SN74AHC367D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and personal electronics markets.
The SN74AHC367D belongs to TI's advanced high-speed CMOS (AHC) logic family, engineered for low-power, high-noise-immunity bus interface and signal conditioning in mixed-voltage embedded systems.
FAQ
What is the maximum recommended operating temperature for SN74AHC367D?
The SN74AHC367D is rated for continuous operation from –40°C to +85°C ambient temperature. Its thermal resistance (RθJA = 73 °C/W in SOIC) allows junction temperatures to remain within safe limits (<125°C) even at full load in 85°C environments, provided proper PCB copper area and airflow are maintained per TI's layout guidelines.
Can SN74AHC367D drive LEDs directly?
Yes, SN74AHC367D can drive standard 20 mA LEDs directly: at 5 V VCC, it sources/sinks up to 8 mA per output (IOL/IOH), sufficient for low-current indicator LEDs. For higher-brightness LEDs, use an external transistor stage. Always include a series current-limiting resistor calculated as R = (VCC − VLED)/IOUT, referencing the device's VOL/VOH specs at the target current.
Is SN74AHC367D pin-compatible with SN74LS367N?
No, SN74AHC367D is not pin-compatible with SN74LS367N. While both are hex buffers with 3-state outputs, SN74LS367N uses a 16-pin PDIP package with different pin assignments (e.g., OE pins located at pins 1 and 16 vs. SN74AHC367D's pins 1 and 15). Electrical incompatibility (TTL vs. CMOS thresholds, supply range) further prevents direct substitution.
How should unused inputs be handled on SN74AHC367D?
All unused inputs on SN74AHC367D must be tied to either VCC or GND - never left floating. Floating CMOS inputs cause increased ICC, unpredictable output states, and potential device malfunction. Tie unused A-inputs to GND for LOW or VCC for HIGH based on desired default output state; unused OE inputs should be tied to VCC to maintain outputs in high-impedance mode.
Does SN74AHC367D support hot-swap operation?
SN74AHC367D supports limited hot-swap capability due to its ±2000 V HBM ESD rating and latch-up immunity exceeding 100 mA per JESD78 Class II. However, TI does not guarantee full hot-swap robustness without external protection (e.g., series resistors, TVS diodes). For true hot-swap systems, implement current-limiting and voltage-ramp circuits per TI's application report SLVA615.
SN74AHC367D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74AHC
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 2, 4 (Hex)
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 8mA, 8mA
- Voltage - Supply:
- 2V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SN74AHC367D FAQ
1.How can I place an order for SN74AHC367D through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74AHC367D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74AHC367D reliable?
The price and inventory of SN74AHC367D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74AHC367D is usually 5 days.
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SN74AHC367D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74AHC367D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74AHC367D?
For technical support, including SN74AHC367D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74AHC367D requirements.
6.How does Aetrix verify that SN74AHC367D is sourced from the original manufacturer or authorized distributors?
All SN74AHC367D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74AHC367D meets industry standards.
7.What is the process for return or replacement of SN74AHC367D?
All SN74AHC367D units undergo pre-shipment inspection (PSI). If there is an issue with SN74AHC367D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74AHC367D part is unused and in its original packaging.
Return procedure for SN74AHC367D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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