Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Signal Switches, Multiplexers, Decoders

Texas Instruments SN74AHCT158DR

Name: SN74AHCT158DR
Brand: Texas Instruments
SKU: SN74AHCT158DR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: SN74AHCT158DR

Manufacturer:: Texas Instruments

Category:: Signal Switches, Multiplexers, Decoders

Package:: 16-SOIC (0.154", 3.90mm Width)

Datasheet:: SN74AHCT158DR.pdf

Description:: IC MULTIPLEXER 4 X 2:1 16SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:2,371

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

SN74AHCT158DR from Texas Instruments is a quadruple 2-line to 1-line data selector/multiplexer designed for 4.5-V to 5.5-V V_CC operation, featuring TTL-voltage-compatible inputs, a common strobe (G) input, inverted outputs, and 16-pin TSSOP packaging. It routes one of two 4-bit data sources to four outputs based on select control, used in digital logic routing and address/data path selection.

For engineers reviewing the SN74AHCT158DR datasheet, SN74AHCT158DR pinout, SN74AHCT158DR application, or SN74AHCT158DR equivalent, key selection criteria include its 5-V supply compatibility, 8-mA output drive capability, 7.5-ns typical propagation delay (CL = 15 pF), latch-up immunity (>250 mA), and ESD robustness (2000-V HBM).

Technical Context

The SN74AHCT158DR implements four independent 2:1 multiplexers with shared strobe (G) and select (A/B) inputs. Each channel selects between A or B inputs and drives an inverted output (Y), enabling synchronous 4-bit word routing under common control logic.

It operates strictly in the 4.5–5.5-V range with CMOS-level output swing and TTL-compatible input thresholds (V_IL = 0.8 V, V_IH = 2 V). All unused inputs must be tied to V_CC or GND per TI SCBA004 guidance to prevent floating-node instability.

Key Specifications

Parameter	Value and Actual Design Meaning
V_CC Range	4.5 V to 5.5 V - Ensures compatibility with standard 5-V TTL/CMOS systems without level-shifting.
Output Drive	±8 mA - Sufficient to directly drive multiple 74-series inputs or small capacitive loads (<15 pF).
t_PLH/t_PHL	1 ns to 7.5 ns (CL = 15 pF) - Supports >100-MHz toggle rates in critical timing paths.
Input Compatibility	TTL-voltage - Accepts standard 0.8 V / 2.0 V logic thresholds, eliminating need for external translators.
ESD Rating	2000-V HBM - Meets industrial-grade robustness requirements without added protection circuitry.
Latch-Up Immunity	>250 mA per JESD 17 - Guarantees fault tolerance during transient overcurrent events.

Pinout & Package

SN74AHCT158DR uses a 16-pin TSSOP package (PW) with 0.65-mm lead pitch, 4.4-mm body width, and 1.2-mm max height - optimized for high-density PCB layouts and automated assembly.

Pin/Terminal	Circuit Role	Design Meaning
1, 2, 4, 5, 9, 10, 12, 13	Data Inputs (1A, 1B, 2A, 2B, 3A, 3B, 4A, 4B)	Two independent 4-bit input buses; each pair feeds one multiplexer channel.
3, 6, 11, 14	Inverted Outputs (1Y, 2Y, 3Y, 4Y)	Active-low routed outputs - require external inversion if non-inverted logic is needed.
7	G (Strobe)	Global enable: high forces all Y outputs high; low enables data selection.
15	A/B (Select)	Common 1-bit select line determining whether A or B inputs pass to outputs.
8	GND	Power ground reference for all internal logic and I/O structures.
16	V_CC	Positive supply rail - must be decoupled locally with 0.1-µF ceramic capacitor.

Key Features

Feature	Design Value
Inverted Output Logic	Eliminates need for external inverters in active-low bus enable or chip-select applications.
Common Strobe (G) Control	Enables simultaneous disable of all four channels - critical for glitch-free bus arbitration.
TTL-Compatible Inputs	Direct interface with legacy 74LS/74F families without pull-ups or level shifters.
Low Propagation Delay	7.5 ns max (CL = 15 pF) supports tight setup/hold timing in 25-MHz+ synchronous designs.
High Noise Immunity	Dynamic VIH/VIL margins (2.0 V / 0.8 V) plus 0.8-V dynamic VOL(P) ensure reliable operation in noisy environments.

Applications

Microcontroller Address Decoding	Digital Test Equipment Signal Routing
Use Scenario: Selecting between two peripheral address spaces (e.g., RAM vs. I/O) using MCU address lines and control signals. IC Role / Device Role / Timing Role: Data selector that gates 4-bit address segments under A/B and G control to generate chip-enable signals. Use Value: Reduces glue logic count by consolidating four independent 2:1 selections into one compact IC with guaranteed timing correlation.	Use Scenario: Switching stimulus signals between DUT channels in automated test fixtures with synchronized pattern generation. IC Role / Device Role / Timing Role: Multiplexer providing deterministic, low-skew routing of 4-bit control words to multiple DUT interfaces. Use Value: Enables repeatable, strobe-synchronized signal switching with sub-10-ns channel-to-channel skew.
Industrial PLC I/O Expansion	Legacy Bus Arbitration Logic
Use Scenario: Managing dual-sourced sensor data streams (e.g., primary/backup analog front-ends) in real-time control modules. IC Role / Device Role / Timing Role: Selector routing 4-bit status or configuration words from redundant sensor interfaces to the main controller. Use Value: Provides failover-ready data path selection with hardware-level determinism-no software latency or interrupt dependency.	Use Scenario: Resolving contention between two master devices sharing a common 4-bit control bus in embedded backplane architectures. IC Role / Device Role / Timing Role: Strobe-gated multiplexer arbitrating which master's command word reaches the target peripheral. Use Value: Delivers hardware-enforced mutual exclusion with nanosecond-level response-critical for avoiding bus lockup.

Microcontroller Address Decoding

Digital Test Equipment Signal Routing

Use Scenario: Selecting between two peripheral address spaces (e.g., RAM vs. I/O) using MCU address lines and control signals.

IC Role / Device Role / Timing Role: Data selector that gates 4-bit address segments under A/B and G control to generate chip-enable signals.

Use Value: Reduces glue logic count by consolidating four independent 2:1 selections into one compact IC with guaranteed timing correlation.

Use Scenario: Switching stimulus signals between DUT channels in automated test fixtures with synchronized pattern generation.

IC Role / Device Role / Timing Role: Multiplexer providing deterministic, low-skew routing of 4-bit control words to multiple DUT interfaces.

Use Value: Enables repeatable, strobe-synchronized signal switching with sub-10-ns channel-to-channel skew.

Industrial PLC I/O Expansion

Legacy Bus Arbitration Logic

Use Scenario: Managing dual-sourced sensor data streams (e.g., primary/backup analog front-ends) in real-time control modules.

IC Role / Device Role / Timing Role: Selector routing 4-bit status or configuration words from redundant sensor interfaces to the main controller.

Use Value: Provides failover-ready data path selection with hardware-level determinism-no software latency or interrupt dependency.

Use Scenario: Resolving contention between two master devices sharing a common 4-bit control bus in embedded backplane architectures.

IC Role / Device Role / Timing Role: Strobe-gated multiplexer arbitrating which master's command word reaches the target peripheral.

Use Value: Delivers hardware-enforced mutual exclusion with nanosecond-level response-critical for avoiding bus lockup.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2:1 multiplexer applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74AHCT157DR	Non-inverting outputs; identical pinout and electrical specs except output polarity.	Required where active-high output logic is mandatory (e.g., direct connection to non-inverting latches).	Select SN74AHCT157DR only when output inversion would necessitate additional gate stages in the signal path.
74LVC157ADTR	Wider V_CC range (1.65–3.6 V); lower drive (±24 mA); different pinout; no strobe (G) input.	Suitable for mixed-voltage 3.3-V systems but lacks global disable - requires per-channel gating logic.	Choose 74LVC157ADTR only for 3.3-V designs where strobe functionality is implemented externally and space allows re-layout.

Compared with SN74AHCT158DR, SN74AHCT157DR offers functional equivalence with polarity reversal, while 74LVC157ADTR trades strobe control and 5-V compatibility for broader voltage support and higher drive - neither is pin-compatible, requiring PCB revision for substitution.

Availability

SN74AHCT158DR is available at Aetrix Electronics and suitable for industrial control systems, test instrumentation, and legacy 5-V digital logic upgrades requiring stable component supply, long-term obsolescence mitigation, and RoHS-compliant TSSOP packaging.

Supply support for SN74AHCT158DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a U.S.-based semiconductor company founded in 1930, specializing in analog, embedded processing, and logic solutions with broad industrial, automotive, and communications reach.

The SN74AHCT158DR belongs to TI's 74AHCT logic family - engineered for 5-V TTL-compatible operation with enhanced noise immunity and latch-up resistance, targeting industrial and legacy-system replacement applications.

FAQ

What is the operating voltage range for the SN74AHCT158DR?

The SN74AHCT158DR operates within a strict 4.5-V to 5.5-V V_CC range. Operation outside this window violates recommended conditions and may cause undefined logic states or increased ICC. The device is not rated for 3.3-V operation, and applying voltages below 4.5 V risks failure to meet VOH/VOL specifications across temperature.

Does the SN74AHCT158DR have a strobe (G) input, and how does it function?

Yes, the SN74AHCT158DR features a dedicated strobe (G) input on Pin 7. When G is high, all four Y outputs are forced high regardless of A/B or data inputs. When G is low, the device performs normal 2:1 selection based on the A/B state. This enables synchronized channel enable/disable - essential for glitch-free bus switching.

Are the outputs of the SN74AHCT158DR inverted, and what design impact does that have?

Yes, all outputs (1Y–4Y) of the SN74AHCT158DR are inverted. If non-inverted logic is required, an external inverter or logic-level adjustment is necessary. This inversion is inherent to the device architecture and cannot be disabled - it must be accounted for in upstream/downstream signal interpretation.

Can unused inputs on the SN74AHCT158DR be left floating?

No. Per TI application report SCBA004, all unused inputs on the SN74AHCT158DR must be tied to either V_CC or GND. Floating inputs can cause excessive ICC, erratic switching, or localized heating due to undefined CMOS gate states - especially problematic in high-reliability or thermally constrained designs.

What is the maximum capacitive load the SN74AHCT158DR can drive while maintaining specified timing?

The SN74AHCT158DR's switching characteristics are characterized up to 50 pF load capacitance. At CL = 50 pF, t_PLH/t_PHL increases to 12 ns (max) for A/B→Y paths. Driving >50 pF will further degrade propagation delay and may violate setup/hold windows in high-speed interfaces - external buffering is recommended beyond this limit.

SN74AHCT158DR Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: 74AHCT

Package/Case:: 16-SOIC (0.154", 3.90mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Type:: Multiplexer

Circuit:: 4 x 2:1

Independent Circuits:: 1

Current - Output High, Low:: 8mA, 8mA

Voltage Supply Source:: Single Supply

Voltage - Supply:: 4.5V ~ 5.5V

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-SOIC

SN74AHCT158DR FAQ

1.How can I place an order for SN74AHCT158DR through Aetrix?

Please submit a Request for Quotation (RFQ) for SN74AHCT158DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SN74AHCT158DR reliable?

The price and inventory of SN74AHCT158DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74AHCT158DR is usually 5 days.

3.What payment methods are accepted for SN74AHCT158DR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74AHCT158DR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SN74AHCT158DR?

SN74AHCT158DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SN74AHCT158DR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SN74AHCT158DR?

For technical support, including SN74AHCT158DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74AHCT158DR requirements.

6.How does Aetrix verify that SN74AHCT158DR is sourced from the original manufacturer or authorized distributors?

All SN74AHCT158DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74AHCT158DR meets industry standards.

7.What is the process for return or replacement of SN74AHCT158DR?

All SN74AHCT158DR units undergo pre-shipment inspection (PSI). If there is an issue with SN74AHCT158DR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SN74AHCT158DR part is unused and in its original packaging.

Return procedure for SN74AHCT158DR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…