Texas Instruments SN74ALS1035DR
- Part No.:
- SN74ALS1035DR
- Manufacturer:
- Texas Instruments
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74ALS1035DR.pdf
- Description:
- IC BUF NON-INVERT 5.5V 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:6,151
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Product details
Overview
SN74ALS1035DR from Texas Instruments is a hex noninverting buffer IC with open-collector outputs, designed for wired-OR/AND logic interfacing and level-shifting applications. It features six independent channels, 5 V nominal supply operation, 12 mA low-level output current capability, propagation delays as low as 2 ns (tPHL), and operates across 0°C to 70°C.
For engineers reviewing the SN74ALS1035DR datasheet, SN74ALS1035DR pinout, SN74ALS1035DR application, or SN74ALS1035DR equivalent, key selection criteria include open-collector drive strength, TTL-compatible input thresholds, SOIC-14 package compatibility, and legacy industrial bus interface requirements.
Technical Context
This device implements six independent Y = A Boolean buffers using bipolar ALS (Advanced Low-power Schottky) technology. Each output requires an external pull-up resistor and supports active-low wired-OR or active-high wired-AND configurations via shared collector nodes.
It operates within 4.5 V–5.5 V supply range, delivers VOL ≤ 0.4 V at IOL = 12 mA, and exhibits tPLH/tPHL up to 30 ns/12 ns respectively under 50 pF load and 680 Ω pull-up - confirming its suitability for medium-speed digital interface translation and bus arbitration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | ALS (Advanced Low-power Schottky) – ensures TTL-compatible voltage thresholds and reduced power vs standard LS. |
| Supply Voltage Range | 4.5 V to 5.5 V – compatible with standard 5 V digital systems and tolerant of rail variation. |
| Output Type | Open-collector – enables wired-logic sharing, level translation beyond VCC, and sink-only drive (no sourcing). |
| Low-Level Output Current | 12 mA (min) – sufficient to drive multiple TTL inputs or moderate resistive loads with defined VOL. |
| Propagation Delay | tPHL = 2–12 ns, tPLH = 5–30 ns (VCC = 4.5–5.5 V, CL = 50 pF) – supports >30 MHz toggle rates in point-to-point use. |
| Input Thresholds | VIH = 2.0 V (min), VIL = 0.8 V (max) – fully compatible with standard TTL logic families. |
| Operating Temperature | 0°C to 70°C – commercial-grade rating suitable for industrial control panels and instrumentation. |
Pinout & Package
SN74ALS1035DR is housed in a 14-pin SOIC (D) package, 3.9 mm wide, 1.75 mm max height, with 1.27 mm pitch and RoHS-compliant NiPdAu lead finish (Level-1 MSL). Pin 1 is marked by a beveled corner or notch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A, 2A, 3A, 4A, 5A, 6A | Buffer Input | Independent TTL-compatible digital inputs; each drives one corresponding output buffer. |
| 1Y, 2Y, 3Y, 4Y, 5Y, 6Y | Open-Collector Output | Sink-only outputs requiring external pull-up; enable wired-OR/AND and multi-drop bus termination. |
| 7 | GND | Ground reference for all internal circuitry and output sinks. |
| 14 | VCC | Positive supply rail (4.5–5.5 V); powers all six buffers and defines high-level output potential via pull-up. |
Key Features
| Feature | Design Value |
|---|---|
| Hex independent buffers | Enables consolidation of six discrete logic gates into single SOIC-14 footprint, reducing board area and interconnect count. |
| Open-collector outputs | Allows direct connection of multiple outputs to common bus line without contention, supporting legacy bus arbitration schemes. |
| ALS logic family | Delivers 2× speed improvement over standard LS with comparable power consumption, critical for timing-critical legacy upgrades. |
| TTL-compatible thresholds | Ensures seamless integration with existing 74LS/74F/74AS systems without level-shifter components. |
| SOIC-14 tape-and-reel packaging | Supports automated SMT assembly with 2500-unit reels and verified reflow profile (Level-1-260°C-UNLIM). |
Applications
| Industrial Bus Arbitration | Legacy System Level Translation |
|---|---|
Use Scenario: Multiple microcontrollers share a common status bus where only one asserts a signal at a time. IC Role / Device Role / Timing Role: SN74ALS1035DR provides open-collector buffering for each controller's ready/busy signal, enabling wired-OR arbitration. Use Value: Eliminates need for external diodes or discrete transistors while maintaining sub-15 ns response for real-time coordination. | Use Scenario: Interfacing a 3.3 V FPGA I/O bank to a 5 V legacy peripheral with TTL input requirements. IC Role / Device Role / Timing Role: SN74ALS1035DR acts as unidirectional level translator using pull-up to 5 V, accepting 3.3 V logic-high as valid VIH. Use Value: Achieves safe, passive level shift without direction control pins or bidirectional complexity. |
| LED Matrix Row Drivers | Reset Signal Aggregation |
Use Scenario: Driving common-anode LED segments in multiplexed displays where row lines require high-current sinking. IC Role / Device Role / Timing Role: SN74ALS1035DR sinks up to 12 mA per channel to ground, directly controlling cathode-side switching. Use Value: Provides deterministic turn-off with VOL ≤ 0.4 V, ensuring full LED extinction during blanking intervals. | Use Scenario: Combining reset signals from multiple subsystems (e.g., ADC, UART, memory) into a single system-wide reset line. IC Role / Device Role / Timing Role: SN74ALS1035DR implements active-low wired-OR reset aggregation: any low input forces output low. Use Value: Guarantees sub-12 ns propagation delay from first asserted reset to system reset assertion, meeting tight timing budgets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar hex noninverting buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LS1035DR | Slower propagation (tPHL up to 25 ns), higher ICC (up to 22 mA), same SOIC-14 pinout and open-collector function. | Lower speed margin; acceptable where <10 MHz bus rates suffice and legacy LS stock exists. | Choose when ALS speed is unnecessary and cost or inventory constraints favor LS-series parts. |
| SN74AHCT125DR | 3-state (not open-collector), CMOS input (VIH = 2 V min), 8 mA IOL, 5 V tolerant, faster (tPD ~8 ns), same SOIC-14 footprint. | Requires external pull-up for wired-OR; not drop-in for open-collector bus sharing without redesign. | Prefer for new designs needing lower power and higher noise immunity, but verify bus topology supports 3-state instead of open-collector. |
Compared with SN74LS1035DR, SN74ALS1035DR offers 2× speed and lower power; versus SN74AHCT125DR, it provides native wired-logic support without external control logic - making it irreplaceable in legacy bus arbitration where open-collector behavior is mandatory.
Availability
SN74ALS1035DR is available at Aetrix Electronics and suitable for industrial control panels, legacy test equipment, aerospace avionics maintenance interfaces, and military-grade system upgrades requiring stable component supply and long-term obsolescence management.
Supply support for SN74ALS1035DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a U.S.-based semiconductor company founded in 1930, specializing in analog, embedded processing, and logic solutions with broad industrial, automotive, and aerospace design support.
The SN74ALS1035DR belongs to TI's legacy 74ALS logic family, engineered for high-speed, low-power TTL-compatible interfacing in mission-critical systems where reliability and long-term availability are essential.
FAQ
What is the maximum sink current per output of the SN74ALS1035DR?
The SN74ALS1035DR guarantees a minimum low-level output current (IOL) of 12 mA per channel at VOL ≤ 0.4 V, with typical performance reaching 24 mA under VCC = 4.5 V conditions. This rating ensures reliable driving of multiple TTL inputs or moderate-resistance pull-ups in wired-logic configurations. Exceeding 24 mA risks exceeding absolute maximum ratings and is not supported by the datasheet.
Does the SN74ALS1035DR support 3.3 V logic inputs?
Yes, the SN74ALS1035DR accepts 3.3 V logic-high inputs reliably: its VIH(min) is 2.0 V, and 3.3 V exceeds this threshold with margin. However, it does not provide 3.3 V output levels - outputs are open-collector and depend on external pull-up voltage. So SN74ALS1035DR can safely interface 3.3 V controllers to 5 V buses when pulled up to 5 V.
Is the SN74ALS1035DR pin-compatible with the SN74LS1035DR?
Yes, the SN74ALS1035DR and SN74LS1035DR share identical SOIC-14 pinouts, terminal functions, and package dimensions. Both feature 1A–6A inputs, 1Y–6Y open-collector outputs, VCC on pin 14, and GND on pin 7. This allows direct PCB replacement where speed and power improvements are desired without layout changes.
What pull-up resistor value is recommended for the SN74ALS1035DR outputs?
A 680 Ω pull-up resistor is specified in the SN74ALS1035DR datasheet for switching characteristics testing (CL = 50 pF). For general use, values between 470 Ω and 2.2 kΩ balance speed (lower R = faster rise time) and power (higher R = lower static current). At 5 V with 680 Ω, static current is ~7.4 mA per active output - verify total VCC supply capacity if multiple outputs switch simultaneously.
Can the SN74ALS1035DR be used in place of a 7407 buffer?
Yes, the SN74ALS1035DR is functionally equivalent to the 7407 - both are hex noninverting open-collector buffers. The SN74ALS1035DR improves upon the 7407 with faster propagation (2–12 ns vs 15–40 ns), lower power (ICCL ~8 mA vs ~15 mA), and tighter VOL spec (0.4 V vs 0.7 V), making it a superior drop-in upgrade for existing 7407 designs requiring enhanced timing or efficiency.
SN74ALS1035DR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74ALS
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 6
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Open Collector
- Current - Output High, Low:
- -, 24mA
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
SN74ALS1035DR FAQ
1.How can I place an order for SN74ALS1035DR through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74ALS1035DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74ALS1035DR reliable?
The price and inventory of SN74ALS1035DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74ALS1035DR is usually 5 days.
3.What payment methods are accepted for SN74ALS1035DR?
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SN74ALS1035DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74ALS1035DR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74ALS1035DR?
For technical support, including SN74ALS1035DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74ALS1035DR requirements.
6.How does Aetrix verify that SN74ALS1035DR is sourced from the original manufacturer or authorized distributors?
All SN74ALS1035DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74ALS1035DR meets industry standards.
7.What is the process for return or replacement of SN74ALS1035DR?
All SN74ALS1035DR units undergo pre-shipment inspection (PSI). If there is an issue with SN74ALS1035DR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74ALS1035DR part is unused and in its original packaging.
Return procedure for SN74ALS1035DR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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