Texas Instruments SN74ALS156D
- Part No.:
- SN74ALS156D
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74ALS156D.pdf
- Description:
- IC DECODER/DEMUX 2X1:4 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,649
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74ALS156D from Texas Instruments is a dual 2-line-to-4-line decoder/demultiplexer IC with independent strobes (1G, 2G), common binary-address inputs (A, B), and complementary data paths (1C inverted, 2C non-inverted). It operates at 4.5–5.5 V, supports 0°C to 70°C ambient, delivers 8 mA sink capability, and achieves propagation delays as low as 6 ns (tPHL) for high-speed TTL-compatible logic routing in address decoding and data distribution systems.
For engineers reviewing the SN74ALS156D datasheet, SN74ALS156D pinout, SN74ALS156D application, or SN74ALS156D equivalent, key selection criteria include its dual-section enable control, Schottky-clamped inputs for ringing suppression, 16-pin SOIC (D) package compatibility, and verified operation as both dual 1:4 demux and unified 1:8 demux without external gating.
Technical Context
The SN74ALS156D implements two independent 2-to-4 decoder sections sharing address lines A and B but with separate data inputs (1C, 2C) and strobes (1G, 2G). Its internal inverter on the 1C path enables direct 3-to-8 decoding when 1C and 2C are tied together with shared strobe G.
It uses Advanced Low-Power Schottky (ALS) bipolar technology, delivering TTL-compatible voltage thresholds (VIH = 2 V min, VIL = 0.8 V max), guaranteed 8 mA output drive, and propagation delays specified down to 6 ns (tPHL) under loaded conditions (CL = 50 pF, RL = 500 Ω).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 4.5 V to 5.5 V - ensures compatibility with standard 5 V TTL bus systems and stable operation across supply tolerance. |
| Operating Temperature | 0°C to 70°C - qualified for commercial-grade applications including industrial control panels and office equipment. |
| Output Drive | 8 mA sink (IOL) - sufficient to directly drive multiple TTL inputs or small LEDs without buffering. |
| Propagation Delay | 6 ns (tPHL, A/B → Y) - enables reliable timing in sub-20 MHz address decode and data routing paths. |
| Input Clamping | Integrated Schottky diodes - suppresses transmission-line ringing on long PCB traces, reducing need for external termination. |
| Logic Family | ALS (Advanced Low-Power Schottky) - provides 2× speed vs. standard LS with comparable power, optimized for high fan-out. |
Pinout & Package
SN74ALS156D is housed in a 16-pin SOIC (D) package with 1.27 mm pitch, 10.3 mm body width, and RoHS-compliant NiPdAu lead finish. It is rated MSL Level-1 (unlimited floor life) and compatible with standard reflow profiles up to 260°C peak.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1C | Inverted data input (Section 1) | Drives outputs 1Y0–1Y3 through internal inverter - enables 3:8 demux mode when tied to 2C. |
| 1G | Strobe enable (Section 1) | Active-low control: Section 1 outputs disabled (high-impedance) when 1G = H. |
| A, B | Common binary address inputs | Select active output per section (00→1Y0/2Y0, 01→1Y1/2Y1, etc.) - shared between both decoder sections. |
| 1Y0–1Y3 | Section 1 decoded outputs | Active-low outputs - low when selected and enabled; high-impedance when 1G = H. |
| GND (Pin 8) | Ground reference | Primary return path for all internal logic and output currents - must be low-inductance connection. |
| VCC (Pin 16) | Power supply | 5 V nominal supply - bypassing with 0.1 µF ceramic capacitor near pin required for noise immunity. |
| 2C | Non-inverted data input (Section 2) | Passes data directly to 2Y0–2Y3 - used for non-inverting demux paths or parallel data routing. |
| 2G | Strobe enable (Section 2) | Independent enable for Section 2 - allows asynchronous activation of either 4-bit section without affecting the other. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent strobes (1G, 2G) | Enables selective activation of either 4-bit decoder section - simplifies cascaded decoding of 16-bit or wider buses without external gating logic. |
| Inverted 1C path + non-inverted 2C path | Permits native 3-line-to-8-line demultiplexing by connecting 1C and 2C - eliminates need for external inverter in 1:8 data distribution. |
| Schottky-clamped inputs | Suppresses signal ringing on unterminated transmission lines - improves signal integrity in backplane or ribbon-cable interconnects. |
| ALS process technology | Delivers 6 ns tPHL delay with only 9 mA ICC typical - balances speed and power for dense logic arrays where heat dissipation is constrained. |
Applications
| Memory Address Decoding | Peripheral Select Logic |
|---|---|
Use Scenario: Selecting one of eight memory chips in a microprocessor-based system using A0–A2 address lines. IC Role / Device Role / Timing Role: 3-line-to-8-line decoder driving chip-select (/CS) lines with individual enable control per bank. Use Value: Eliminates discrete gate count by integrating dual 2:4 decode + inversion in single 16-pin SOIC - reduces board area and interconnect complexity. | Use Scenario: Routing UART, SPI, or GPIO signals to one of four peripheral devices (e.g., ADC, DAC, sensor, EEPROM) on a shared bus. IC Role / Device Role / Timing Role: Dual 1-line-to-4-line demultiplexer with independent strobes for time-multiplexed peripheral access. Use Value: Enables dynamic reconfiguration of peripheral mapping via software-controlled 1G/2G signals - no hardware changes needed for I/O expansion. |
| CPU Bus Expansion | Industrial Control Panel Interface |
Use Scenario: Expanding a 16-bit CPU address/data bus to support additional I/O ports or latch-based peripherals. IC Role / Device Role / Timing Role: Dual 2-line-to-4-line decoder generating /IOR, /IOW, /MEMR, /MEMW strobes from upper address bits. Use Value: Provides deterministic 6 ns propagation delay - ensures setup/hold timing margins are maintained across full temperature range (0°C–70°C). | Use Scenario: Scanning 16 pushbuttons or LED indicators arranged in 4×4 matrix using row/column addressing. IC Role / Device Role / Timing Role: Dual demultiplexer driving column drivers while rows are scanned - leverages 1C/2C inversion for complementary output polarity. Use Value: Reduces microcontroller GPIO count by 8 pins versus discrete driver ICs - lowers BOM cost and firmware overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar decoder/demultiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LS156N | Slower propagation (15 ns tPHL), higher ICC (19 mA), same pinout and function - LS family baseline. | Lower speed margin; suitable only where <10 MHz timing suffices and power budget allows extra 10 mA. | Choose if legacy LS compatibility or lower cost is prioritized over speed/power efficiency. |
| SN74F156N | Fast TTL variant: 4 ns tPHL, 22 mA ICC, identical pinout and logic function - higher drive, higher power. | Supports >25 MHz operation but requires tighter thermal management and decoupling. | Choose for maximum speed in high-performance control systems where ALS power savings are secondary. |
Compared with SN74LS156N and SN74F156N, the SN74ALS156D delivers optimal balance: 2.5× faster than LS while consuming half the power of F-series, making it ideal for space-constrained, thermally sensitive commercial designs requiring reliable 20 MHz-class decode timing.
Availability
SN74ALS156D is available at Aetrix Electronics and suitable for memory address decoding, peripheral select logic, CPU bus expansion, and industrial control panel interface applications requiring stable component supply and long-term obsolescence mitigation.
Supply support for SN74ALS156D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions with over 90 years of innovation in industrial, automotive, and communications markets.
The SN74ALS156D belongs to TI's legacy 74ALS logic family, designed specifically for high-speed, low-power TTL-compatible digital systems where propagation delay, fan-out capability, and noise immunity are critical in commercial-temperature environments.
FAQ
What logic family does the SN74ALS156D belong to, and how does it differ from standard 74LS?
The SN74ALS156D belongs to the Advanced Low-Power Schottky (ALS) logic family. Compared to standard 74LS, it offers approximately double the speed (6 ns vs. 15 ns tPHL) and roughly half the power consumption (9 mA vs. 19 mA ICC typical). The SN74ALS156D maintains full pin and functional compatibility with 74LS156 but improves timing margins and thermal performance in dense logic layouts - a key advantage for the SN74ALS156D in commercial-grade systems operating continuously at 70°C.
Can the SN74ALS156D be used as a 3-line-to-8-line decoder, and what connections are required?
Yes, the SN74ALS156D can function as a 3-line-to-8-line decoder. To achieve this, connect inputs 1C and 2C together as the third address bit (C), tie strobes 1G and 2G together as the common enable (G), and apply A and B to their respective pins. The internal inverter on 1C ensures complementary outputs across both sections, producing eight unique active-low outputs (1Y0–1Y3 and 2Y0–2Y3) - a verified configuration documented in the SN74ALS156D function tables and logic diagrams.
What is the maximum output sink current supported by the SN74ALS156D, and under what conditions is it specified?
The SN74ALS156D supports a guaranteed 8 mA low-level output current (IOL) per output pin, specified at VCC = 4.5 V and VO = 0.5 V. This rating ensures reliable interfacing with standard TTL inputs (requiring ≤0.4 V low-level) and permits direct driving of small-signal LEDs or multiple 74-series inputs without external buffers - a design value confirmed in the SN74ALS156D electrical characteristics table and validated across the full 0°C to 70°C operating range.
Does the SN74ALS156D have Schottky clamping on all inputs, and why is this important?
Yes, the SN74ALS156D integrates high-performance Schottky diodes on all inputs to clamp transient voltages and suppress line ringing. This feature is critical in systems with long PCB traces, ribbon cables, or backplanes where signal reflections could cause false triggering or timing violations. By eliminating the need for external RC snubbers or series resistors, the SN74ALS156D simplifies layout and improves noise immunity - a documented benefit explicitly cited in the SN74ALS156D datasheet description and absolute maximum ratings section.
Is the SN74ALS156D still in active production, and what packaging options are available?
The SN74ALS156D is marked as obsolete by Texas Instruments, but actively stocked variants include SN74ALS156DRE4 (SOIC-16, tape-and-reel, RoHS-compliant, MSL-1) and SN74ALS156N (PDIP-16, tube). Aetrix Electronics maintains inventory of SN74ALS156DRE4 for legacy system repair and long-lifecycle industrial programs. All variants share identical electrical specifications and pinout - the SN74ALS156DRE4 is a direct drop-in replacement for SN74ALS156D in surface-mount designs.
SN74ALS156D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74ALS
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Type:
- Decoder/Demultiplexer
- Circuit:
- 2 x 1:4
- Independent Circuits:
- 1
- Current - Output High, Low:
- 100µA, 8mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SN74ALS156D FAQ
1.How can I place an order for SN74ALS156D through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74ALS156D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74ALS156D reliable?
The price and inventory of SN74ALS156D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74ALS156D is usually 5 days.
3.What payment methods are accepted for SN74ALS156D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74ALS156D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74ALS156D?
SN74ALS156D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74ALS156D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74ALS156D?
For technical support, including SN74ALS156D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74ALS156D requirements.
6.How does Aetrix verify that SN74ALS156D is sourced from the original manufacturer or authorized distributors?
All SN74ALS156D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74ALS156D meets industry standards.
7.What is the process for return or replacement of SN74ALS156D?
All SN74ALS156D units undergo pre-shipment inspection (PSI). If there is an issue with SN74ALS156D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74ALS156D part is unused and in its original packaging.
Return procedure for SN74ALS156D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74ALS156D Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
