Texas Instruments SN74AS158N
- Part No.:
- SN74AS158N
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
SN74AS158N.pdf
- Description:
- IC MULTIPLEXER 4 X 2:1 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,213
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74AS158N from Texas Instruments is a high-speed TTL 2-to-1 quad data selector/multiplexer with inverted output logic, designed for digital signal routing in bus-oriented systems. It features 4-bit word selection from two input sources, buffered inputs/outputs, a dedicated strobe (G) enable, and operates at 0°C to 70°C with VCC = 4.5–5.5 V. It is used in address/data multiplexing, ALU operand selection, and logic state conditioning in industrial control backplanes.
For engineers reviewing the SN74AS158N datasheet, SN74AS158N pinout, SN74AS158N application, or SN74AS158N equivalent, key selection criteria include propagation delay (tPHL/tPLH ≤ 10.5 ns), output drive capability (IOL = 20 mA), inverted output behavior, and PDIP-16 package compatibility with legacy through-hole PCB layouts.
Technical Context
The SN74AS158N implements four independent 2:1 multiplexer channels sharing a common select (A/B) and strobe (G) control. Each channel routes either input A or B to its corresponding inverted output Y, with G acting as an active-low enable that forces all outputs high when asserted.
Its AS-series TTL architecture delivers faster switching than ALS variants-e.g., tPHL(A/B→Y) = 2–10.5 ns-while maintaining standard 5-V TTL voltage thresholds (VIL = 0.8 V, VIH = 2 V) and compatible output levels (VOH ≥ VCC−2 V, VOL ≤ 0.5 V at IOL = 20 mA).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 4.5 V to 5.5 V - Ensures stable operation across standard 5-V supply tolerances without regulation overhead. |
| Propagation Delay (A/B → Y) | 2 ns (min) to 9.5 ns (max) - Enables reliable timing in 100+ MHz clock-domain boundary applications. |
| Output Drive (IOL) | 20 mA - Supports direct fanout to ≥10 standard TTL loads without external buffers. |
| Input Thresholds | VIL = 0.8 V, VIH = 2 V - Guarantees noise immunity and interoperability with legacy 5-V CMOS/TTL logic families. |
| Operating Temperature | 0°C to 70°C - Qualified for commercial-grade embedded systems, test equipment, and industrial controllers. |
| Supply Current (ICC) | 15.6 mA (typ) to 22.5 mA (max) at VCC = 5.5 V - Predictable power budgeting for multi-device logic planes. |
Pinout & Package
SN74AS158N uses a 16-pin plastic dual in-line package (PDIP-N), 300-mil width, with 0.1-inch lead pitch and standard through-hole mounting. Pin 1 is located at the top-left corner (notch-side left), with pins numbered counter-clockwise.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A, 2A, 3A, 4A | Data Input A (Channel 1–4) | First source of 4-bit parallel data; routed to output when A/B = L. |
| 1B, 2B, 3B, 4B | Data Input B (Channel 1–4) | Second source of 4-bit parallel data; routed to output when A/B = H. |
| 1Y, 2Y, 3Y, 4Y | Inverted Data Output (Channel 1–4) | Active-high logic inversion of selected input; Y = NOT(selected input). |
| A/B | Channel Select Control | Global 2:1 select line: L selects A inputs, H selects B inputs across all 4 channels. |
| G | Strobe Enable (Active-Low) | When low, enables multiplexing; when high, forces all Y outputs high (inverted disable). |
| VCC | Positive Supply | Pin 16: +5 V supply connection; requires local 0.1 µF bypass capacitor. |
| GND | Ground Reference | Pin 8: Digital ground return; must be low-impedance and tied to system common. |
Key Features
| Feature | Design Value |
|---|---|
| Inverted Output Logic | Eliminates need for external inverters in active-high assertion paths, reducing component count and propagation skew. |
| High-Speed AS-Series TTL | Delivers up to 2× faster switching than ALS equivalents (e.g., SN74ALS158), critical for cycle-critical bus arbitration. |
| Buffered Inputs and Outputs | Provides consistent loading characteristics and noise rejection across all 12 signal pins, enabling robust daisy-chaining. |
| Common Strobe (G) Control | Allows synchronized enable/disable of all four channels with one control signal-essential for time-multiplexed data gating. |
| PDIP-16 Package Compatibility | Direct drop-in replacement for legacy 74xx logic in repair, upgrade, and long-lifecycle industrial designs. |
Applications
| Industrial Bus Arbitration | Microprocessor Address Multiplexing |
|---|---|
Use Scenario: Selecting between two I/O peripheral address spaces on a shared 8-bit data bus in a programmable logic controller. IC Role / Device Role / Timing Role: Quad 2:1 data selector routing address bits A0–A3 under CPU control, with strobe-synchronized enable. Use Value: Reduces board space vs. discrete gates; ensures sub-10 ns channel switching aligns with 8-MHz Z80 bus timing. |
Use Scenario: Demultiplexing upper/lower nibble of a microcontroller's 16-bit address bus onto separate memory banks. IC Role / Device Role / Timing Role: Inverting multiplexer providing A12–A15 selection from two memory map regions using A/B and G signals. Use Value: Inverted outputs simplify interface to active-low chip-select logic, eliminating external inverters and saving 4 gate delays. |
| Digital Test Equipment Signal Routing | Legacy System Logic State Conditioning |
Use Scenario: Switching calibration reference signals between DUT channels in automated test fixtures with tight timing budgets. IC Role / Device Role / Timing Role: High-fanout, low-skew multiplexer selecting between reference and test vectors for 4-channel ADC/DAC paths. Use Value: 20 mA sink capability drives coaxial cable loads directly; 2 ns min delay supports <100 ns test step resolution. |
Use Scenario: Converting non-inverting logic states from older PROM-based firmware to match new CPLD input polarity requirements. IC Role / Device Role / Timing Role: Inversion-aware data selector translating legacy true-data bus signals into complemented format for modern logic. Use Value: Eliminates need for 4 discrete inverters while preserving exact timing relationships across all 4 bits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2-to-1 quad multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74ALS158N | Slower propagation (tPHL up to 18 ns), lower IOL (8 mA), higher VIL (0.7 V). | Acceptable in <5 MHz systems with lighter fanout; not suitable for high-speed bus arbitration. | Choose for cost-sensitive, low-frequency upgrades where SN74AS158N's speed is unnecessary. |
| SN74AS157N | True (non-inverted) outputs; identical timing, drive, and pinout. | Requires external inversion if downstream logic expects complemented data; otherwise functionally interchangeable. | Choose when system design relies on true-output logic flow and no inversion is needed at the multiplexer stage. |
Compared with SN74ALS158N, SN74AS158N delivers 40% faster switching and 2.5× stronger sink drive; compared with SN74AS157N, it provides built-in inversion-reducing external component count where complemented outputs are required.
Availability
SN74AS158N is available at Aetrix Electronics and suitable for industrial control backplanes, microprocessor bus interfaces, and digital test equipment requiring stable component supply and long-term obsolescence management.
Supply support for SN74AS158N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader founded in 1930, specializing in analog, embedded processing, and logic ICs with broad industrial and automotive qualification.
SN74AS158N belongs to TI's 74AS advanced Schottky TTL logic family, engineered for high-speed, low-power digital signal routing in commercial-grade systems where timing precision and legacy compatibility are critical.
FAQ
What is the primary logic function of the SN74AS158N?
The SN74AS158N is a quad 2-to-1 data selector/multiplexer with inverted outputs. It routes one of two 4-bit input words (A or B) to four inverted outputs (1Y–4Y) based on the A/B select line, with global enable via the active-low strobe (G) input. Its function table confirms Y = NOT(selected input), distinguishing it from the true-output SN74AS157N.
Does the SN74AS158N support 3.3-V logic interfacing?
No, the SN74AS158N is a 5-V TTL device with VCC specified from 4.5 V to 5.5 V and input thresholds (VIL = 0.8 V, VIH = 2 V) optimized for 5-V systems. Direct 3.3-V interface risks marginal VIH recognition and is not supported per datasheet operating conditions.
What is the maximum fanout capability of the SN74AS158N outputs?
Each SN74AS158N output can sink up to 20 mA (IOL), supporting a fanout of ≥10 standard TTL loads (each requiring ~1.6 mA). This eliminates need for buffer drivers in typical bus-interface applications, provided total capacitive load remains ≤50 pF per output.
How does the strobe (G) pin affect output behavior on the SN74AS158N?
When G is high (disabled), all four outputs (1Y–4Y) are forced high regardless of A/B or data inputs-leveraging the device's inherent inverted output structure. When G is low (enabled), normal multiplexing occurs: selected input (A or B) passes through and is inverted at the corresponding Y output.
Is the SN74AS158N pin-compatible with other 74xx-series multiplexers?
Yes, SN74AS158N shares the same 16-pin PDIP (N) package and pinout as SN74ALS158N, SN74AS157N, and SN74ALS157N. However, functional differences exist: SN74AS158N and SN74ALS158 provide inverted outputs, while SN74AS157N and SN74ALS157A provide true outputs.
SN74AS158N Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74AS
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- Multiplexer
- Circuit:
- 4 x 2:1
- Independent Circuits:
- 1
- Current - Output High, Low:
- 400µA, 8mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
SN74AS158N FAQ
1.How can I place an order for SN74AS158N through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74AS158N on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74AS158N reliable?
The price and inventory of SN74AS158N are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74AS158N is usually 5 days.
3.What payment methods are accepted for SN74AS158N?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74AS158N transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74AS158N?
SN74AS158N orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74AS158N order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74AS158N?
For technical support, including SN74AS158N datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74AS158N requirements.
6.How does Aetrix verify that SN74AS158N is sourced from the original manufacturer or authorized distributors?
All SN74AS158N products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74AS158N meets industry standards.
7.What is the process for return or replacement of SN74AS158N?
All SN74AS158N units undergo pre-shipment inspection (PSI). If there is an issue with SN74AS158N, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74AS158N part is unused and in its original packaging.
Return procedure for SN74AS158N:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74AS158N Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
