Texas Instruments SN74AUP1G126DCKR

Overview

SN74AUP1G126DCKR from Texas Instruments is a low-power single bus buffer gate with tri-state output, designed for point-to-point signal routing in battery-powered portable systems. It operates across 0.8 V to 3.6 V, delivers 4.6 ns max propagation delay at 3.3 V, supports Ioff partial-power-down mode, and features 1.5 pF input capacitance - enabling ultra-low-power interface buffering in SSDs, tablets, and wireless peripherals.

For engineers reviewing the SN74AUP1G126DCKR datasheet, SN74AUP1G126DCKR pinout, SN74AUP1G126DCKR application, or SN74AUP1G126DCKR equivalent, key selection criteria include its 5-pin SC70 package, active-high OE control, 0.9 µA max ICC, 3.6-V I/O tolerance for mixed-voltage domains, and input-disable capability for floating-input resilience.

Technical Context

This device implements a non-inverting CMOS buffer with active-high output-enable logic and balanced push-pull output drivers. Its Ioff circuitry ensures <0.6 µA leakage per pin when VCC = 0 V, enabling safe back-driving in partial-power-down systems. Input hysteresis improves noise immunity against slow transitions.

The SN74AUP1G126DCKR uses standard CMOS inputs with 1.5 pF typical capacitance and supports overvoltage-tolerant inputs up to 4.6 V. Its tri-state output exhibits 0.5 µA max IOZ at 3.6 V, and propagation delay scales predictably with supply voltage and load capacitance (e.g., 4.6 ns @ 3.3 V, CL = 5 pF).

Key Specifications

Pinout & Package

SN74AUP1G126DCKR is packaged in a 5-pin SC70 (DCK) footprint measuring 1.25 mm × 2.00 mm, optimized for space-constrained portable designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar bus buffer applications.

Compared with SN74LVC1G126DBVR and NC7SZ126P5X, SN74AUP1G126DCKR uniquely delivers sub-1-V operation, Ioff-enabled hot-plug safety, and 0.9 µA static current - making it the only viable choice for energy-constrained, multi-rail portable designs requiring robust signal isolation.

Availability

SN74AUP1G126DCKR is available at Aetrix Electronics and suitable for audio docks, solid-state drives, wireless peripherals, and tablet power-sequencing circuits requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for SN74AUP1G126DCKR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and personal electronics markets.

SN74AUP1G126DCKR belongs to TI's AUP (Advanced Ultra-Low-Power) logic family, engineered specifically for battery-powered portable applications where extended runtime, wide voltage flexibility, and robust signal integrity are mandatory.

FAQ

What is the maximum propagation delay of SN74AUP1G126DCKR at 3.3 V?

The maximum propagation delay (tpd) of SN74AUP1G126DCKR is 4.6 ns at VCC = 3.3 V ± 0.3 V, CL = 5 pF, and TA = –40°C to +85°C. This value is specified in the Switching Characteristics table (Section 6.6) of the official datasheet and reflects worst-case timing under full temperature and capacitive load conditions. SN74AUP1G126DCKR maintains consistent performance across its operating range due to its AUP family architecture.

Does SN74AUP1G126DCKR support partial-power-down operation?

Yes, SN74AUP1G126DCKR fully supports partial-power-down operation via its Ioff circuitry. When VCC = 0 V, all inputs and outputs enter a high-impedance state with leakage limited to ≤0.6 µA (max) over temperature. This prevents current backflow into powered sections of the system - a critical requirement for hot-plug interfaces and multi-rail power sequencing. The Ioff specification is verified in Section 6.5 Electrical Characteristics.

What package type is used for SN74AUP1G126DCKR?

SN74AUP1G126DCKR uses the SC70-5 (DCK) package: a 5-pin surface-mount package with nominal dimensions of 1.25 mm × 2.00 mm and 0.65-mm lead pitch. This compact footprint is explicitly listed in the Device Information table (Section 3) and mechanical drawings of the SN74AUP1G126 datasheet. It is distinct from SOT-23, SON, or DSBGA variants of the same functional part number.

Can SN74AUP1G126DCKR tolerate input voltages higher than VCC?

Yes, SN74AUP1G126DCKR supports overvoltage-tolerant inputs up to 4.6 V regardless of VCC level - as confirmed in Absolute Maximum Ratings (Section 6.1). This allows safe interfacing with 3.3-V buses while operating from lower supply voltages (e.g., 1.8 V), eliminating the need for external level translators in mixed-voltage signal paths. The feature is enabled by internal clamp diodes and is validated per JEDEC standards.

What is the input capacitance of SN74AUP1G126DCKR?

The typical input capacitance (Ci) of SN74AUP1G126DCKR is 1.5 pF, measured at VI = VCC or GND and TA = 25°C (Section 6.5 Electrical Characteristics). This low value minimizes loading on driving sources such as MCU GPIOs, preserves edge rates in high-density layouts, and contributes to the device's ultra-low dynamic power consumption (Cpd = 4 pF typical at 3.3 V).