Texas Instruments SN74AUP1G58YZPR

Overview

SN74AUP1G58YZPR from Texas Instruments is a low-power configurable multiple-function logic gate in a 6-ball NanoStar™ DSBGA (YZP) package. It implements AND, OR, NAND, NOR, XNOR, inverter, or noninverter functions via three inputs (In0–In2), features Schmitt-trigger inputs for noise immunity, operates from 0.8 V to 3.6 V, and delivers 5.5 ns max propagation delay at 3.3 V - ideal for battery-powered portable interface logic and level-shifting in mixed-voltage systems.

For engineers reviewing the SN74AUP1G58YZPR datasheet, SN74AUP1G58YZPR pinout, SN74AUP1G58YZPR application, or SN74AUP1G58YZPR equivalent, key selection criteria include its ultra-low ICC (0.9 mA max), 3.6-V I/O tolerance, Ioff partial-power-down support, 1.5 pF input capacitance, and configurable function mapping - all critical for space-constrained, low-noise, multi-rail embedded control nodes.

Technical Context

The SN74AUP1G58YZPR uses a 3-bit input configuration (In0, In1, In2) to select one of eight logic functions via truth table mapping, enabling field-programmable behavior without external programming circuitry. Its Schmitt-trigger inputs provide hysteresis (ΔVT up to 1.31 V at 3 V), allowing robust operation with slow or noisy signals.

It supports partial-power-down via Ioff, disabling outputs when VCC = 0 V to prevent backflow current, and maintains 3.6-V I/O tolerance across the full 0.8–3.6 V supply range - essential for voltage-level translation between legacy and modern low-voltage subsystems.

Key Specifications

Pinout & Package

SN74AUP1G58YZPR uses the YZP package: a 6-ball, 0.5 mm max height NanoStar™ DSBGA (Die Size Ball Grid Array) with 0.225 mm ball pitch, A1 corner marked, and Pb-free SnAgCu solder bumps. Dimensions: 1.358 mm × 1.418 mm footprint, 0.5 mm max height.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar configurable logic gate applications.

Compared with SN74LVC1G58YZPR, the SN74AUP1G58YZPR delivers 64% lower ICC and Schmitt-trigger noise immunity - critical for battery longevity and EMI-prone environments; versus SN74AUP1G97YZPR, it omits OE but reduces complexity and cost where tri-state is unnecessary.

Availability

SN74AUP1G58YZPR is available at Aetrix Electronics and suitable for battery-powered portable electronics, industrial sensor nodes, and space-constrained IoT edge devices requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for SN74AUP1G58YZPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 50 years of innovation in low-power and high-reliability IC design.

The AUP (Advanced Ultra-Low-Power) product line targets battery-operated portable applications, delivering industry-leading static and dynamic power efficiency across 0.8–3.6 V supply ranges while maintaining signal integrity and mixed-voltage interoperability - precisely embodied by the SN74AUP1G58YZPR.

FAQ

What logic functions does the SN74AUP1G58YZPR support?

The SN74AUP1G58YZPR supports eight logic functions determined by its three inputs (In0, In1, In2): AND, OR, NAND, NOR, XNOR, inverter, noninverter, and a second NAND variant. Each combination maps directly to a row in the device's function table - no external configuration or programming is required. This configurability makes the SN74AUP1G58YZPR a flexible replacement for multiple fixed-function gates in compact designs.

Does the SN74AUP1G58YZPR support partial-power-down operation?

Yes, the SN74AUP1G58YZPR includes Ioff circuitry that disables outputs when VCC = 0 V, preventing damaging current backflow through the device during power sequencing or hot-swap events. This feature is fully characterized per JESD 78 Class II latch-up standards and is active across the full –40°C to 85°C operating temperature range - making the SN74AUP1G58YZPR suitable for multi-rail systems with independent power domains.

What is the maximum propagation delay of the SN74AUP1G58YZPR at 3.3 V?

The maximum propagation delay (tpd) of the SN74AUP1G58YZPR is 5.5 ns at VCC = 3.3 V ± 0.3 V, measured with CL = 5 pF and TA = –40°C to 85°C. This value is guaranteed across process, voltage, and temperature extremes - ensuring timing predictability in real-world conditions. The SN74AUP1G58YZPR maintains sub-10 ns performance even at 0.8 V VCC, supporting ultra-low-voltage operation without sacrificing speed.

Can the SN74AUP1G58YZPR interface between 3.3 V and 1.8 V logic domains?

Yes, the SN74AUP1G58YZPR supports 3.6-V I/O tolerance on all inputs and outputs, meaning In0, In1, In2, and Y can accept or drive 3.3 V signals while VCC is as low as 0.8 V - including 1.8 V. This eliminates the need for external level shifters in mixed-voltage systems. The SN74AUP1G58YZPR achieves this without compromising noise margin or propagation delay, verified across its full operating range.

What package type is used for the SN74AUP1G58YZPR?

The SN74AUP1G58YZPR uses the YZP package: a 6-ball NanoStar™ DSBGA (Die Size Ball Grid Array) with 0.225 mm ball pitch, 1.358 mm × 1.418 mm footprint, and 0.5 mm maximum height. It features Pb-free SnAgCu solder bumps and complies with JEDEC MO-293 standards. This ultra-compact, low-profile package is optimized for space-constrained applications such as wearables, hearing aids, and miniaturized IoT sensors - where the SN74AUP1G58YZPR delivers full logic functionality in minimal real estate.