Texas Instruments SN74AUP1G97YEPR

Overview

SN74AUP1G97YEPR from Texas Instruments is a low-power configurable multiple-function logic gate in a 6-pin YFP (DSBGA) package. It implements eight logic functions-including MUX, AND, OR, NAND, NOR, inverter, and noninverter-via three input pins (A, B, C), with Schmitt-trigger inputs for noise immunity and slow-edge tolerance. Operates across 0.8 V to 3.6 V, delivers 5.6 ns max propagation delay at 3.3 V, and supports partial-power-down via Ioff.

For engineers reviewing the SN74AUP1G97YEPR datasheet, SN74AUP1G97YEPR pinout, SN74AUP1G97YEPR application, or SN74AUP1G97YEPR equivalent, this device is selected for ultra-low-power signal routing in battery-powered portable electronics, level-shifting interfaces, and point-to-point logic conditioning where supply voltage flexibility and input hysteresis are critical.

Technical Context

The SN74AUP1G97YEPR uses a single-gate architecture with three configurable inputs (A, B, C) and one output (Y), where function selection is determined by the 3-bit truth table. Its Schmitt-trigger inputs provide 0.79 V typical hysteresis at 3 V, enabling robust operation with slow-rising signals and high noise margin.

It features Ioff circuitry that disables outputs during partial power-down, preventing backflow current when VCC = 0 V. Input tolerance up to 3.6 V allows mixed-mode signaling with higher-voltage controllers while powered from sub-1 V rails.

Key Specifications

Pinout & Package

SN74AUP1G97YEPR is packaged in a 6-ball NanoStar™ DSBGA (YFP) with 0.5 mm max height, 0.23 mm solder bumps, and Pb-free SnAgCu finish. Pin 1 is identified by a solder-bump composition marker (● = Pb-free).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar configurable logic gate applications.

Compared with SN74LVC1G97DBVR, SN74AUP1G97YEPR enables true sub-1 V operation and noise-immune sensing; compared with SN74AUP1G57DBVR, it adds the noninverting buffer function-critical for zero-delay signal pass-through in power-constrained medical monitors.

Availability

SN74AUP1G97YEPR is available at Aetrix Electronics and suitable for wearable sensor hubs, USB-C power delivery interfaces, industrial wireless nodes, and medical patch monitors requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for SN74AUP1G97YEPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-reliability ICs for industrial, automotive, and personal electronics markets.

The AUP (Advanced Ultra-Low-Power) product line delivers industry-leading static and dynamic power efficiency for battery-powered portable devices, with optimized performance from 0.8 V to 3.6 V.

FAQ

What logic functions does the SN74AUP1G97YEPR support?

The SN74AUP1G97YEPR supports eight configurable logic functions: 2-to-1 data selector (MUX), 2-input AND, 2-input OR with one inverted input, 2-input NAND with one inverted input, 2-input AND with one inverted input, 2-input NOR with one inverted input, 2-input OR, inverter, and noninverted buffer. These are selected using the three input pins A, B, and C according to the truth table in the datasheet. The SN74AUP1G97YEPR implements all functions within a single gate, eliminating the need for multiple discrete logic devices.

Does the SN74AUP1G97YEPR support partial power-down operation?

Yes, the SN74AUP1G97YEPR includes Ioff circuitry that disables outputs when VCC = 0 V, limiting off-state current to 0.6 µA max. This prevents damaging current backflow through the device during power sequencing or hot-swap events. The SN74AUP1G97YEPR maintains Ioff compliance across its full –40°C to 85°C operating range and is qualified for partial-power-down applications per JESD 78 Class II latch-up standards.

What is the significance of Schmitt-trigger inputs in the SN74AUP1G97YEPR?

The Schmitt-trigger inputs in the SN74AUP1G97YEPR provide hysteresis-0.79 V typical at 3 V-to reject noise and accommodate slow input transitions. This eliminates false triggering from EMI or RC-filtered signals, making the SN74AUP1G97YEPR ideal for interfacing with mechanical switches, analog comparators, or long PCB traces in industrial and medical applications without external debouncing components.

Can the SN74AUP1G97YEPR operate below 1 V?

Yes, the SN74AUP1G97YEPR is fully specified from 0.8 V to 3.6 V, including propagation delay, output drive strength, and Ioff behavior. At 0.8 V, it delivers 23.1 ns max tpd (CL = 5 pF) and 0.5 µA max ICC, enabling direct integration with sub-1 V processors and energy-harvesting systems. The SN74AUP1G97YEPR maintains functional correctness and timing predictability across the entire range without derating.

Which package type is used for the SN74AUP1G97YEPR?

The SN74AUP1G97YEPR uses the YFP package: a 6-ball NanoStar™ DSBGA with 0.23 mm solder bumps, 0.5 mm maximum height, and Pb-free SnAgCu finish. It measures 1.02 mm × 1.52 mm and complies with JEDEC MO-275. The SN74AUP1G97YEPR's pin 1 is identified by a Pb-free solder-bump marker (●), and the package supports reflow per IPC/JEDEC J-STD-020 Level-1 conditions.