Texas Instruments SN74AUP1T58DBVR
- Part No.:
- SN74AUP1T58DBVR
- Manufacturer:
- Texas Instruments
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
SN74AUP1T58DBVR.pdf
- Description:
- IC TRANSLATOR UNIDIR SOT23-6
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SN74AUP1T58DBVR from Texas Instruments is a single-supply voltage-level translator IC with configurable logic functions, operating from 2.3 V to 3.6 V supply, supporting 1.8 V/2.5 V/3.3 V level translation, featuring Schmitt-trigger inputs (ΔVT = 210 mV), Ioff protection (0.5 µA), and 4 mA output drive - used in mixed-voltage I/O interfacing between microcontrollers and sensors in portable IoT edge nodes.
For engineers reviewing the SN74AUP1T58DBVR datasheet, SN74AUP1T58DBVR pinout, SN74AUP1T58DBVR application, or SN74AUP1T58DBVR equivalent, key selection criteria include its 6-pin SOT-23 package, nine programmable gate configurations (NAND, OR, XOR, buffer, inverter), ultra-low static current (0.5 µA), hysteresis-enhanced noise immunity, and compatibility with battery-backed systems requiring partial power-down support.
Technical Context
The SN74AUP1T58DBVR implements a single-input configurable logic block using three user-defined control pins (A, B, C) tied to VCC or GND to select one of nine logic functions - including inverter, noninverted buffer, 2-input NAND/OR/XOR, and inverted-input variants - without external components. Its AUP low-power CMOS process enables operation down to 2.3 V while maintaining rail-to-rail output swing.
Schmitt-trigger inputs provide 210 mV hysteresis (VT+ = 1.19 V / VT− = 0.5 V at VCC = 3.3 V), rejecting noise on slow-rising signals common in mixed-signal PCBs. The Ioff feature guarantees ≤0.5 µA leakage when VCC = 0 V, enabling safe back-driving of inputs/outputs during system sleep states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2.3 V to 3.6 V - supports operation across battery voltage drop (e.g., Li-ion 3.6 V → 2.7 V) without logic failure |
| Input Threshold Hysteresis | ΔVT = 210 mV - rejects noise on analog-digital boundary signals and ensures clean switching in noisy environments |
| Ioff Leakage | ≤0.5 µA at VCC = 0 V - enables safe I/O isolation during partial power-down in portable devices |
| Output Drive | ±4 mA at VCC = 3.3 V - reduces signal reflections and overshoot on short PCB traces |
| Propagation Delay | 1.6 ns (min) to 9.8 ns (max) - varies with VCC, input voltage, and load capacitance (5–30 pF) |
| Power Dissipation Capacitance | Cpd = 4 pF (VCC = 2.5 V), 5 pF (VCC = 3.3 V) - enables accurate dynamic power estimation in battery-life calculations |
| ESD Rating | HBM = 2000 V, CDM = 1000 V - meets industrial robustness requirements without external protection |
Pinout & Package
SOT-23-6 (DBV) package: 2.9 mm × 1.6 mm × 1.45 mm body, gull-wing leads, pin 1 marked by index area, RoHS-compliant NiPdAu finish, MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A) | Configurable Logic Input | User-selectable logic control pin; tied to VCC or GND to define gate function per Function Selection Table |
| 2 (B) | Configurable Logic Input | Second logic configuration pin; combined with A and C to select among nine gate types |
| 3 (GND) | Ground Reference | Primary return path for all internal circuitry and I/O; must be low-impedance for noise immunity |
| 4 (C) | Configurable Logic Input | Third logic configuration pin; determines inversion state and operand routing in selected function |
| 5 (VCC) | Supply Voltage | Single power rail (2.3–3.6 V); powers internal logic and defines output high/low voltage levels |
| 6 (Y) | Logic Output | Active-drive output delivering rail-to-rail swing; supports 4 mA sink/source at VCC = 3.3 V |
Key Features
| Feature | Design Value |
|---|---|
| Nine Configurable Gate Functions | Single device replaces discrete NAND, OR, XOR, inverter, and buffer - reduces BOM count and board space in space-constrained designs |
| Schmitt-Trigger Inputs | 210 mV hysteresis improves noise margin on slow or noisy signals (e.g., pushbutton inputs, sensor outputs), eliminating need for external RC filtering |
| Ioff Partial-Power-Down Support | 0.5 µA max leakage at VCC = 0 V allows safe back-driving of Y, A, B, or C pins during host MCU sleep - critical for always-on sensor nodes |
| Ultra-Low Static Power | 0.5 µA ICC at 25°C enables multi-year battery life in coin-cell-powered wearables and remote sensors |
| Wide-Level Translation Range | Supports 1.8 V ↔ 2.5 V, 1.8 V ↔ 3.3 V, and 2.5 V ↔ 3.3 V translation without external resistors or level-shifter ICs |
Applications
| Industrial Sensor Interface | Portable Medical Device I/O |
|---|---|
Use Scenario: Interfacing 1.8-V MEMS accelerometer outputs to a 3.3-V microcontroller ADC input in a handheld diagnostic tool. IC Role / Device Role / Timing Role: Voltage-level translator and noise-immune signal conditioner; converts LVCMOS18 logic to LVCMOS33 while rejecting EMI from nearby RF modules. Use Value: Eliminates external pull-up resistors and RC filters; Schmitt-trigger input ensures reliable edge detection despite 50-mV EMI coupling on flex-cable traces. | Use Scenario: Enabling bidirectional communication between a 2.5-V glucose sensor ASIC and a 3.3-V Bluetooth SoC in a wearable patch. IC Role / Device Role / Timing Role: Configurable logic gate and level shifter; set as noninverted buffer to pass sensor data while translating voltage domains. Use Value: Reduces component count vs. dual discrete translators; Ioff prevents current leakage when Bluetooth radio enters deep sleep mode. |
| Automotive Body Control Module | IoT Edge Node Power Management |
Use Scenario: Translating wake-up signals from 1.8-V CAN transceiver status pins to 3.3-V microcontroller GPIOs in a door module. IC Role / Device Role / Timing Role: Level translator with hysteresis; accepts slow-rising open-drain signals and delivers clean CMOS-compatible edges. Use Value: ΔVT = 210 mV prevents false wake-ups caused by automotive electrical noise; operates reliably over full −40°C to +85°C range. | Use Scenario: Managing enable/disable sequencing between a 3.3-V PMIC and 1.8-V ultra-low-power MCU in a battery-operated environmental monitor. IC Role / Device Role / Timing Role: Inverter-based power-enable gate; configured as inverter to invert PMIC READY signal before feeding to MCU reset controller. Use Value: Replaces discrete transistor + resistor; 0.5 µA static current extends shelf life and operational runtime beyond 5 years on CR2032 cell. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage-level translation and configurable logic applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74AUP1T57DBVR | Same AUP family, 2-input configurable gate (A/B only), no C input - supports only 4 logic functions | Lacks third configuration pin; cannot implement XOR, noninverted buffer, or dual-inverted gates | Select when only basic NAND/NOR/AND/OR required and board space allows simpler logic mapping |
| SN74LVC1T45DBVR | Direction-controlled dual-supply translator (VCCA/VCCB), no configurable logic, higher IOH/IOL (±32 mA) | Requires two supplies; supports bidirectional data flow but no logic function selection | Choose for high-speed bidirectional bus translation (e.g., I²C, UART) where logic reconfiguration is unnecessary |
Compared with SN74AUP1T57DBVR and SN74LVC1T45DBVR, the SN74AUP1T58DBVR uniquely combines nine programmable logic functions with single-supply level translation and sub-µA Ioff, making it optimal for space- and power-constrained unidirectional control signal routing where function flexibility matters more than drive strength or bidirectionality.
Availability
SN74AUP1T58DBVR is available at Aetrix Electronics and suitable for industrial sensor interface, portable medical device I/O, automotive body control modules, and IoT edge node power management requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for SN74AUP1T58DBVR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in low-power logic and precision signal conditioning.
The SN74AUP1T58DBVR belongs to TI's AUP (Advanced Ultra-Low-Power) logic family, designed specifically for battery-operated and energy-harvesting systems demanding nanowatt static power, robust noise immunity, and flexible logic functionality in minimal footprint.
FAQ
What logic functions can the SN74AUP1T58DBVR configure?
The SN74AUP1T58DBVR supports nine distinct logic functions determined by tying its A, B, and C inputs to VCC or GND: 2-input NAND, 2-input OR with both inputs inverted, 2-input AND with inverted input, 2-input NOR with inverted input, 2-input NAND with both inputs inverted, 2-input OR, 2-input XOR, inverter, and noninverted buffer. Each configuration is implemented internally without external components.
Does the SN74AUP1T58DBVR require external pull-up or pull-down resistors?
No, the SN74AUP1T58DBVR does not require external pull-up or pull-down resistors for configuration. Its A, B, and C inputs are internally biased and accept direct connection to VCC or GND to select logic function. Unused inputs must be held at VCC or GND per TI's SCBA004 guidance to prevent floating-node instability.
What is the maximum capacitive load the SN74AUP1T58DBVR can drive reliably?
The SN74AUP1T58DBVR is characterized up to 30 pF load capacitance, with propagation delay increasing from 1.6 ns (min) to 9.8 ns (max) depending on VCC, input voltage, and CL. For reliable signal integrity, TI recommends limiting trace + probe + input capacitance to ≤30 pF; exceeding this may cause timing violations or increased rise/fall times.
Can the SN74AUP1T58DBVR operate with VCC = 1.8 V?
No, the SN74AUP1T58DBVR has a minimum recommended VCC of 2.3 V per its Absolute Maximum Ratings and Recommended Operating Conditions. Operation below 2.3 V is not guaranteed - parameters like VOH, VOL, tpd, and hysteresis fall outside specification, risking functional failure or excessive current draw.
How does the Ioff feature protect the SN74AUP1T58DBVR during system power-down?
When VCC = 0 V, the SN74AUP1T58DBVR's Ioff circuitry isolates internal logic, limiting leakage current through any input or output pin to ≤0.5 µA even if signals from active subsystems (e.g., 3.3-V MCU) are applied. This prevents back-powering, latch-up, or damage - a critical safeguard in multi-rail systems with independent power domains.
SN74AUP1T58DBVR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74AUP
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Translator Type:
- Voltage Level
- Channel Type:
- Unidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 1
- Voltage - VCCA:
- 1.8 V ~ 2.7 V
- Voltage - VCCB:
- 2.3 V ~ 3.6 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Single-Ended
- Data Rate:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- Configurable Gate Logic Functions
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-6
SN74AUP1T58DBVR FAQ
1.How can I place an order for SN74AUP1T58DBVR through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74AUP1T58DBVR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74AUP1T58DBVR reliable?
The price and inventory of SN74AUP1T58DBVR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74AUP1T58DBVR is usually 5 days.
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5.How can I obtain technical support or documentation for SN74AUP1T58DBVR?
For technical support, including SN74AUP1T58DBVR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74AUP1T58DBVR requirements.
6.How does Aetrix verify that SN74AUP1T58DBVR is sourced from the original manufacturer or authorized distributors?
All SN74AUP1T58DBVR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74AUP1T58DBVR meets industry standards.
7.What is the process for return or replacement of SN74AUP1T58DBVR?
All SN74AUP1T58DBVR units undergo pre-shipment inspection (PSI). If there is an issue with SN74AUP1T58DBVR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74AUP1T58DBVR part is unused and in its original packaging.
Return procedure for SN74AUP1T58DBVR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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