Texas Instruments SN74AUP1T58DBVT
- Part No.:
- SN74AUP1T58DBVT
- Manufacturer:
- Texas Instruments
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
SN74AUP1T58DBVT.pdf
- Description:
- IC TRANSLATOR UNIDIR SOT23-6
- Quantity:
- Payment:

- Shipping:

Inventory:2,675
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Product details
Overview
SN74AUP1T58DBVT from Texas Instruments is a single-supply voltage-level translator IC with configurable logic gate functionality, supporting 1.8 V ↔ 2.5 V and 1.8 V ↔ 3.3 V bidirectional translation. It features Schmitt-trigger inputs (ΔVT = 210 mV), Ioff support for partial power-down (0.5 µA leakage at VCC = 0 V), and operates across 2.3 V–3.6 V supply range. Used in battery-powered IoT sensor nodes interfacing mixed-voltage peripherals.
For engineers reviewing the SN74AUP1T58DBVT datasheet, SN74AUP1T58DBVT pinout, SN74AUP1T58DBVT application, or SN74AUP1T58DBVT equivalent, key selection criteria include its nine programmable logic functions (NAND, OR, XOR, inverter, buffer), ultra-low static current (0.5 µA), 4 mA output drive, 3.3 ns typical propagation delay at 3.3 V, and SOT-23-6 package compatibility with space-constrained portable designs.
Technical Context
The SN74AUP1T58DBVT implements a single-input configurable logic cell using three user-defined control pins (A, B, C) tied to VCC or GND to select among nine standard gate functions-including inverter, noninverting buffer, 2-input XOR, and dual-inverted NAND-without external components. Its Schmitt-trigger input stage provides noise immunity with 210 mV hysteresis, enabling robust operation on slow-rising or noisy signals in mixed-signal environments.
Ioff circuitry ensures <0.5 µA leakage when VCC = 0 V, allowing safe back-driving of inputs/outputs during system sleep modes. The device uses TI's AUP (Advanced Ultra-Low Power) logic process, achieving 4 pF typical power dissipation capacitance and sub-1 µA ICC at 25 °C, making it suitable for always-on wearable and edge-node applications requiring long battery life.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2.3 V to 3.6 V - accommodates battery voltage sag in portable systems without functional loss |
| Logic Functions | Nine configurable gates (inverter, buffer, NAND, NOR, XOR, etc.) - eliminates need for multiple discrete logic ICs |
| Input Hysteresis ΔVT | 210 mV - rejects noise on analog-digital interface lines and stabilizes output during slow transitions |
| Ioff Leakage | 0.5 µA max at VCC = 0 V - enables safe hot-insertion and partial power-down in multi-rail systems |
| tpd (VCC = 3.3 V) | 1.6–4.4 ns (CL = 5–30 pF) - supports >100 MHz signal integrity in high-speed level-shifting paths |
| Output Drive | ±4 mA - reduces overshoot/undershoot and line reflections on PCB traces up to 10 cm |
| Power Dissipation | 4 pF (Cpd) at 10 MHz - contributes <1 µW static + dynamic power in always-on sensing nodes |
Pinout & Package
SOT-23-6 package (DBV), 2.9 mm × 1.6 mm × 1.45 mm body, gull-wing leads, RoHS-compliant NiPdAu lead finish, MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A) | Configurable logic input | User-selectable function control pin; tied to VCC/GND to define gate behavior per Function Table |
| 2 (B) | Configurable logic input | Second function control input; combined with A and C to select one of nine logic configurations |
| 3 (GND) | Ground reference | Return path for all internal logic and I/O; requires low-impedance connection to system ground plane |
| 4 (C) | Configurable logic input | Third function control input; determines inversion state and gate topology with A/B |
| 5 (VCC) | Supply voltage | Single power rail (2.3–3.6 V); powers internal logic and defines output voltage levels |
| 6 (Y) | Configurable logic output | Active-drive output delivering selected gate function result; supports 4 mA sink/source |
Key Features
| Feature | Design Value |
|---|---|
| Nine logic functions in one IC | Reduces BOM count and board area vs. discrete gate arrays; eliminates routing complexity for multi-function prototypes |
| Schmitt-trigger inputs | Enables reliable switching on noisy or slow-rising signals (e.g., mechanical switch debouncing, ADC reference monitoring) |
| Ioff partial-power-down | Permits isolated shutdown of subsystems while preserving signal integrity on shared buses (e.g., I²C, GPIO expansion) |
| Ultra-low power consumption | 0.5 µA ICC at 25 °C enables >10-year battery life in coin-cell-powered sensors |
| Wide voltage translation | Supports 1.8 V ↔ 2.5 V and 1.8 V ↔ 3.3 V bidirectional translation without direction control pins |
Applications
| Industrial Sensor Interface | Wearable Health Monitor |
|---|---|
Use Scenario: Interfacing 1.8-V MEMS accelerometer to 3.3-V microcontroller ADC input with noise-prone wiring. IC Role / Device Role / Timing Role: Voltage translator and noise-immune signal conditioner; converts logic levels while rejecting EMI-induced glitches. Use Value: Eliminates external RC filtering and discrete logic; Schmitt-trigger input ensures clean edge detection despite 50-mV supply ripple. | Use Scenario: Connecting 2.5-V optical heart-rate sensor to 1.8-V ultra-low-power MCU in compact earbud form factor. IC Role / Device Role / Timing Role: Bidirectional level shifter and logic configurator; adapts sensor data format to MCU GPIO requirements. Use Value: Single-device solution saves 2.3 mm² PCB area; Ioff mode prevents backfeed during MCU sleep, extending battery runtime by 18%. |
| Smart Home Hub GPIO Expansion | Automotive Body Control Module |
Use Scenario: Adding 3.3-V I/O capability to legacy 2.5-V hub SoC via GPIO expander with configurable logic. IC Role / Device Role / Timing Role: Configurable gate translator; implements active-low enable logic and signal inversion for peripheral reset lines. Use Value: Replaces two separate devices (level shifter + inverter); reduces layout risk and improves timing margin by 2.1 ns vs. cascaded solutions. | Use Scenario: Isolating 1.8-V CAN transceiver status pin from 3.3-V body controller MCU under wide temperature (-40°C to 85°C). IC Role / Device Role / Timing Role: Temperature-stable voltage translator with hysteresis; ensures glitch-free wake-up signaling across automotive thermal cycles. Use Value: Meets JESD 78 Class II latch-up immunity (>100 mA); maintains <0.5 µA leakage over full temp range, critical for low-quiescent-current design. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage-level translation with configurable logic applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74AUP1T57DBVT | Four fixed logic functions only (no XOR or buffer); identical pinout, same AUP process and Ioff spec | Lacks XOR and noninverting buffer; unsuitable for differential signal conditioning or clock forwarding | Select when only NAND/NOR/AND/OR functions are needed and cost sensitivity outweighs flexibility |
| SN74LVC1T45DBVT | Direction-controlled dual-supply translator (no Schmitt inputs, no configurable logic, higher ICC = 10 µA) | Requires external direction pin and two supplies; cannot replace logic-gate functionality | Choose only for pure bidirectional level shifting where logic reconfiguration is unnecessary |
Compared with SN74AUP1T57DBVT and SN74LVC1T45DBVT, the SN74AUP1T58DBVT uniquely integrates nine logic functions with Schmitt-trigger noise immunity and ultra-low Ioff in a single SOT-23-6 package-enabling compact, low-power, mixed-voltage system integration without external passive components or additional control signals.
Availability
SN74AUP1T58DBVT is available at Aetrix Electronics and suitable for industrial sensor interfaces, wearable health monitors, smart home hubs, and automotive body control modules requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for SN74AUP1T58DBVT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in low-power logic and precision signal conditioning.
The SN74AUP1T58DBVT belongs to TI's AUP (Advanced Ultra-Low Power) logic family, engineered specifically for battery-operated and energy-harvesting applications demanding nanowatt static power, robust noise immunity, and flexible digital interfacing in minimal footprint.
FAQ
What logic functions can the SN74AUP1T58DBVT configure, and how are they selected?
The SN74AUP1T58DBVT supports nine logic functions: inverter, noninverting buffer, 2-input NAND, 2-input NOR, 2-input AND with inverted input, 2-input OR with both inputs inverted, 2-input XOR, and two variants of dual-inverted NAND/OR. Selection is achieved by hardwiring its A, B, and C input pins to VCC or GND per the Function Selection Table in the datasheet-no external programming or configuration registers required. Each combination directly maps to a specific truth table output at Y.
Does the SN74AUP1T58DBVT require external pull-up or pull-down resistors on its A/B/C configuration pins?
No, the SN74AUP1T58DBVT does not require external pull-up or pull-down resistors on A, B, or C pins. These inputs are CMOS-compatible with rail-to-rail voltage thresholds and are designed to be directly tied to VCC or GND to set the desired logic function. Leaving them floating is prohibited per TI's recommended operating conditions and will cause undefined output behavior and increased power consumption.
Can the SN74AUP1T58DBVT translate between 1.2-V and 3.3-V logic domains?
No, the SN74AUP1T58DBVT is not rated for 1.2-V input translation. Its input switching thresholds (VIH min = 0.75 V at VCC = 3.3 V; VIL max = 0.85 V) and absolute maximum input voltage rating (–0.5 V to 4.6 V) do not guarantee reliable operation with 1.2-V signals. TI specifies supported translations as 1.8 V ↔ 2.5 V and 1.8 V ↔ 3.3 V only. For 1.2-V interfaces, consider dedicated low-voltage translators like the SN74AXP1T24.
How does the Ioff feature of the SN74AUP1T58DBVT behave when VCC is disconnected?
When VCC = 0 V, the SN74AUP1T58DBVT's Ioff circuitry disables internal conduction paths, limiting input/output leakage to ≤0.5 µA even if signals from 0 V to 3.6 V are applied to A, B, C, or Y pins. This prevents current backflow into powered-down sections of the system, protects upstream drivers, and maintains signal integrity on shared buses-critical for hot-swap and low-power sleep modes in portable electronics.
Is the SN74AUP1T58DBVT pin-compatible with other members of the SN74AUP1Txx family?
Yes, the SN74AUP1T58DBVT shares identical SOT-23-6 (DBV) pinout with SN74AUP1T57DBVT, SN74AUP1T97DBVT, and SN74AUP1T98DBVT. Pin 1 (A), Pin 2 (B), Pin 3 (GND), Pin 4 (C), Pin 5 (VCC), and Pin 6 (Y) are functionally mapped the same across these devices. However, logic functionality differs: SN74AUP1T58DBVT offers nine functions, while SN74AUP1T57DBVT supports four, and SN74AUP1T97DBVT is a dual-supply translator without configurable logic.
SN74AUP1T58DBVT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74AUP
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Translator Type:
- Voltage Level
- Channel Type:
- Unidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 1
- Voltage - VCCA:
- 1.8 V ~ 2.7 V
- Voltage - VCCB:
- 2.3 V ~ 3.6 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Single-Ended
- Data Rate:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- Configurable Gate Logic Functions
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-6
SN74AUP1T58DBVT FAQ
1.How can I place an order for SN74AUP1T58DBVT through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74AUP1T58DBVT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74AUP1T58DBVT reliable?
The price and inventory of SN74AUP1T58DBVT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74AUP1T58DBVT is usually 5 days.
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5.How can I obtain technical support or documentation for SN74AUP1T58DBVT?
For technical support, including SN74AUP1T58DBVT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74AUP1T58DBVT requirements.
6.How does Aetrix verify that SN74AUP1T58DBVT is sourced from the original manufacturer or authorized distributors?
All SN74AUP1T58DBVT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74AUP1T58DBVT meets industry standards.
7.What is the process for return or replacement of SN74AUP1T58DBVT?
All SN74AUP1T58DBVT units undergo pre-shipment inspection (PSI). If there is an issue with SN74AUP1T58DBVT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74AUP1T58DBVT part is unused and in its original packaging.
Return procedure for SN74AUP1T58DBVT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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