Texas Instruments SN74AUP1T98YZPR

Overview

SN74AUP1T98YZPR from Texas Instruments is a single-supply voltage-level translator with configurable logic functions, supporting 1.8 V ↔ 2.5 V and 1.8 V ↔ 3.3 V bidirectional translation at VCC = 2.5 V or 3.3 V, featuring Schmitt-trigger inputs (ΔVT = 0.25 V min), Ioff protection (0.5 μA), and 4 mA output drive - used in mixed-voltage I²C, GPIO, and power-aware sensor interface circuits.

For engineers reviewing the SN74AUP1T98YZPR datasheet, SN74AUP1T98YZPR pinout, SN74AUP1T98YZPR application, or SN74AUP1T98YZPR equivalent, key selection criteria include its 6-pin YZP WCSP package, 2.3–3.6 V supply range, nine programmable gate configurations (e.g., NAND, NOR, inverter, 2:1 MUX), low static current (0.9 μA max), and compatibility with battery-backed systems requiring partial-power-down operation.

Technical Context

The SN74AUP1T98YZPR implements AUP ultra-low-power logic architecture with three user-configurable inputs (A, B, C) tied to VCC or GND to select one of nine logic functions - including inverter, noninverting buffer, 2-input NAND/NOR, and 2:1 data selector - all operating from a single supply. Its Schmitt-trigger inputs provide 210 mV hysteresis (VT+ − VT−) for noise immunity on slow or noisy signals.

It supports Ioff functionality enabling safe back-driving when VCC = 0 V (inputs/outputs tolerate 0–3.6 V), and delivers controlled 4 mA output drive to minimize overshoot/undershoot on transmission lines. Propagation delay ranges from 1.6 ns (CL = 5 pF, VI = 1.8 V, VCC = 3.3 V) to 10.8 ns (CL = 30 pF, VI = 1.8 V, VCC = 2.5 V).

Key Specifications

Pinout & Package

SN74AUP1T98YZPR uses a 6-pin NanoStar™ WCSP (YZP) package - 1.2 mm × 0.8 mm, 0.4 mm height, bottom-side solder balls - optimized for space-constrained portable and wearable designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage-level translation applications.

Compared with SN74AUP1T97DBVR and TXS0102DCUR, SN74AUP1T98YZPR uniquely combines pin-strappable logic flexibility, sub-μA static power, and Schmitt noise rejection in the smallest footprint - making it optimal for space- and energy-constrained mixed-signal edge nodes.

Availability

SN74AUP1T98YZPR is available at Aetrix Electronics and suitable for industrial sensor interfaces, wearable health monitors, IoT edge nodes, and automotive body control modules requiring stable component supply across extended product lifecycles.

Supply support for SN74AUP1T98YZPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and personal electronics markets.

The SN74AUP1T98YZPR belongs to TI's AUP ultra-low-power logic family - engineered specifically for battery-operated and energy-sensitive applications where nanowatt static consumption, flexible logic mapping, and robust mixed-voltage interoperability are mandatory.

FAQ

What logic functions can be configured on the SN74AUP1T98YZPR?

The SN74AUP1T98YZPR supports nine distinct logic functions determined by connecting its A, B, and C inputs to VCC or GND: inverter, noninverted buffer, 2-input NAND, 2-input NOR, 2:1 data selector (with inverted output), and variants with one inverted input. Each configuration is defined in the Function Selection Table of the SCES614I datasheet, and all operate within the 2.3–3.6 V VCC range. The SN74AUP1T98YZPR does not require external programming - configuration is purely hardware-based via DC biasing.

Does the SN74AUP1T98YZPR support bidirectional voltage translation?

No, the SN74AUP1T98YZPR is a unidirectional translator: inputs A/B/C accept 0–3.6 V logic levels independent of VCC, but output Y is driven only from the VCC-referenced logic core. It enables level shifting from lower-voltage sources (e.g., 1.8 V) to higher-voltage domains (e.g., 3.3 V), or vice versa, but cannot pass signals upstream from Y to A/B/C. For true bidirectional translation, TI recommends the TXS0102 or similar auto-directional devices - the SN74AUP1T98YZPR is optimized for controlled, single-direction signal routing with logic flexibility.

What is the maximum capacitive load the SN74AUP1T98YZPR can drive reliably?

The SN74AUP1T98YZPR is characterized up to 30 pF load capacitance across all VCC and input voltage conditions, with propagation delays specified from 1.6 ns (min, CL = 5 pF) to 10.8 ns (max, CL = 30 pF). Driving loads beyond 30 pF may increase delay unpredictably and degrade edge integrity due to limited 4 mA output drive strength. For heavier loads, TI recommends buffering with a dedicated driver or selecting a higher-drive device - the SN74AUP1T98YZPR's design intent is signal conditioning and inter-domain translation, not bus driving.

How does the Ioff feature of the SN74AUP1T98YZPR protect system-level operation?

The Ioff feature in the SN74AUP1T98YZPR disables internal conduction paths when VCC = 0 V, limiting input/output leakage to ≤0.5 μA even when signals from live 3.6-V subsystems are applied. This prevents back-powering of a powered-down domain, avoids latch-up risk, and eliminates contention on shared buses during partial power-down states - critical in portable devices with modular subsystems (e.g., camera + display + radio) that power-cycle independently. The SN74AUP1T98YZPR maintains this protection across –40°C to 85°C.

Is the SN74AUP1T98YZPR pin-compatible with other packages in the SN74AUP1T98 family?

No - the SN74AUP1T98YZPR uses a 6-ball NanoStar™ WCSP (YZP) package with 0.4 mm pitch and bottom-side terminations, whereas DBV (SOT-23), DCK (SC-70), DRY (SON), and DSF (X2SON) variants have different footprints, pad layouts, and thermal characteristics. While all share identical logic functionality and pin numbering (A, B, C, GND, Y, VCC), mechanical compatibility requires separate PCB land patterns. Migration between packages demands layout revision - the SN74AUP1T98YZPR is selected specifically for ultra-compact, low-profile applications where its 1.2 mm × 0.8 mm footprint provides decisive space advantage.