Texas Instruments SN74AUP2G34DCKR
- Part No.:
- SN74AUP2G34DCKR
- Manufacturer:
- Texas Instruments
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
SN74AUP2G34DCKR.pdf
- Description:
- IC BUF NON-INVERT 3.6V SC70-6
- Quantity:
- Payment:

- Shipping:

Inventory:6,055
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74AUP2G34DCKR from Texas Instruments is a dual non-inverting buffer gate in SC-70 (DCK) package, optimized for 0.8 V to 3.6 V operation with ultra-low static current (ICC ≤ 0.9 mA), 3.3-V I/O tolerance, and 4.3 ns max propagation delay at 3.3 V. It supports partial-power-down via Ioff and is used in point-to-point signal buffering in portable battery-powered systems.
For engineers reviewing the SN74AUP2G34DCKR datasheet, SN74AUP2G34DCKR pinout, SN74AUP2G34DCKR application, or SN74AUP2G34DCKR equivalent, key selection criteria include wide VCC range (0.8–3.6 V), low dynamic power (Cpd = 4.3 pF typ), input capacitance (Ci = 1.5 pF typ), latch-up immunity (>100 mA), and ESD robustness (2000-V HBM).
Technical Context
The SN74AUP2G34DCKR implements two independent positive-logic buffers (Y = A) with rail-to-rail output swing and full Ioff support for backflow prevention during partial power-down. Its AUP logic family delivers consistent timing across 0.8–3.6 V supply, enabling mixed-voltage interface bridging without level shifters.
It features low noise (<10% VCC overshoot/undershoot), high noise immunity (VIH/VIL thresholds scale with VCC), and operates reliably from –40°C to +85°C. The device meets JESD 78 Class II latch-up and JESD 22 A114-B (2000-V HBM) / C101 (1000-V CDM) ESD standards.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 0.8 V to 3.6 V - enables direct interfacing between 1.2-V, 1.8-V, 2.5-V, and 3.3-V logic domains without external level translation. |
| tpd Max | 4.3 ns at 3.3 V, CL = 5 pF - ensures sub-5-ns signal integrity for high-speed point-to-point routing in compact PCB layouts. |
| ICC Max | 0.9 mA at 3.3 V - reduces quiescent power draw in always-on subsystems of wearables and IoT edge nodes. |
| Ioff Support | Active at 0 V VCC - blocks current flow from powered sections into unpowered rails, preventing system-level brownouts during sleep mode sequencing. |
| Ci Typ | 1.5 pF - minimizes capacitive loading on driving sources, preserving rise/fall times in fan-out-limited signal chains. |
| ESD Rating | 2000-V HBM, 1000-V CDM - provides robust handling margin during automated assembly and field-replaceable module insertion. |
Pinout & Package
SN74AUP2G34DCKR uses the SC-70 (DCK) 6-pin surface-mount package (2.15 mm × 1.85 mm × 1.1 mm max height), with pin 1 located in quadrant Q3 per tape-and-reel orientation. The package is RoHS-compliant, NIPDAU-finished, and rated MSL Level-1 (260°C peak reflow).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | VCC | Primary power supply input - must be decoupled locally with ≥0.1 µF ceramic capacitor to suppress switching noise. |
| 2 | 1A | Input of first buffer - accepts 0.8–3.6 V logic levels; VIH/VIL thresholds scale dynamically with VCC. |
| 3 | 1Y | Output of first buffer - rail-to-rail CMOS output capable of sourcing/sinking ±4 mA at 3 V. |
| 4 | GND | Digital ground reference - requires low-inductance connection to system ground plane for noise control. |
| 5 | 2A | Input of second buffer - electrically isolated from 1A; supports independent signal routing paths. |
| 6 | 2Y | Output of second buffer - identical drive strength and timing to 1Y; no internal cross-coupling between channels. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤ 0.9 mA max across full VCC range - extends battery life in always-on sensor hubs and BLE transceivers. |
| Wide VCC compatibility | Operates from 0.8 V to 3.6 V - eliminates need for separate voltage regulators when interfacing legacy and modern low-voltage peripherals. |
| Ioff partial-power-down | Disables outputs and blocks reverse current at 0 V VCC - enables safe hot-plug operation in modular industrial controllers. |
| Low-noise switching | Overshoot/undershoot <10% of VCC - prevents false triggering in adjacent analog or RF sections on shared PCBs. |
| Small-footprint packaging | SC-70 (DCK) footprint - saves >50% board area vs. SOIC-8 while maintaining hand-solderability and pick-and-place compatibility. |
Applications
| Portable Sensor Interface | Low-Power MCU Peripherals |
|---|---|
Use Scenario: Buffering analog-to-digital converter (ADC) output signals before transmission to an ultra-low-power microcontroller in a wearable health monitor. IC Role / Device Role / Timing Role: Dual buffer isolates ADC output impedance from MCU input capacitance, preserving signal fidelity and reducing settling time. Use Value: Enables reliable 12-bit data capture at 10 kSPS using only 0.9 mA quiescent current, extending coin-cell battery life beyond 12 months. | Use Scenario: Driving GPIO expander inputs from a battery-powered ARM Cortex-M0+ MCU operating at 1.8 V in a smart home sensor node. IC Role / Device Role / Timing Role: Level-shifting buffer translates 1.8-V MCU outputs to 3.3-V tolerant inputs on I²C-compatible peripheral ICs. Use Value: Eliminates discrete level translators, reduces BOM count by one component, and maintains 4.3 ns propagation delay for deterministic timing. |
| Industrial Serial Bus Node | Point-to-Point Signal Integrity |
Use Scenario: Isolating UART TX/RX lines between a programmable logic controller (PLC) CPU and a remote RS-485 transceiver in factory automation equipment. IC Role / Device Role / Timing Role: Dual buffer provides galvanic isolation-free signal conditioning, suppressing crosstalk and ground bounce on long traces. Use Value: Supports error-free 1 Mbps UART communication over 15 cm PCB traces without termination resistors or layout tuning. | Use Scenario: Strengthening clock distribution from a real-time clock (RTC) IC to multiple low-power timers in a medical infusion pump controller. IC Role / Device Role / Timing Role: Fan-out buffer replicates RTC 32.768 kHz signal with matched edge rates and minimal skew between outputs. Use Value: Delivers sub-100 ps inter-channel skew and 1.5 pF input capacitance, ensuring synchronous wake-up across all timer modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G34DCKR | Higher ICC (max 10 µA at 3.3 V), narrower VCC range (1.65–5.5 V), no Ioff support | Lacks partial-power-down capability; unsuitable for systems requiring zero-current shutdown states | Choose when cost sensitivity outweighs Ioff requirement and supply is stable ≥1.65 V |
| 74AHC1G125SE-7 | Single-channel only, 3-state output, higher tpd (7.5 ns), no Ioff, different pinout (SOT-23-5) | Requires two devices for dual-buffer function; adds enable-control complexity and layout overhead | Choose only if 3-state functionality is mandatory and space allows dual placement |
Compared with SN74LVC2G34DCKR and 74AHC1G125SE-7, the SN74AUP2G34DCKR uniquely combines dual-channel buffering, Ioff-enabled power sequencing, and sub-1-µA static current across 0.8–3.6 V - making it optimal for energy-constrained, multi-rail embedded systems where reliability and footprint matter.
Availability
SN74AUP2G34DCKR is available at Aetrix Electronics and suitable for portable medical devices, battery-powered IoT sensors, and industrial control modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant manufacturing.
Supply support for SN74AUP2G34DCKR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of experience in low-power logic innovation.
The AUP logic family - including SN74AUP2G34DCKR - was designed specifically for ultra-low-power portable electronics, delivering industry-leading static/dynamic power efficiency while maintaining robust signal integrity and mixed-voltage interoperability.
FAQ
What is the maximum operating temperature range for SN74AUP2G34DCKR?
The SN74AUP2G34DCKR is fully specified for operation from –40°C to +85°C ambient temperature. All electrical characteristics - including propagation delay, output drive strength, and input threshold voltages - are guaranteed across this full industrial temperature range, making SN74AUP2G34DCKR suitable for deployment in harsh environments such as factory floors and outdoor sensor enclosures.
Does SN74AUP2G34DCKR support true 3.3-V I/O tolerance when VCC is below 3.3 V?
Yes. SN74AUP2G34DCKR supports 3.6-V I/O tolerance regardless of VCC level - meaning inputs can safely accept up to 3.6 V even when VCC is as low as 0.8 V. This allows SN74AUP2G34DCKR to act as a level translator from higher-voltage peripherals (e.g., 3.3-V sensors) to lower-voltage processors (e.g., 1.2-V cores) without external components.
Can SN74AUP2G34DCKR be used in partial-power-down mode with VCC = 0 V?
Yes. SN74AUP2G34DCKR incorporates Ioff circuitry that actively disables both outputs and blocks current flow when VCC = 0 V. This prevents damaging backflow from live signal lines into unpowered sections of the system - a critical feature for SN74AUP2G34DCKR in battery-backed subsystems and hot-pluggable modules.
What is the typical input capacitance of SN74AUP2G34DCKR, and why does it matter?
The typical input capacitance (Ci) of SN74AUP2G34DCKR is 1.5 pF. This low value minimizes loading on upstream drivers - especially important in high-speed or high-impedance signal paths - preserving edge rates and reducing timing uncertainty. For SN74AUP2G34DCKR, it directly contributes to its ability to maintain 4.3 ns tpd even with 5-pF load capacitance.
Is SN74AUP2G34DCKR pin-compatible with other dual buffer variants in the AUP family?
Yes. SN74AUP2G34DCKR shares identical SC-70 (DCK) pinout and function with other AUP dual buffers like SN74AUP2G07DCKR (open-drain) and SN74AUP2G125DCKR (3-state), enabling drop-in replacement where output topology permits. However, functional differences (e.g., output type) must be verified per application - SN74AUP2G34DCKR is strictly non-inverting push-pull.
SN74AUP2G34DCKR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74AUP
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Push-Pull
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-70-6
SN74AUP2G34DCKR FAQ
1.How can I place an order for SN74AUP2G34DCKR through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74AUP2G34DCKR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74AUP2G34DCKR reliable?
The price and inventory of SN74AUP2G34DCKR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74AUP2G34DCKR is usually 5 days.
3.What payment methods are accepted for SN74AUP2G34DCKR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74AUP2G34DCKR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74AUP2G34DCKR?
SN74AUP2G34DCKR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74AUP2G34DCKR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74AUP2G34DCKR?
For technical support, including SN74AUP2G34DCKR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74AUP2G34DCKR requirements.
6.How does Aetrix verify that SN74AUP2G34DCKR is sourced from the original manufacturer or authorized distributors?
All SN74AUP2G34DCKR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74AUP2G34DCKR meets industry standards.
7.What is the process for return or replacement of SN74AUP2G34DCKR?
All SN74AUP2G34DCKR units undergo pre-shipment inspection (PSI). If there is an issue with SN74AUP2G34DCKR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74AUP2G34DCKR part is unused and in its original packaging.
Return procedure for SN74AUP2G34DCKR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74AUP2G34DCKR Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
