Texas Instruments SN74CB3Q3125PWRG4
- Part No.:
- SN74CB3Q3125PWRG4
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
SN74CB3Q3125PWRG4.pdf
- Description:
- IC BUS SWITCH 1 X 1:1 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,001
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74CB3Q3125PWRG4 from Texas Instruments is a quadruple 1-bit FET bus switch optimized for high-bandwidth signal routing in 2.5V/3.3V systems. It delivers rail-to-rail switching (0V–5V with 3.3V VCC), 3Ω typical ON-state resistance, <0.2 ns propagation delay, and 500 MHz bandwidth - enabling clean, low-distortion data gating in USB, optical networking, and PBX interfaces.
For engineers reviewing the SN74CB3Q3125PWRG4 datasheet, SN74CB3Q3125PWRG4 pinout, SN74CB3Q3125PWRG4 application, or SN74CB3Q3125PWRG4 equivalent, key selection criteria include 5V-tolerant I/Os under powered-up/down conditions, Ioff-enabled partial-power-down operation, bidirectional zero-delay switching, and compatibility with 0.8V–5V logic families across –40°C to 85°C.
Technical Context
The SN74CB3Q3125PWRG4 uses an internal charge pump to elevate the gate voltage of its pass transistors, ensuring flat, low ron (4Ω typ) across the full 0V–5V I/O swing and 2.3V–3.6V VCC range. This architecture enables rail-to-rail analog/digital signal switching without level-shifting circuitry.
Each of its four independent channels features active-low OE control, bidirectional signal flow, 4 pF typical OFF-state I/O capacitance, and undershoot clamp diodes on all inputs/outputs - supporting robust hot-swap and mixed-voltage domain interfacing in telecom and datacom backplanes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2.3V to 3.6V - supports dual-rail 2.5V and 3.3V system operation without external regulators |
| ron (Typ) | 3Ω at VCC = 3.3V - minimizes insertion loss and ensures <0.2 ns propagation delay for high-fidelity signal integrity |
| I/O Voltage Range | 0V to 5.5V - enables 5V-tolerant interfacing with legacy peripherals while powered at 2.5V/3.3V |
| Cio(OFF) | 4 pF typical - reduces capacitive loading on high-speed buses (e.g., USB 2.0, PCIe Gen1) to limit signal distortion |
| fOE Max | 20 MHz - allows fast channel enable/disable sequencing for dynamic bus isolation in packet-switched systems |
| Ioff | 1 µA max at VCC = 0V - prevents back-current during partial power-down, critical for hot-plug and power-gating designs |
| ESD Rating | 2000V HBM, 1000V CDM - meets industrial-grade robustness requirements without external protection |
Pinout & Package
TSSOP-14 (PW) package: 5.00 mm × 4.40 mm body, 0.65 mm pitch, surface-mount, lead-free (NIPDAU), MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1OE, 2OE, 3OE, 4OE | Active-low channel enable | Independent per-channel control; drives associated A/B path into high-Z when high |
| 1A–4A, 1B–4B | Bidirectional data I/O pairs | Each pair forms a single-pole single-throw switch; supports rail-to-rail analog/digital signals up to 5.5V |
| VCC | Power supply | Supplies internal charge pump and logic; must be bypassed with 0.1 µF capacitor near pin |
| GND | Ground reference | Common return for all I/Os and internal circuitry; requires low-inductance connection to system ground plane |
Key Features
| Feature | Design Value |
|---|---|
| Charge-pump-enhanced ron | Maintains ≤4Ω over full 0V–5V I/O swing and 2.3V–3.6V VCC, eliminating signal compression in wide-voltage-range applications |
| 5V-tolerant I/Os | Operates with VI/O = 0–5.5V regardless of VCC state (powered up/down), enabling seamless interface with mixed-voltage subsystems |
| Ioff protection | Blocks >99% of back-current during VCC ramp-down, allowing safe partial-power-down in multi-rail systems without external isolation |
| Low Cio(OFF) | 4 pF typical isolates OFF channels from bus crosstalk and preserves signal edge rates in >200 Mbps links |
| Undershoot clamp diodes | Integrated on all inputs/outputs to suppress negative transients below –0.5V, reducing need for external TVS components |
Applications
| USB 2.0 Interface Isolation | Optical Networking Backplane Switching |
|---|---|
|
Use Scenario: Isolating USB D+/D− lines between host controller and peripheral port during hot-plug events or power sequencing. IC Role / Device Role / Timing Role: Bidirectional, zero-delay bus switch providing 5V-tolerant signal gating with Ioff protection during VCC ramp-down. Use Value: Eliminates signal corruption and ESD-induced latch-up during cable insertion/removal while maintaining full 480 Mbps bandwidth. |
Use Scenario: Routing differential clock/data pairs between FPGA transceivers and SFP+ modules in EPON line cards. IC Role / Device Role / Timing Role: Low-capacitance (4 pF), low-ron (3Ω) analog switch enabling rail-to-rail 3.3V signaling with sub-0.2 ns skew across four lanes. Use Value: Preserves eye diagram integrity and jitter margin in 1.25 Gbps serial links without requiring AC-coupling or termination redesign. |
| PBX Digital Signal Multiplexing | WiMAX Baseband Channel Selection |
|
Use Scenario: Dynamically connecting multiple DSP voice channels to shared CODEC resources in private branch exchange systems. IC Role / Device Role / Timing Role: Four independent 1-bit switches controlled by FPGA GPIOs to route PCM time slots with <0.2 ns inter-channel skew. Use Value: Enables real-time reconfiguration of voice paths without introducing audible artifacts or timing jitter in TDM frames. |
Use Scenario: Selecting between two RF front-end paths (Tx/Rx) in WiMAX base station radios using baseband I/Q signals. IC Role / Device Role / Timing Role: Bidirectional analog switch handling 0–3.3V I/Q waveforms with flat ron and minimal harmonic distortion. Use Value: Maintains EVM <–35 dB and ACLR >65 dB by avoiding nonlinearities introduced by higher-ron or asymmetric switching. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FET bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBT3125PW | Higher ron (7Ω typ), no charge pump, 3.3V-only VCC (4.5–5.5V), lower bandwidth (200 MHz) | Limited to 3.3V systems; unsuitable for 2.5V or mixed-voltage 0–5V I/O domains | Choose only if operating exclusively at 3.3V with relaxed bandwidth and ron requirements. |
| TS3A24159RGTR | Lower ron (0.7Ω typ), 1.65–3.6V VCC, but only dual-channel, no Ioff, 5V-tolerance only with external clamps | Not pin-compatible; lacks per-channel OE and Ioff for partial-power-down safety | Select when ultra-low ron is critical and system-level power sequencing eliminates need for Ioff. |
Compared with SN74CBT3125PW and TS3A24159RGTR, the SN74CB3Q3125PWRG4 uniquely combines 2.5V/3.3V operation, 5V-tolerant I/Os under all power states, Ioff protection, and 500 MHz bandwidth - making it the only option for robust, mixed-voltage, high-speed bus isolation in telecom infrastructure.
Availability
SN74CB3Q3125PWRG4 is available at Aetrix Electronics and suitable for optical networking, IP telephony, and wireless infrastructure applications requiring stable component supply, long-term lifecycle support, and guaranteed RoHS-compliant sourcing.
Supply support for SN74CB3Q3125PWRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in high-performance signal-integrity solutions.
The SN74CB3Q3125PWRG4 belongs to TI's CB3Q family of charge-pump-enhanced FET bus switches, designed specifically for low-distortion, high-bandwidth signal routing in telecom, datacom, and mixed-voltage digital systems.
FAQ
What is the maximum signal frequency supported by the SN74CB3Q3125PWRG4?
The SN74CB3Q3125PWRG4 supports up to 500 MHz bandwidth on its data path, verified by TI's characterization under 3.3V VCC and 50 Ω load conditions. This enables reliable use in USB 2.0 (480 Mbps), PCIe Gen1 (2.5 Gbps), and 1.25 Gbps EPON applications when layout best practices are followed.
Does the SN74CB3Q3125PWRG4 support partial-power-down operation?
Yes, the SN74CB3Q3125PWRG4 includes Ioff circuitry that limits current to 1 µA max when VCC = 0V, preventing damaging back-current flow through powered-down channels. This feature is explicitly validated per JESD78 Class II latch-up testing and is essential for hot-swap and multi-rail power sequencing.
Can the SN74CB3Q3125PWRG4 interface 1.8V logic with 5V peripherals?
Yes, the SN74CB3Q3125PWRG4 supports 0V–5.5V signaling on all I/O ports regardless of VCC (2.3V–3.6V). When powered at 2.5V or 3.3V, it safely translates between 1.8V FPGA I/O and 5V legacy peripherals without external level shifters or clamping diodes.
What is the typical ON-state resistance of the SN74CB3Q3125PWRG4 and how does it vary?
The SN74CB3Q3125PWRG4 has a typical ron of 3Ω at VCC = 3.3V and 4Ω at VCC = 2.5V, with flat response across 0V–5V I/O voltage. This stability is achieved via an internal charge pump - unlike non-pumped switches whose ron rises sharply near rail extremes.
Is the SN74CB3Q3125PWRG4 pin-compatible with other packages in the same family?
The SN74CB3Q3125PWRG4 (TSSOP-14) shares identical pinout and function mapping with the DGV (TVSOP-14) and RGY (VQFN-14) variants, including OE, A/B, VCC, and GND positions. However, it is not pin-compatible with the DBQ (SSOP-16) variant, which adds two NC pins and shifts pin numbering.
SN74CB3Q3125PWRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74CB
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Type:
- Bus Switch
- Circuit:
- 1 x 1:1
- Independent Circuits:
- 4
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2.3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
SN74CB3Q3125PWRG4 FAQ
1.How can I place an order for SN74CB3Q3125PWRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74CB3Q3125PWRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74CB3Q3125PWRG4 reliable?
The price and inventory of SN74CB3Q3125PWRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74CB3Q3125PWRG4 is usually 5 days.
3.What payment methods are accepted for SN74CB3Q3125PWRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74CB3Q3125PWRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74CB3Q3125PWRG4?
SN74CB3Q3125PWRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74CB3Q3125PWRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74CB3Q3125PWRG4?
For technical support, including SN74CB3Q3125PWRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74CB3Q3125PWRG4 requirements.
6.How does Aetrix verify that SN74CB3Q3125PWRG4 is sourced from the original manufacturer or authorized distributors?
All SN74CB3Q3125PWRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74CB3Q3125PWRG4 meets industry standards.
7.What is the process for return or replacement of SN74CB3Q3125PWRG4?
All SN74CB3Q3125PWRG4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74CB3Q3125PWRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74CB3Q3125PWRG4 part is unused and in its original packaging.
Return procedure for SN74CB3Q3125PWRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74CB3Q3125PWRG4 Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
