Texas Instruments SN74CBT16233DLR
- Part No.:
- SN74CBT16233DLR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 56-BSSOP (0.295", 7.50mm Width)
- Datasheet:
-
SN74CBT16233DLR.pdf
- Description:
- IC MUX/DEMUX 16 X 1:2 56SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,605
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74CBT16233DLR from Texas Instruments is a 16-bit 1-of-2 FET multiplexer/demultiplexer with 5-Ω on-state resistance, TTL-compatible input levels, and operation over –40°C to 85°C. It enables bidirectional signal routing between two independent data paths and one shared path in memory interleaving and bus switching applications.
For engineers reviewing the SN74CBT16233DLR datasheet, SN74CBT16233DLR pinout, SN74CBT16233DLR application, or SN74CBT16233DLR equivalent, key selection criteria include its 56-pin SSOP package, dual-select control (SEL1/SEL2), TEST-enabled parallel connection mode, and guaranteed 5.25 V max supply voltage compliance.
Technical Context
This device implements a widebus™-family FET switch architecture with no through-current during direction switching. Its dual 8-bit or single 16-bit configurable topology supports memory bank multiplexing and high-speed data path consolidation.
Control logic accepts 5-V CMOS, 5-V TTL, or LVTTL drivers on SEL1, SEL2, and TEST inputs. The A/B port switching is governed by a function table where low TEST enables standard 1-of-2 routing, while high TEST forces A-to-B1 and A-to-B2 simultaneous connection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| On-state resistance (ron) | 5 Ω typical at VCC = 4.75 V - ensures minimal voltage drop and signal integrity for 30 mA channel current. |
| Supply voltage range | 4.75 V to 5.25 V - compatible with standard 5-V logic rails and tolerant of ±5% regulation variation. |
| Propagation delay (tpd) | 0.25 ns typical - enables sub-nanosecond signal routing critical for high-speed bus applications. |
| Input clamp current | –50 mA - protects against negative transients without external diodes in mixed-voltage systems. |
| Operating temperature | –40°C to 85°C - qualified for industrial-grade embedded and computing environments. |
| Package thermal impedance (θJA) | 56°C/W for DL package - defines maximum power dissipation limit under natural convection cooling. |
| Channel current rating | 128 mA continuous - supports robust drive capability across all 16 channels simultaneously. |
Pinout & Package
SN74CBT16233DLR uses a 56-pin SSOP (DL) package with 0.635 mm pitch, 11.35 mm × 18.67 mm body, and 1.2 mm max height per JEDEC MO-194.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A–16A | Common port inputs/outputs | Bidirectional data terminals connected to shared bus or central data path. |
| 1B1–16B1, 1B2–16B2 | Two independent channel ports | Provide selectable 1-of-2 routing destinations; each Bx group maps to corresponding A pin. |
| SEL1, SEL2 | Channel select controls | Dual-bit encoding selects B1 (L/L), B2 (H/L), or both (X/H) - enables flexible path assignment. |
| TEST1, TEST2 | Parallel enable inputs | When asserted high, connect A port to both B1 and B2 ports simultaneously - useful for test-mode broadcast. |
| VCC, GND | Power and ground | Single 5-V supply with two VCC and two GND pins per half-package - reduces IR drop and improves noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| No through-current switching | Eliminates shoot-through risk during state transitions - enhances reliability in hot-swap and dynamic reconfiguration. |
| TTL-compatible inputs | Accepts 5-V CMOS, TTL, and LVTTL logic levels - simplifies interface with legacy and mixed-logic systems. |
| Low on-resistance (5 Ω) | Minimizes insertion loss and maintains signal fidelity up to 100 MHz - suitable for high-speed digital buses. |
| Widebus™ architecture | Optimized for high-density, low-skew 16-bit data routing - delivers consistent timing across all channels. |
| Test-mode parallel routing | TEST input enables simultaneous A→B1 and A→B2 connection - accelerates system-level diagnostics and validation. |
Applications
| Memory Interleaving | PCI Bus Switching |
|---|---|
Use Scenario: Two independent DRAM banks share a single memory controller data bus. IC Role / Device Role / Timing Role: Bidirectional 16-bit multiplexer routes controller signals to either bank based on address bits. Use Value: Enables 2× memory bandwidth utilization without doubling controller I/O count or adding latency. | Use Scenario: Isolating or merging PCI slots in modular backplane architectures. IC Role / Device Role / Timing Role: Acts as a reconfigurable bus segment coupler controlled by system configuration logic. Use Value: Supports hot-plug slot reassignment and dynamic bandwidth allocation with sub-ns propagation delay. |
| Test Access Multiplexing | Legacy System Bus Expansion |
Use Scenario: Connecting JTAG or boundary-scan test access points to multiple ASICs on a board. IC Role / Device Role / Timing Role: Provides selectable test-path routing using SEL/TEST inputs for parallel scan chain injection. Use Value: Reduces test fixture complexity and eliminates manual jumpering during production test. | Use Scenario: Adding ISA or LPC peripherals to modern microcontroller-based industrial controllers. IC Role / Device Role / Timing Role: Bridges legacy 8/16-bit peripheral buses to newer processor local buses with level translation support. Use Value: Extends product lifecycle by enabling backward compatibility without custom ASIC redesign. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FET multiplexer/demultiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBT16233DGGR | TSSOP-56 package (7.9 mm × 4.5 mm); 64°C/W θJA; same electrical specs. | Higher density PCB layout; lower thermal mass but reduced heat dissipation margin. | Select when board space is constrained and airflow is sufficient for thermal management. |
| SN74CBT16233DGVR | TVSOP-56 package (6.8 mm × 4.9 mm); 48°C/W θJA; identical functionality and timing. | Ultra-compact footprint; optimized for portable or space-limited industrial modules. | Prefer for handheld or dense multi-layer designs where thermal derating is acceptable. |
Compared with SN74CBT16233DLR, the DGGR and DGVR alternatives offer identical switching performance and logic behavior but differ in package size, thermal resistance, and board area usage - making them suitable for different mechanical integration priorities rather than functional substitution.
Availability
SN74CBT16233DLR is available at Aetrix Electronics and suitable for memory interleaving, PCI bus switching, test access multiplexing, and legacy system bus expansion requiring stable component supply and long-term industrial availability.
Supply support for SN74CBT16233DLR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with decades of industrial and automotive qualification experience.
The SN74CBT16233DLR belongs to TI's Widebus™ family of high-speed FET bus switches, designed specifically for low-latency, bidirectional data path consolidation in computing, communications, and industrial control systems.
FAQ
What is the maximum supply voltage rating for SN74CBT16233DLR?
The absolute maximum supply voltage for SN74CBT16233DLR is 7 V, but the recommended operating range is strictly 4.75 V to 5.25 V. Operating outside this window risks violating timing specifications, increasing on-resistance, or triggering latch-up. All electrical characteristics-including 5 Ω ron and 0.25 ns tpd-are guaranteed only within the 4.75–5.25 V range specified in the datasheet.
Does SN74CBT16233DLR support hot-swapping or live insertion?
SN74CBT16233DLR is not explicitly rated for hot-swap operation, but its no-through-current design and –0.5 V to VCC + 0.5 V input voltage range provide inherent robustness during partial power-up sequences. For true hot-swap compliance, external protection circuitry (e.g., series resistors, TVS diodes) and controlled ramp-up sequencing remain necessary. The device itself does not include built-in hot-swap controllers or slew-rate limiting.
How does the TEST input affect signal routing in SN74CBT16233DLR?
When TEST1 and TEST2 are driven high, SN74CBT16233DLR connects each A port pin simultaneously to both corresponding B1 and B2 pins-effectively enabling broadcast mode. This differs from normal SEL-controlled operation (where only one B port is active) and is used for diagnostic, calibration, or initialization sequences. The function table confirms that X/H input states force A = B1 and A = B2 concurrently.
Can SN74CBT16233DLR be used for analog signal switching?
SN74CBT16233DLR is characterized and specified only for digital signal routing-not analog. Its 5 Ω on-resistance, 4 pF off-capacitance, and lack of guaranteed THD, bandwidth flatness, or crosstalk specs make it unsuitable for precision analog paths. While small-signal analog passband may extend beyond 100 MHz, TI does not guarantee linearity, distortion, or settling behavior required for ADC/DAC interfaces or audio routing.
What is the pin 1 location and orientation for SN74CBT16233DLR in tape-and-reel packaging?
SN74CBT16233DLR in SSOP-DL tape-and-reel format uses Q1 quadrant orientation: pin 1 is located in the top-left corner of the cavity when the reel is fed with the component facing upward and the sprocket holes on the left side. This matches JEDEC-standard tape layout and is confirmed in TI's Package Materials Information document dated 10-Aug-2026 for part number SN74CBT16233DLR.
SN74CBT16233DLR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74CBT
- Package/Case:
- 56-BSSOP (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Multiplexer/Demultiplexer
- Circuit:
- 16 x 1:2
- Independent Circuits:
- 2
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 56-SSOP
SN74CBT16233DLR FAQ
1.How can I place an order for SN74CBT16233DLR through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74CBT16233DLR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74CBT16233DLR reliable?
The price and inventory of SN74CBT16233DLR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74CBT16233DLR is usually 5 days.
3.What payment methods are accepted for SN74CBT16233DLR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74CBT16233DLR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74CBT16233DLR?
SN74CBT16233DLR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74CBT16233DLR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74CBT16233DLR?
For technical support, including SN74CBT16233DLR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74CBT16233DLR requirements.
6.How does Aetrix verify that SN74CBT16233DLR is sourced from the original manufacturer or authorized distributors?
All SN74CBT16233DLR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74CBT16233DLR meets industry standards.
7.What is the process for return or replacement of SN74CBT16233DLR?
All SN74CBT16233DLR units undergo pre-shipment inspection (PSI). If there is an issue with SN74CBT16233DLR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74CBT16233DLR part is unused and in its original packaging.
Return procedure for SN74CBT16233DLR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74CBT16233DLR Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

