Texas Instruments SN74CBT16861DLR
- Part No.:
- SN74CBT16861DLR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 48-BSSOP (0.295", 7.50mm Width)
- Datasheet:
-
SN74CBT16861DLR.pdf
- Description:
- IC BUS SWITCH 10 X 1:1 48SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,808
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Product details
Overview
SN74CBT16861DLR from Texas Instruments is a 20-bit FET bus switch IC organized as two independent 10-bit switches, featuring 5-Ω on-state resistance, TTL-compatible input levels, and operation across –40°C to 85°C. It enables high-speed bidirectional signal routing in memory expansion, data multiplexing, and hot-swap I/O interfaces with minimal propagation delay (0.25 ns typical at 5 V).
For engineers reviewing the SN74CBT16861DLR datasheet, SN74CBT16861DLR pinout, SN74CBT16861DLR application, or SN74CBT16861DLR equivalent, key selection criteria include its dual-OE control architecture, 48-pin SSOP (DL) package, 5.5-V absolute max supply rating, latch-up immunity (>100 mA per JESD 78 Class II), and low off-state capacitance (5.5 pF).
Technical Context
This device implements two independent 10-bit FET-based analog switches controlled by separate OE inputs. Each switch connects port A to port B when OE is low, presenting <7 Ω on-resistance and <5.5 pF off-capacitance - critical for preserving signal integrity in high-speed digital buses.
It operates under 4 V to 5.5 V supply, supports TTL-level control inputs (VIH ≥ 2 V, VIL ≤ 0.8 V), and delivers sub-nanosecond propagation delay (tpd ≤ 0.35 ns at 4 V). Its rail-to-rail switching capability and ±1 µA input leakage ensure compatibility with mixed-voltage systems without level-shifting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| On-state resistance (ron) | 5–7 Ω at 4.5 V - ensures minimal voltage drop and signal attenuation during active switching. |
| Propagation delay (tpd) | 0.25 ns (typ) at 5 V - enables use in >1 GHz data paths without timing budget penalty. |
| Off-state capacitance (Cio) | 5.5 pF - reduces crosstalk and loading on adjacent high-speed traces. |
| Supply voltage range | 4 V to 5.5 V - compatible with standard 5-V logic rails and tolerant of transient overvoltage. |
| Latch-up immunity | >100 mA per JESD 78 Class II - guarantees robustness against accidental current surges in system-level ESD events. |
| Input leakage current | ±1 µA at 5.5 V - prevents unintended biasing of upstream drivers in high-impedance states. |
| Operating temperature | –40°C to 85°C - validated for industrial-grade embedded and telecom infrastructure applications. |
Pinout & Package
SN74CBT16861DLR is housed in a 48-pin SSOP (DL) package measuring 12.6 mm × 6.2 mm × 2.4 mm (max height), JEDEC MO-153 compliant, with 0.5-mm pitch and Q1 pin-1 orientation in tape-and-reel delivery.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A1–1A10, 2A1–2A10 | Port A inputs/outputs (Group 1 & 2) | 10-bit bidirectional signal terminals for first and second switch banks; electrically identical, not internally connected. |
| 1B1–1B10, 2B1–2B10 | Port B inputs/outputs (Group 1 & 2) | Corresponding 10-bit bidirectional terminals paired with respective A ports; switched only when associated OE is low. |
| 1OE, 2OE | Output-enable controls | Active-low enables for each 10-bit bank; independent control allows staggered or selective bus isolation. |
| VCC (Pins 25, 40) | Power supply | Dual VCC pins reduce IR drop and improve noise rejection across wide die; must be decoupled locally. |
| GND (Pins 12, 33) | Ground reference | Dual ground pins provide low-inductance return paths for both switch banks, minimizing ground bounce. |
| NC (Pins 1, 11, 22, 47) | No internal connection | Unbonded pads; must remain unconnected on PCB to avoid parasitic coupling or mechanical stress. |
Key Features
| Feature | Design Value |
|---|---|
| 20-bit dual-bank architecture | Two independent 10-bit switches with separate OE inputs enable flexible bus segmentation and partial isolation. |
| 5-Ω low on-resistance | Minimizes insertion loss and maintains signal edge rate integrity in 5-V TTL and CMOS systems. |
| TTL-compatible control inputs | Accepts standard 0.8 V / 2.0 V logic thresholds without external biasing - simplifies interface with legacy controllers. |
| High-speed switching (≤0.35 ns tpd) | Supports >1 Gbps data rates in parallel bus applications such as memory address/data gating and FPGA I/O expansion. |
| Low off-capacitance (5.5 pF) | Reduces capacitive loading on inactive bus segments, improving noise margin and reducing crosstalk in dense layouts. |
Applications
| Memory Expansion Interface | Data Multiplexing |
|---|---|
|
Use Scenario: Adding secondary SRAM or Flash memory banks to microcontroller-based industrial controllers without redesigning the main bus. IC Role / Device Role / Timing Role: Bidirectional 10-bit switch isolating auxiliary memory address/data lines until enabled via dedicated OE signal. Use Value: Enables dynamic memory mapping using existing 5-V bus timing, with <0.35 ns added delay preserving setup/hold margins. |
Use Scenario: Sharing a single 20-bit data path between two FPGA peripherals (e.g., ADC and DAC) operating on non-overlapping time slots. IC Role / Device Role / Timing Role: Dual-bank bus switch acting as time-division multiplexer, controlled by FPGA state machine outputs. Use Value: Eliminates need for discrete logic or CPLD glue logic; 5-Ω Ron ensures <50 mV voltage drop at 64 mA channel current. |
| Hot-Swap I/O Module | Legacy System Bus Isolation |
|
Use Scenario: Safely inserting/removing PCIe riser cards or modular I/O boards while main system remains powered. IC Role / Device Role / Timing Role: High-impedance isolation barrier placed between backplane and module-side bus lines during insertion/removal sequences. Use Value: Prevents bus contention and power rail collapse via fast disable (<7.1 ns tdis) and latch-up immunity (>100 mA). |
Use Scenario: Interfacing modern 3.3-V microprocessors with legacy 5-V peripheral ASICs sharing a common address/data bus. IC Role / Device Role / Timing Role: Level-tolerant bidirectional switch enabling voltage-domain bridging without direction-control logic. Use Value: Supports rail-to-rail signal transfer up to 5.5 V, with ±1 µA leakage preventing DC loading on either side. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FET bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBTD16210DLR | 24-bit, 3-state output with higher Ron (~9 Ω), requires 3.3-V supply only. | Designed for 3.3-V-only systems; lacks 5-V tolerance and dual-OE flexibility. | Choose when migrating to lower-voltage domains and needing more bits per package. |
| 74LVC16245ADL,118 | 16-bit transceiver with direction control, not bidirectional switch; 3.3-V only, higher propagation delay (3.4 ns). | Requires external direction logic and level shifters for 5-V interfacing; unsuitable for true analog switching. | Prefer only if direction-controlled buffering-not passive switching-is required in 3.3-V designs. |
Compared with SN74CBT16861DLR, SN74CBTD16210DLR offers greater bit count but sacrifices 5-V operation and dual-OE granularity, while 74LVC16245ADL,118 provides direction control at the cost of speed, voltage range, and true bidirectional transparency.
Availability
SN74CBT16861DLR is available at Aetrix Electronics and suitable for memory expansion, hot-swap I/O modules, and legacy bus isolation requiring stable component supply, long-term industrial lifecycle support, and RoHS-compliant SSOP packaging.
Supply support for SN74CBT16861DLR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in high-speed logic and interface solutions.
The SN74CBT16861DLR belongs to TI's Widebus™ family of FET bus switches, engineered specifically for low-latency, low-distortion signal routing in industrial, telecom, and computing infrastructure where timing-critical bus isolation is essential.
FAQ
What is the maximum supply voltage rating for SN74CBT16861DLR?
The SN74CBT16861DLR has an absolute maximum supply voltage (VCC) rating of 7 V, though it is specified for reliable operation between 4 V and 5.5 V. Exceeding 5.5 V may degrade parametric performance or reliability, and operation above 7 V risks permanent damage per the absolute maximum ratings table in the SCDS068C datasheet.
Does SN74CBT16861DLR support true bidirectional signal flow without direction control?
Yes, SN74CBT16861DLR implements passive FET-based switches that allow fully bidirectional signal transmission between port A and port B when the corresponding OE is low. No direction pin or control logic is needed - signal flow follows the driven side, making it ideal for transparent bus gating in memory and I/O applications.
What is the thermal resistance (θJA) of the SN74CBT16861DLR in its SSOP (DL) package?
The SN74CBT16861DLR in the DL package has a junction-to-ambient thermal resistance (θJA) of 63°C/W, measured under standard JEDEC test conditions. This value assumes a 2-layer PCB with 1-in² copper area per power pad and is critical for calculating junction temperature rise under continuous 128 mA channel current loads.
Can unused OE inputs on SN74CBT16861DLR be left floating?
No - all unused control inputs on SN74CBT16861DLR, including OE pins, must be held at a defined logic level (VCC or GND) to prevent metastability, excessive supply current, or unintended switching. TI's application report SCBA004 explicitly warns against floating CMOS inputs due to potential oscillation and increased ICC.
Is SN74CBT16861DLR pin-compatible with other members of the Widebus™ CBT family?
SN74CBT16861DLR shares the same 48-pin DL package footprint and pinout with functionally similar Widebus™ devices like SN74CBT16210DLR and SN74CBT16244DLR, but pin compatibility does not imply functional equivalence. Always verify OE assignment, port grouping, and Ron values - e.g., SN74CBT16210DLR uses different OE mapping and has higher on-resistance.
SN74CBT16861DLR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74CBT
- Package/Case:
- 48-BSSOP (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Bus Switch
- Circuit:
- 10 x 1:1
- Independent Circuits:
- 2
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-SSOP
SN74CBT16861DLR FAQ
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For technical support, including SN74CBT16861DLR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74CBT16861DLR requirements.
6.How does Aetrix verify that SN74CBT16861DLR is sourced from the original manufacturer or authorized distributors?
All SN74CBT16861DLR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74CBT16861DLR meets industry standards.
7.What is the process for return or replacement of SN74CBT16861DLR?
All SN74CBT16861DLR units undergo pre-shipment inspection (PSI). If there is an issue with SN74CBT16861DLR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74CBT16861DLR part is unused and in its original packaging.
Return procedure for SN74CBT16861DLR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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